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Wire bonding is widely used in various radio frequency (RF) devices and is one of the common forms of signal interconnection. In this article, a new geometric model with related physical parameters is used to describe various actual types of the bondwire, and the corresponding calculation method for the total length of the bondwire is obtained. Consequently, a new equivalent circuit modeling method of the single‐bondwire can be developed and the accuracy of model has been improved. On this basis, using the concept of partial inductance, the modeling method of double‐bondwire is proposed, which can be applied to asymmetric double‐bondwire modeling. The model of bondwire obtained by this modeling method is applied to the design of PA, and the special electrical properties of the bondwire are used to verify a novel harmonic control method, which second and third harmonics could be controlled. The results show that in the Sub‐6G, the proposed bondwire model has good accuracy, and its performance is close to the measured results. The designed PA combined with harmonic control network has good performance, achieving drain efficiency of 62.6%–70% and output power of 40–41.5 dBm at 3.2–3.8 GHz. It is proved that the proposed bonding line modeling method can be applied to the design of high‐efficient PA. [ABSTRACT FROM AUTHOR]

With the increasing demand for large signal bandwidth in communication systems, the complexity of the behavioral model of power amplifier (PA) will also increase. In this paper, a modified weighted magnitude‐selective model based on magnitude‐selective affine (MSA) function based model and weighted memory polynomial model is proposed to ensure low complexity and good modeling performance under broadband signal excitation. This model is constructed by using the power‐dependent weighted function instead of the sum of multiple MSA functions in MSA. It can not only be used to solve the nonlinearity of PA excited by large bandwidth signal but also reducing the model coefficients without affecting the modeling performance makes the digital predistortion of large bandwidth signals more simple and effective. In this paper, a 100 MHz broadband signal is used for simulation and experiment on a wideband PA. The results show that for the same performance the WMA model required approximately 80% less coefficients. [ABSTRACT FROM AUTHOR]

To cope with the degradation of digital predistortion when bandwidth changes, a bandwidth adaptive behavioral model with dynamic structures for radio frequency (RF) power amplifiers (PAs) is proposed in this article. By applying the nonlinear post‐compensation technology, PA's nonlinearity is decomposed and analyzed. Short‐time Fourier transform and transfer functions are adopted to study the influence of bandwidth variation on the linear memory effect. Based on PA's memory effect analysis, a bandwidth adaptive model with dynamic structures and a coefficient update scheme with low complexity are proposed. Experiments carried on PAs show that the proposed model achieves similar linearization performance as other conventional models. Simultaneously, the proposed model has fewer coefficients and a reduction in the coefficient update of at least 50%. [ABSTRACT FROM AUTHOR]

This paper intensely studies the impact of the input nonlinearity caused by the transistor's feedback on the hybrid continuous class‐F power amplifier. The research extends the influence of input harmonics on class‐F power amplifiers to a more general form. Through waveform engineering, the impact of feedback is analyzed. By analyzing the change in cutoff angle caused by input nonlinearity, the change of the drain voltage and current waveforms of the hybrid continuous class‐F power amplifier can be obtained. The new drain voltage and current waveforms obtained from the analysis redefine the design space of source impedance and load impedance for the hybrid continuous class‐F power amplifier. By designing the corresponding input and output matching network, the second harmonic is suppressed, and finally, the hybrid continuous class‐F power amplifier achieves a high‐efficiency state. The research reveals that input harmonics also play an essential role in the design process of power amplifiers. A comparative experiment is designed to verify the theory. Simultaneously, a 1.6–2.8 GHz broadband hybrid continuous class‐F power amplifier is designed using this theory, with a saturation efficiency of more than 61.2% and a saturation power of more than 40.4 dBm. [ABSTRACT FROM AUTHOR]

In this article, a design method for a tri‐band power amplifier (PA) with dynamic drain bias voltage is presented. Continuous operation modes are used to expand the impedance design space. In the input and output matching networks, harmonic control circuits are set up to improve efficiency. The load harmonic impedances are obtained by continuous theory. Bias network and harmonic short circuit are used in the input matching network to control harmonics and obtain stop‐band. Dynamic drain bias enables the PA to adapt to different emission environments. With input and output harmonic control technology, a 0.9, 1.5, and 2.1 GHz GaN PA is designed to achieve high efficiency in different modes. The measured efficiencies of the fabricated PA at all three bands are more than 58.6%. At 1.5 GHz, when driven with a 20 MHz LTE signal with a 7 dB peak‐to‐average power ratio, by applying digital pre‐distortion, the PA prototype maintains an adjacent channel power ratio of better than −48.7 dBc. [ABSTRACT FROM AUTHOR]

In this article, based on a dual-input configuration (DIC), a method for implementing ultrawideband or multiband load-modulated Doherty power amplifiers (DPAs) is proposed. The proposed DIC possesses two Doherty operating modes with respect to the working frequency. Each subamplifier of the DIC plays a changeable role versus frequency, changing from carrier to peaking or changing from peaking to carrier. A dual-input DPA working over 0.7–3 GHz (a relative bandwidth of 124%) is constructed for validating the proposed theory. Under continuous-wave signal excitation, experimental results illustrate that the fabricated power amplifier achieves a 6-dB back-off efficiency of over 40% across 0.7–3 GHz. The maximum output power of the fabricated DPA changes from 42.2 to 44.7 dBm across the whole working band. Meanwhile, a 20-MHz wideband modulated signal with a peak-to-average ratio of 6.04 dB is utilized to stimulate the fabricated DPA at 0.9, 1.8, 2.4, and 2.8 GHz. After digital predistortion, the measured adjacent channel leakage ratios are less than $-$ 50 dBc at four experimental frequency points. [ABSTRACT FROM AUTHOR]

In this article, a novel method to design broadband linear power amplifier (BL‐PA) is presented. By adding the image parts for harmonics and intermodulation products (HIMPs), a suboptimal solution of efficiency and linearity in continuous frequencies can be achieved at a broadband to improve the efficiency and linearity performance of the BL‐PA. For verification, a BL‐PA operating 3.2‐3.8GHz is designed and the performances are assessed in multi modes. [ABSTRACT FROM AUTHOR]

In this article, the generating mechanisms of nonlinear distortion of the dual-input Doherty power amplifier (DIDPA) are discussed, and based on this, an adaptive signal separation algorithm (ASSA) is proposed to improve the nonlinearity of DIDPA. The main idea of the ASSA is to minimize the mismatch between the signal separation functions and the intended operation, which is considered to be the leading cause of nonlinearity in DIDPA. The signal separation functions are used to determine the power ratio and phase difference between the main and the auxiliary amplifier. Moreover, in order to maximize the drain efficiency, an efficiency dictionary which is derived from the static measured results is employed during the ASSA. The performance of the ASSA is validated experimentally on a gallium nitride (GaN)-based DIDPA. The measured results show that with the help of the ASSA, the adjacent channel power ratio and normalized mean square error of output signal can be improved significantly without sacrificing efficiency. In order to further demonstrate the validity of the ASSA, the digital predistortion results of the DIDPAs with and without ASSA are compared with two kinds of behavioral models and two kinds of modulation signals. [ABSTRACT FROM AUTHOR]

This letter proposes a method to further improve the efficiency of power amplifiers (PAs). A thermoelectric generator is used to harvest the thermal energy produced by the PA and transform it into electric energy. Then, the efficiency of the PA can be improved by feeding the obtained electric energy to the drain power supply via a dc–dc converter. For verification, a 10-W 3.2–3.8-GHz class-F PA for base station applications is built; the generated temperature distribution and the process of energy conversion are evaluated. Cost-effective commercial chips are applied to harvest, transform, convert, and feedback the energies to the drain supply. The measurement results demonstrate an improvement of ${1.1\%}$ drain efficiency at the peak output. [ABSTRACT FROM AUTHOR]

This paper introduces a methodology for implementing multi-band Doherty power amplifiers. Traditionally, a 90∘ impedance inverter line is required in Doherty architecture. In this contribution, a generalized impedance inverter line is utilized to construct multi-band Doherty power amplifiers. A tri-band Doherty power amplifier operating at 1.15, 1.85 and 2.55 GHz is designed to validate the proposed method. Measurement results show the fabricated Doherty power amplifier achieves 6 dB output back-off drain efficiencies of 62.3%, 49.3% and 50.5% at 1.15, 1.85 and 2.55 GHz, respectively. The peaking output power of the fabricated tri-band Doherty power amplifier is 43.2, 43.7 and 43.8 dBm with drain efficiencies of 64.5%, 62.2% and 64.5% at three working frequency points, respectively. Furthermore, when the designed Doherty power amplifier is driven by a 20 MHz wideband LTE signal with peak-to-average-power ratio of 6.4 dB, adjacent channel power ratios of − 29.4 and − 57.1 dBc are achieved before and after digital pre-distortion at 1.85 GHz. [ABSTRACT FROM AUTHOR]

This paper analyses the impacts of the harmonic-tuned hybrid continuous modes (HTHCMs) approach on the back-off efficiency of Doherty power amplifiers (DPAs). Based on the HTHCMs strategy, formulations are derived for designing the impedance inverting network (IIN) and impedance transforming network (ITN) in the DPA. Via the proposed approach, multiple impedance solutions for realizing broadband DPAs with substantial output back-off efficiency recovery is made possible. The potentiality of the design method is demonstrated by the realized prototype working from 1.4 to 2.45 GHz. Test results have shown over 50% drain efficiency at 6 dB back-off power. [ABSTRACT FROM AUTHOR]

To achieve high efficiency, an optimised method of the series–parallel form (SPF) hybrid envelope tracking power supply based on hysteresis current control is proposed in this Letter. The SPF hybrid power modulator is constituted by one linear regulator and two switched‐mode converters which include one multilevel converter and one buck converter. Based upon the equivalent average current slew rate matching theory and accurate power loss model analysed in this Letter, the voltage distribution of the multilevel converter is optimised. For verification, a prototype is fabricated aiming for tracking the 10‐MHz LTE envelope signal with the efficiency of 83%, 26.9 W average output power, and 67.6 W maximum output power. [ABSTRACT FROM AUTHOR]

This paper proposes bandwidth and efficiency improvements of symmetrical Doherty power amplifiers (SDPAs) using continuous harmonic-tuned Class-J mode (CHTCJM). By this approach, the effects of the CHTCJM on the impedance inverter network and post-matching network in SDPAs are reanalysed using formulated mathematical equations. In this way, to recover and further improve the bandwidth and efficiency performances in the conventional SDPA. The term recovery as proposed in this context is to redefine, reanalyse, retrieve and further enhance the output-power-back-off efficiency and bandwidth performances lost in the conventional SDPAs using an alternative theoretical methodology based on the CHTCJM. Based on the findings, the proposed technique can substantially recover and enhance the bandwidth and efficiency of SDPAs at the desired output-power-back-off level. According to the measurement results, the fabricated SDPA model operates within 1.45–2.45 GHz frequency band with more than 50% peak drain efficiency at 6 dB output-power-back-off. Furthermore, more than 60% drain efficiency, 12 dB gain and 43 dBm output power are delivered at saturation. Using digital predistortion with a 20-MHz long-term evolution signal in testing the linearity of the implemented SDPA, the SDPA's adjacent channel leakage ratio is less than −45 dBc at an average output power of 36 dBm. [ABSTRACT FROM AUTHOR]

A method enabling the codesign of a high-efficiency power amplifier (PA) and a ring-resonator microstrip bandpass filter is proposed in this paper. Even–odd-mode analysis and a series of continuous modes (SCMs) are combined to realize broadband or multiband impedance matching as well as the suppression of undesired signals. The proposed codesign method can achieve both broadband and multiband frequency responses, and the designed component is relatively easy to analyze and fabricate due to its microstrip structure. For verification, a broadband and triband PA-filter components are designed and fabricated separately. The first component operates across 0.8–3.2 GHz (120%) with 39.7–42.9-dBm maximum output power and 57%–74% drain efficiency (DE). The second component, which has three passbands, covers several commercial frequencies with a measured output power of 39.6–41.3 dBm and DE from 62% to 68%. When these two components are driven by a 20-MHz long-term evolution signal with a peak-to-average power ratio of 6.2 dB, adjacent channel leakage ratios from −26.4 to −33.8 dBc and from −29.4 to −33.1 dBc are measured, respectively. [ABSTRACT FROM AUTHOR]

In this paper, an extended Chebyshev function is proposed to adapt the matching condition of the power amplifier (PA) by introducing a new factor. A set of impedance functions can be directly calculated along with the variation of a new variable, and the first element extracted from the functions is distributed in a wide range. In addition, the impedance function whose first element is the closest to the output capacitance of the transistor can be easily read out and selected as the original matching network. The fundamental impedance of the selected function will be reached a good matching state, and the impedances out of band will be on the edge of Smith chart. To achieve better performances, the real frequency technique is applied to adjust the harmonic impedances preventing it from falling into the low-efficiency region. Two PAs with a relative bandwidth of 34% and 75% are implemented to validate the proposed approach. [ABSTRACT FROM PUBLISHER]

In this study, a methodology is proposed for extending the high‐efficiency power range (HEPR) of symmetrical Doherty power amplifiers (DPAs). This method takes advantage of the output impedance of peaking stage. Traditional symmetrical DPAs maintain high efficiency over a 6 dB power range with an assumption of the output impedance of peaking stage being infinity. This study reveals that the HEPR can be further enhanced by tuning the output impedance of peaking stage away from infinity and changing the phase delay of the impedance inverter after carrier power amplifier. A 2.2–2.3 GHz symmetrical DPA with an HEPR of 9 dB is fabricated to validate our theory. The experimental results possess drain efficiencies of 45.3–49.5% at 9 dB output power back‐off level and 62.9–71% at peaking power level over 2.2–2.3 GHz. The maximum output power of the fabricated DPA is 45 dBm with a gain of 11.6–13.5 dB across 2.2–2.3 GHz. [ABSTRACT FROM AUTHOR]

ABSTRACT In this letter, an architecture is presented to solve problems of classical concurrent dual-band Doherty power amplifiers (DPAs) and its design procedure is given. It is a codesign of two single-band DPAs and four filters. Two of filters at the output port are used for impedance transformation, harmonic components suppressing and signal isolating, while the another two split concurrent dual-band signals at the input port. In this way, intermodulation components of the two bands can be effectively suppressed and each band can achieve a good performance as single-band one's. This design concept is demonstrated through implementing of a practical dual-band DPA operating at 1.8 and 2.5 GHz. Measurement results show that efficiencies are 65.0 and 56.3% at the 6 dB output power back-off for concurrent application. The intermodulation components and harmonic components are lower than −40 dB except second harmonic component at 1.8 GHz (−32 dB). © 2017 Wiley Periodicals, Inc. Microwave Opt Technol Lett 59:530-533, 2017 [ABSTRACT FROM AUTHOR]

This paper presents a modified Doherty configuration with extended bandwidth. The narrow band feature of the conventional Doherty amplifier is discussed in the view of the broadband matching. To extend the bandwidth, the post-matching architecture is employed in the proposed design. Meanwhile, broadband low-order impedance inverters are adopted to replace the quarter-wavelength transmission lines. Low-pass filter topologies are used to realize both the post matching network and the impedance inverters. A modified Doherty Power amplifier was designed and fabricated based on commercial GaN HEMT devices to validate the broadband characteristics of this configuration. The 6-dB backoff efficiencies of 47%–57% are obtained from 1.7 to 2.6 GHz (41.9% fractional bandwidth) and the measured maximum output power ranges from 44.9 to 46.3 dBm in the designed band. In particular, more than 40% efficiencies are measured at 10-dB backoff throughout the operation band. [ABSTRACT FROM PUBLISHER]

A 0.4–2.3 GHz broadband power amplifier (PA) extended continuous class-F design technology is proposed in this paper. Traditional continuous class-F PA performs in high-efficiency only in one octave bandwidth. With the increasing development of wireless communication, the PA is in demand to cover the mainstream communication standards’ working frequencies from 0.4 GHz to 2.2 GHz. In order to achieve this objective, the bandwidths of class-F and continuous class-F PA are analysed and discussed by Fourier series. Also, two criteria, which could reduce the continuous class-F PA’s implementation complexity, are presented and explained to investigate the overlapping area of the transistor’s current and voltage waveforms. The proposed PA design technology is based on the continuous class-F design method and divides the bandwidth into two parts: the first part covers the bandwidth from 1.3 GHz to 2.3 GHz, where the impedances are designed by the continuous class-F method; the other part covers the bandwidth from 0.4 GHz to 1.3 GHz, where the impedance to guarantee PA to be in high-efficiency over this bandwidth is selected and controlled. The improved particle swarm optimisation is employed for realising the multi-impedances of output and input network. A PA based on a commercial 10 W GaN high electron mobility transistor is designed and fabricated to verify the proposed design method. The simulation and measurement results show that the proposed PA could deliver 40–76% power added efficiency and more than 11 dB power gain with more than 40 dBm output power over the bandwidth from 0.4–2.3 GHz. [ABSTRACT FROM PUBLISHER]

A general matching method is presented in this paper for broadband power amplifier (PA) design. A novel cost function is proposed for the real frequency technique (RFT), which could straightforwardly describe PA optimal impedance along with frequency change. The new function is also developed to design a broadband transformer for the PA output matching network (MN). Based on Richard transformation, a commensurate transmission line is deployed so that the PA matching could be convenient expressed by a real positive function. More important is that the function could be directly implemented with a distributed MN through synthesis theory. Therefore, this method is practical for computer-aided design and has less calculation amount with new function for the RFT. To verify the method, a step-by-step design of a broadband PA is given. For large signals, power gain is 14.2–16.8 dB across 0.9–2.8 GHz, while output power is around 39.5 dBm. The maximum power-added efficiency is from 52.2% to 85.1%. [ABSTRACT FROM AUTHOR]

An under-sampling digital predistortion based on a multi-tone mixing feedback technique (MTM-DPD) is presented in this article. In contrast to the under-sampling digital predistortion (DPD) based on conventional receivers, the proposed method could simultaneously reduce the sampling rate and acquisition bandwidth using a multi-tone mixing (MTM)-based feedback channel. The MTM-DPD is implemented with an evolved direct learning architecture, where the coefficients of a predistorter are estimated based on the aliased feedback signal, preprocessed input signal, and preprocessed kernels of the DPD model. To preprocess the input signal and kernels, the behavioral model of the MTM-based feedback channel and its corresponding identification algorithm are analyzed in detailed. Experimental results show that for a gallium nitride (GaN)-based power amplifier (PA) with 40-MHz input, under the excitation of a 17 tone LO signal with frequency interval 7.68 MHz, the MTM-DPD with sampling rate 15.36 MSPS and acquisition bandwidth 15.36 MHz could improve the adjacent channel power ratio (ACPR) from −30.1 to −46.5 dBc and the error vector magnitude (EVM) from 9.13% to 1.76%. Compared with the conventional full sampling DPD (FS-DPD), the MTM-DPD could reduce the cost of analog-to-digital converters (ADCs) in feedback channel significantly while maintaining satisfactory linearization performance. [ABSTRACT FROM AUTHOR]

A dynamic deviation memory polynomial (DDMP) model for digital predistortion is proposed to compensate the non‐linear distortion of the power amplifier. It is based on the memory polynomial model and dynamic deviation reduction‐based Volterra (DDRV) model. Compared to the DDRV model, the proposed model shows better modelling accuracy under the same complexity. The effectiveness of the DDMP model has been verified by simulation and experiment results. [ABSTRACT FROM AUTHOR]

In this article, a dynamic dual‐band baseband equivalent Volterra (DDBE) model is proposed to compensate the nonlinear distortions of the concurrent dual‐band power amplifier (PA). The DDBE model is obtained by improving the discretized dual‐band baseband equivalent Volterra model which can describe the output characteristics of concurrent dual‐band PA completely in theory but is lack of practicability. Three simplification rules are proposed in the article, and the relevance between in‐band intermodulation and in‐band cross modulation is employed to simplify the establishment complexity of the model. Then the dynamic kernels are categorized into three groups, and based on this, DDBE models with different level dynamical kernels are derived. In addition, draw on the experience of single‐band PA behavioral model, even‐order kernels are introduced into DDBE models. Digital predistortion performances of a wideband PA, which works in concurrent dual‐band mode, are evaluated to verify the feasibility and advantages of the proposed model. [ABSTRACT FROM AUTHOR]

An optimal balance between high efficiency and high linearity is one of the main performance metrics of modern base stations to handle the deep compression of the power amplifier (PA) module. In principle, the plethora of amplitude‐to‐amplitude (AM‐AM) and amplitude‐to‐phase (AM‐PM) distortions are issues worth exploring. Therefore, this paper presents a linearized harmonic‐tuned PA that operates at 2.4 GHz. The presented PA utilizes a compact input matching network (IMN) and output MN (OMN) with shunt‐connected tunable resonant circuits augmented by the stabilization network, whose presence greatly reduces the transistor parasitics and high‐order effects. Hence, a joint embodiment of each other gives optimal fundamental impedance matching alongside harmonic terminations and precise AM/PM waveform properties. The measurement results have shown that the fabricated PA exhibits peak saturated output power of 40.9 dBm and peak drain efficiency (DE) of 67%. In addition, the AM‐AM and AM‐PM curves under continuous‐wave excitation yield a gain flatness of 0.5 dB over a 37.5 dBm power range and ±3.5° phase distortion, respectively, when the input power level is swept up to the saturation level of 40 dBm. When driven with a 5 MHz 64‐QAM OFDM signal and 6.9 dB power back‐off, the manufactured PA meets the adjacent channel leakage ratio specification of −30 dBc at an average output power of 34.5 dBm. [ABSTRACT FROM AUTHOR]

Abstract: This paper describes a new approach of designing high Q surface acoustic wave (SAW) resonators as an inductive element in the matching network for W-CDMA power amplifiers (PAs). Spiral inductors based on CMOS/BiCMOS technologies presently possess relatively low Q (typically <10) and occupy a considerably large area. In order to break through the limitations of the spiral inductors, the authors attempt to apply higher Q and wideband SAW resonators employing Cu-grating/15°YX-LiNbO3-substrate structure to the matching network for improved PA performance. An analysis was made on SAW resonators in detail, and an SAW resonator having a very small capacitance ratio of 3.28 and moderate Q of 147.8 was developed. After discussing the frequency dependence of the effective inductances, SAW resonators, which are used to be as inductive elements in the matching networks of PAs, were designed and fabricated. The PA including the matching circuit was simulated using the characteristics of the fabricated SAW resonators. The result showed that with better shape factor and good out-of-rejection, the SAW resonators definitely work as an inductive element and could replace widely used spiral inductors. [Copyright &y& Elsevier]

Active load modulation and harmonic injection can be used to boost the power amplifier's (PA) efficiency, but these techniques must add a fundamental external source or a harmonic generator. In this paper, a two‐way power amplifier architecture is introduced to extend high‐efficiency operation bandwidth by utilizing concurrent active load modulation with a waveform mapping method. Active load modulation is realized in between the two branches with the aid of independent input amplitude and phase control. Based on a calculated waveform database, high‐efficiency operations for both transistors from 1 to 4 GHz are designed in a self‐defined optimization platform considering waveform distance and input parameters. Finally, this PA is fabricated and measured to offer 41.6 to 45.0 dBm power, 8.2 to 11.7 dB gain, and 56% to 89% drain efficiency from 0.85 to 3.85 GHz. [ABSTRACT FROM AUTHOR]

In this article, a method for design automation high-efficiency power amplifiers (PAs) based on an optimization-oriented is proposed. The advantages of using particle swarm optimization to design PAs in electronic design automatic tools are analyzed, and then, simulated annealing is combined to form simulated annealing particle swarm optimization (SA-PSO). In this article, the perfectly inelastic collision used in conventional PSO is replaced by the perfectly elastic collision to improve the searching ability through reducing kinetic energy consumption. A stepped fitness function is defined to avoid the performance pit at a single-frequency point, and the concept “missing and returning” is introduced to solve the nonconvergence problem in simulation. Based on the improved SA-PSO algorithm, a broadband 10 W and a triband 6-W PA are designed. The broadband 10-W PA achieves an average drain efficiency (DE) of 62.5% and an output power of 41.2 dBm in the 0.8–3-GHz frequency band, respectively; the triband 6-W PA achieves an average of 57.4%/47.9%/47.3% DE and 37.7-/38.3-/37.4 dBm output power in 3.35–3.55-/5.75–5.95-/7.65–7.95-GHz frequency bands, respectively, while the gains of most stopbands reach less than 0 dB. With digital predistortion technology, the adjacent channel power ratio (ACPR) can reach less than −45 dBc. [ABSTRACT FROM AUTHOR]

In order to apply the traditional power amplifier’s (PA) waveform engineering in an RF-dc rectifier design, a piecewise ON-resistance transistor model is introduced into the derived equations. In this proposed analysis method, the connection between the drain voltage and current is built in order to make the theoretical waveforms easily applied to a practical rectifier design with optimized parameters of the best efficiency. Continuous class-F/inverse class-F and continuous class-B/J waveforms are evaluated with numerical examples in this work. Thus, the rectification performance with different classes and parameters can be compared. This study shows that a continuous class-F and a continuous class-B/J rectifier can barely offer higher than 52% and 70% efficiencies with precise on-duty ratio ($D$) of 0.5, respectively, except by reducing the conduction angle. However, a continuous inverse class-F shows the best rectification efficiency (easily higher than 85%) among all the studied cases for $D=0.5$. A self-driving inverse class-F design example with optimized parameters is given to verify the theoretical analysis and demonstrate the high-efficiency performance. The rectification efficiencies of 74.9% and 80.7% are measured for 11.2- and 6 W-input powers at 1.9 GHz, respectively. [ABSTRACT FROM AUTHOR]

In this article, a direct solving method for power amplifier (PA) matching network design is explored from a theoretical perspective. Commonly, the input impedance function of a multivariable matching network is a transcendental equation and it is unsolvable. In the proposed new method, this problem can be solved to some extent by transforming the transcendental equations into solvable linear equations, where the unknown coefficients can be calculated easily. A family of impedance functions is obtained if the order of matching network is higher than the number of functions, and the best one can be selected according to the practical demand in PA design. As a design example, a triband PA with arbitrary frequency points (0.9/2.3/3.5 GHz) is implemented to validate the proposed approach. The calculation results show that the proposed method can solve the matching problem of high-order circuits. And the simulation and experiment results agree with the calculation results very well, which verified the validity of the proposed method. [ABSTRACT FROM AUTHOR]

Summary: Greedy algorithms in the compressive sensing theory have been formed the essential method for pruning power amplifier (PA) behavioral models and digital predistorters (DPDs). However, the inherent batch mode of these algorithms limits their application in adaptive digital predistortion framework. In this paper, a powerful subspace pursuit greedy scheme combined with stochastic gradient descent adaptive algorithm is proposed to design a class of adaptive sparse DPDs. According to the given sparsity level, the proposed approach can obtain the sparse terms of DPDs and extract the corresponding coefficients adaptively. Performance improvement of the proposed method is validated by simulation results on the adaptive DPD excited by 15‐MHz 3‐carrier Long‐Term Evolution signals and 50‐MHz 16 amplitude/phase‐shift keying signals. Meanwhile, measurement results on a Doherty PA excited by 30‐MHz 3‐carrier Long‐Term Evolution signals are also performed to verify the advantage of the proposed approach. Simulation and experimental results show that proposed algorithm can efficiently construct the adaptive sparse DPD models with only a small number of parameters; both nonlinear distortions and memory effects in the PA can be almost completely removed. A comparison with the nonsparsity aware DPD techniques and batch mode compressive sensing pruning techniques has been demonstrated that the proposed method exhibit faster convergence, improving tracking capabilities and reduced computational complexity. [ABSTRACT FROM AUTHOR]

A platform of high accuracy and reliability is crucial for power amplifier (PA) designers to assess the characteristics of the PA prototype, and for the digital predistorter engineers to validate their models and algorithms. Digital processing techniques for building a test bed of high performance for PA characterization and predistortion (PD) are discussed in this article. We also proposed a novel technique to characterize the frequency responses of the vector signal generator and vector signal analyzer independently without using any other instrument. The techniques described in this article are quite useful, especially for narrowband vector transmitters and receivers, to improve their performance. These techniques were experimentally evaluated, both for characterization and PD of a class-F PA. Test results show that using such techniques can successfully build a test bed of high accuracy and wide bandwidth. © 2012 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2013. [ABSTRACT FROM AUTHOR]

The interplay between the unavoidable various nonlinearities of the direct conversion transmitter, such as local oscillator leakage, power amplifier (PA) nonlinearities, and in‐phase and quadrature (I/Q) branch imbalance, and so forth will degrade the communication system performance seriously. To overcome these nonlinear interactive effects, an accurate adaptive sparse behavioral model is proposed for the joint compensation of the transmitter impairments in this article. First, a three‐input nonlinear joint compensation model, which is composed of the nonlinear frequency‐dependent cross terms between the I and Q branches as well as the magnitudes of the input signal, is developed. Second, to prune the redundant terms and reduce the computational complexity of the full three‐input model, an efficient robust quasi‐newton–based adaptive greedy algorithm is developed. To verify the performance of the proposed method, the different imperfect transmitters based on single‐device GaN Class‐F PA and GaN Doherty PA are used for experimental verification and analysis. Experiment results show that the proposed method can efficiently construct a sparse joint compensation model with improved modeling and distortion mitigation capability than the reported I/Q imbalance model, where nonlinear distortion and I/Q imbalance characteristics in the transmitter can be almost completely removed. [ABSTRACT FROM AUTHOR]

Starting from the greedy theory, this paper presents a novel adaptive greedy scheme for the power amplifier (PA) behavioral model adaptive pruning. The proposed scheme incorporates the stochastic conjugate gradient (SCG) principle into the subspace pursuit (SP) greedy algorithm, which can considerably offer improved tracking capabilities and faster convergence compared to other anterior adaptive greedy algorithms. Compared to conventional nonsparse methods, simulation results show that the proposed scheme can efficiently reduce the model order and computational complexity but almost have the comparable model performance with the full model. © 2017 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc. [ABSTRACT FROM AUTHOR]