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This paper proposes fault-tolerant (FT) operation of a single-switch dc-dc converter under a switch failure. In order to improve the reliability in critical applications, FT operation is mandatory to guarantee service continuity. The FT operation of a power system can be performed in three steps: fault diagnosis (detection and identification) and remedial actions. In the case of a switch failure, suitable fault detection is essential to avoid its propagation to the whole system. This study is based on a fast and efficient open- and short-circuit switch fault diagnosis. Both types of switch failure can be detected, identified, and handled in real time by implementing fault diagnosis and reconfiguration strategies on a field-programmable gate array target. No additional sensor is required to perform the fault detection. A redundant switch and a bidirectional switch are needed for converter reconfiguration in postfault operation. The results of hardware-in-the-loop and experimental tests, which all confirm the good performances of the proposed approach, are presented and discussed. [ABSTRACT FROM AUTHOR]

Abstract: Most of actual real time simulation platforms have practically about ten microseconds as minimum calculation time step, mainly due to computation limits such as processing speed, architecture adequacy and modeling complexities. Therefore, simulation of fast switching converters’ instantaneous models requires smaller computing time step. The approach presented in this paper proposes an answer to such limited modeling accuracies and computational bandwidth of the currently available digital simulators.As an example, the authors present a low cost, flexible and high performance FPGA-based real-time digital simulator for a complete complex power system with Neutral Point Piloted (NPP) three-level inverter. The proposed real-time simulator can model accurately and efficiently the complete power system, reducing costs, physical space and avoiding any damage to the actual equipment in the case of any dysfunction of the digital controller prototype. The converter model is computed at a small fixed time step as low as 100ns. Such a computation time step allows high precision account of the gating signals and thus avoids averaging methods and event compensations. Moreover, a novel high performance model of the NPP three-level inverter has also been proposed for FPGA implementation. The proposed FPGA-based simulator models the environment of the NPP converter: the dc link, the RLE load and the digital controller and gating signals. FPGA-based real time simulation results are presented and compared with offline results obtained using PLECS software. They validate the efficiency and accuracy of the modeling for the proposed high performance FPGA-based real-time simulation approach. This paper also introduces new potential FPGA-based applications such as low cost real time simulator for power systems by developing a library of flexible and portable models for power converters, electrical machines and drives. [ABSTRACT FROM AUTHOR]

Power-electronics-based hybrid dc power systems (HDCPSs) are increasingly used in many industrial applications such as land, sea, and air vehicles. In these systems, small dc-link and LC filter capacitors are of great interest for weight saving. Usually, in HDCPSs, there are constant power loads and negative dynamic impedance of these loads may generate unstable oscillations. Besides, the risk of resonance may be increased under unbalanced load conditions. In this paper, a distributed active oscillation suppression approach is presented. It is based on the analytical study of the linearized model of the studied system around the operating point. The studied system consists of one main dc source and one storage element supplying two loads: a permanent magnet synchronous motor connected to the dc link by a voltage source inverter and a resistive load supplied by a dc/dc converter through the same dc bus. The proposed approach is particularly used to overcome the resonance under unbalanced load conditions and allows reducing dc link and LC filter capacitors for weight saving. Simulations and experimentations are carried out which confirm the validity of the proposed approach. [ABSTRACT FROM AUTHOR]

This paper discusses the design, implementation, experimental validation, and performances of a field-programmable gate array (FPGA)-based real-time power converter failure diagnosis for three-leg fault tolerant converter topologies used in wind energy conversion systems (WECSs). The developed approach minimizes the time interval between the fault occurrence and its diagnosis. We demonstrated the possibility to detect a faulty switch in less than 10 μs by using a diagnosis simultaneously based on a "time criterion" and a "voltage criterion." To attain such a short detection time, an FPGA fully digital implementation is used. The performances of the proposed FPGA -based fault detection method are evaluated for a new fault tolerant back-to-back converter topology suited for WECS with doubly fed induction generator (DFIG). We examine the failure diagnosis method and the response of the WECS when one of the power switches of the fault tolerant back-to-back converter is faulty. The experimental failure diagnosis implementation based on "FPGA in the loop" hardware prototyping verifies the performances of the fault tolerant WECS with DFIG. [ABSTRACT FROM AUTHOR]