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• A novel control scheme for a PUC inverter has been proposed for the BESS application. • The proposed scheme uses a finite-set MPC with an inner and outer loop. • Good dynamic performance and fault-ride-through capability have been achieved. • Grid code compliance at low switching frequency has been demonstrated. Compared to conventional multilevel topologies, the Packed U-Cell multilevel topology utilizes the minimum number of components and provides both maximum voltage levels and high reliability. When used in a battery energy storage system, its dc-link consists of a top branch battery storage and bottom branch flying capacitors, whose state of charge and voltages must be balanced.This paper proposes a novel control scheme with two cascaded controllers: the inner loop regulates the output filter current and dc-link voltages using a novel finite-set model predictive control, the outer one is fully integrated with the model predictive controller and regulates the battery state of charge by injecting a zero-sequence voltage. The proposed control scheme was successfully implemented and tested through simulation and real-time testing. The obtained results highlight good dynamic performance and robustness of the proposed scheme during active power injection/absorption and low voltage ride-through capability. [ABSTRACT FROM AUTHOR]

With the advent of SiC devices, the packed U-Cell converter has become a promising topology among the multilevel converters for medium voltage DSTATCOM application. It utilizes fewer components while achieving the maximum voltage levels with higher reliability. However, as a reactive power compensator, its dc-link consists of flying capacitors, whose voltages must be balanced which presents a challenging problem for a seven-level packed U-Cell inverter, as there are no-redundant switching states. This paper proposes a novel control scheme to keep these flying capacitors balanced under normal/abnormal grid conditions. It consists of a standard cascaded: inner and outer controllers. The inner current controller regulates both the active and reactive currents and the outer controller regulates the upper flying capacitor voltage. In parallel with the cascaded controllers, a novel model predictive voltage balancing controller is proposed to maintain the lower flying capacitor voltage at a given setpoint. To cope with the unbalance grid conditions, an additional zero-sequence injection regulator is also integrated into the designed control scheme. The proposed control scheme was simulated and real-time tested on the Hardware-In-the-Loop system. The results show that the proposed controller effectively balances the two flying capacitor voltages while controlling the reactive power. [ABSTRACT FROM AUTHOR]

This paper proposes a five level cascaded converter for Distribution Static Compensator (DSTATCOM) implementing a novel modulation algorithm with harmonic mitigation and a PI controller with phase shift modulation for reactive power control. The modulator operates at fundamental frequency and the whole system satisfies grid code requirements using a simple passive output filter tuned with 11th harmonic. The behavior of the proposed system has been successfully compared with another one with multilevel space vector pulse width modulation. Results show its capability of ensuring satisfactory dynamic response at low frequency operations, resulting improved efficiency and reduced output filter requirements over more conventional systems. [ABSTRACT FROM AUTHOR]