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In this paper, the results of a 2.88-MW solid-state long-pulse modulator, which has been designed for the new linear collider at the european spallation source in Lund, are summarized. The presented modulator generates an output voltage pulse of 115 kV with a pulselength of 3.5 ms. The main components of the modular system, which include a series–parallel resonance converter, a high-voltage high-frequency transformer, and an output rectifier, are discussed. The modulator design is verified by measurements performed with a full-scale prototype, which is operated under nominal load conditions. A detailed output voltage ripple evaluation is given, and in addition, the system design has been proven by a 7- and 2/3-h heat run test. All specifications are well within the given limits, and the maximum occurring temperatures in the transformer stay below 110 °C even under worst case assumptions. The system achieves a pulse efficiency (determined by the pulse shape) of 96.78%, an overall electrical system efficiency of 91.9%, and a combined pulse system efficiency of 89%. [ABSTRACT FROM AUTHOR]

This paper presents the design of an ultraprecise 127-MW/3- \mu \textrm s solid-state modulator with split-core transformer. The modulator consists of a power supply, 12 pulse generator modules with active core reset, and a split-core transformer with six cores. In addition, an $LC$ bouncer could be used to compensate the droop of the pulse. This paper includes the design and analysis of the pulse transformer. A volume minimal transformer is investigated for different load capacitances to investigate the achievable rise time and the parameters which can be used to adjust the damping. In addition, the influence of the pulse transformer on the synchronization of the switches is investigated using an enhanced reluctance model. In addition, an $LC$ bouncer circuit is investigated. A multiobjective optimization is performed which shows the required energy of the bouncer for a certain pulse ripple. The flat-top ripple of the presented modulator can be reduced to 0.2%. Because the bouncer degrades the flat-top stability, the bouncer is not implemented. Measurements of the overall system include short-circuit measurements and flat-top stability measurements. They show that the modulator is short-circuit capable. Furthermore, the flat-top stability is determined to be less than 10 ppm at an output voltage of 360 kV. [ABSTRACT FROM PUBLISHER]

Modern accelerator driven experiments like linear colliders or spallation sources are supplied by RF amplifiers using klystrons. The cathode voltage for these klystrons can be generated by long pulse modulators generating highly accurate voltage pulses in the length of milliseconds. Conventional designs using pulse transformers become huge for long pulses. The series-parallel resonant converter (SPRC) topology avoids this drawback as the transformer is operating at high frequencies. This paper presents a comprehensive design approach for SPRC modules, which is based on an optimization procedure containing an electrical model of the resonant circuit and a thermal model of the semiconductors. In addition, an insulation and a leakage design procedure and a thermal model of the transformer are also presented. Finally, this procedure provides the optimal design parameters of the resonant circuit elements. With these parameters, a global optimizer chooses the optimum amount of modules connected in series and/or in parallel to fulfill the given restrictions. The efficiency of a basic SPRC-module is 94.7% with a pulsed power density of 4.63 kW/l. [ABSTRACT FROM PUBLISHER]

In this paper, a procedure for optimal transformer design with a variable set of constraints for pulse transformers with a pulse range of 3–140 \mus is presented. During the optimization procedure, the pulse shape is analyzed in the time domain, ensuring that the pulse constraints, such as rise time and overshoot are met. For accurate prediction of the pulse shape, analytical approaches are proposed to estimate the distributed capacitance and leakage inductance of the transformer. The analytical approach is verified by 2-D-FEM simulations and measurements. The optimization procedure considers pulse, core, winding, demagnetization losses, and losses of the primary switches. First, the procedure is applied to an existing pulse transformer with specifications for SwissFEL. An improvement of 16.6% in conversion efficiency is achieved in comparison with the existing design. In a second step, the procedure is applied to specifications of the compact linear collider, which demands high conversion efficiency. The resulting optimal transformer consists of three cores with five primary turns and requires a tank volume of 0.915 m^3. In an optimal configuration, an overall conversion efficiency of 97.7% is achieved for the considered system including pulse losses. [ABSTRACT FROM AUTHOR]

Solid-state modulators based on pulse transformers offer the advantage that, with the turns ratio of the transformer, the primary voltage could ideally be adapted to available switch technology, and a series connection of switches could be avoided. To increase the power level, several semiconductor switches must be connected in parallel, and a balancing between the different switches must be guaranteed. Here, the matrix transformer concept, which is based on multiple primary and/or secondary windings, as well as flux adding, offers superior performance with respect to the achievable rise times. However, the influence of the parasitic elements on the voltage and current distribution is quite involved. In this paper, the influence of the parasitic elements of the matrix transformer on the current balancing and on the winding voltages is investigated based on reluctance models. Additionally, the inherent current balancing of the matrix transformer for windings mounted on different cores is explained. Furthermore, the influence of parasitic load/transformer capacitances on the turnoff transient is discussed in detail. [ABSTRACT FROM PUBLISHER]

In many pulsed-power applications, the flatness of the output pulse is an important characteristic to enable proper system operation, whereas a pulse flatness within less than a few percent has to be achieved. In power modulators based on capacitor discharge, this voltage droop is mainly defined by the input capacitance. In order to overcome this problem, in power modulator systems, compensation circuits are added, whereby in spite of a smaller storage capacitor, a flat pulse top is achieved. Depending on the pulse duration, different approaches for voltage droop compensation exist. For short pulse durations, in the range of several microseconds, only passive solutions or bouncer circuits are applicable. In this paper, the design and optimization of a two-winding inductor bouncer circuit are presented in order to achieve an output voltage droop of less than 1%. Due to the realized galvanic isolation, a new degree of freedom is obtained, which allows an adaptation of the bouncer circuit's voltage and current ratings to standard semiconductor switches. With an optimal design of the two-winding inductor bouncer circuit for the existing system, the volume of the input capacitor is reduced by a factor of 10.5, and the stored energy is decreased by a factor of 24 compared to a system without a bouncer circuit. [ABSTRACT FROM PUBLISHER]

A design and optimization procedure for high-voltage pulse transformers is presented. The procedure is enhanced by the integration of core loss measurements under pulsed excitation, by electrical peak field calculations and by checking of the isolation distances, which are compared to scaled high-voltage breakdown data. The procedure is applied with specifications of the compact linear collider, and the sensitivity of system parameters such as the number of primary turns, core material, transformer oil, and high-voltage cable length is investigated by comparing their Pareto fronts. With amorphous core material, the highest efficiency is achieved. Replacing mineral oil by natural ester results in an efficiency reduction of 0.5%, and an increase in HV cable length from 1.5 to 5 m reduces the efficiency by 0.6%. Finally, the optimized transformer’s pulse shape is investigated over the entire load range. [ABSTRACT FROM PUBLISHER]