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This work introduces a new passive filter structure for a pulse width modulated inverter used in standalone applications. The proposed structure consists of an additional capacitor connected across the resistance-capacitance branch of the traditional LCR filter and an additional resistor connected across the trap filter capacitor in the traditional (LC)trap-LCR filter configuration which helps to reduce damping power loss and increase harmonic attenuation while maintaining the same overall filter size of conventional filters. A comprehensive parameter design procedure of the proposed filter is introduced which considers inverter switching frequency and choice of damping components. Further, particle swarm optimisation algorithm is newly employed in this work to minimise resonant peaking on the premise of allowable values of overall filter inductance, capacitance and resistance. Simulation and experimental results are presented to analyse the performance of the proposed filter and a comparison is established with other passive filter topologies. A five-level inverter with the proposed filter is implemented using a SPARTAN- 6 XC6SLX25 processor on an experimental set-up. The experimental results show an attractive performance of the proposed filter in providing improved inverter output waveforms, significant harmonic reduction in the high-frequency band, reduced resonant peaking, lesser harmonic distortion and lower damping power loss. [ABSTRACT FROM AUTHOR]

Recently, multilevel inverters are more researched due to the advantages they offer over conventional voltage source inverters in grid connected applications. Passive filters are connected at the output of these inverters to produce sinusoidal waveforms with reduced harmonics and to satisfy grid interconnection standard requirements. This work proposes a new passive filter topology for a pulse width modulated five-level cascaded inverter interfaced grid connected system. The proposed passive filter inserts an additional resistance-capacitance branch in parallel to the filter capacitor of the traditional inductive-capacitive-inductive filter in addition to a resistance in series with it to reduce damping power loss. It can attenuate the switching frequency harmonic current components much better than the traditional filter while maintaining the same overall inductance, reduced capacitance and resistance values. The basic parameter design procedure and an approach to discover the parameters of the proposed filter is introduced. Further, a novel methodology using Particle Swarm Optimization (PSO) is recommended to guarantee minimum damping loss while ensuring reduced peak during resonance. In addition, PSO algorithm is newly employed in this work to maximize harmonic attenuation in and around the switching frequency on the premise of allowable values of filter inductance and capacitance. A comparative discussion considering traditional passive filters and the proposed filter is presented and evaluated through experiments conducted on a 110 V, 1 kW five-level grid connected inverter. The modulation algorithm for the multilevel inverter is implemented using a SPARTAN 6-XC6SLX25 Field Programmable Gate Array (FPGA) processor. The analysis shows that the proposed filter not only provides decreased damping power loss but also is capable of providing considerable harmonic ripple reduction in the high frequency band, improved output waveforms and lesser Total Harmonic Distortion (THD) with improved power quality for the multilevel inverter based grid connected system. [ABSTRACT FROM AUTHOR]