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A novel carrier-based discontinuous pulsewidth modulation (CB_DPWM) strategy for T-type three-level converter is proposed in this article. Because one significant advantage of the proposed CB_DPWM is the reduction of common mode voltage (CMV), it is named as RCMV_CB_DPWM hereafter. It also can reduce switching loss and remove dc offset from the neutral point voltage (NPV) simultaneously. RCMV_CB_DPWM has two design freedoms, one is modulation wave and the other is carrier wave. By injecting zero sequence voltage properly, the corresponding clamping mode can be acquired. Moreover, reduced CMV can be achieved by arranging carrier wave flexibly. The integrity of RCMV_CB_DPWM is analyzed as well as its NPV self-equilibrium ability, and an active NPV control method is then introduced. Moreover, its realization is discussed briefly. Finally, the experiments are carried out to verify the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

This paper briefly reviews the common-mode voltage (CMV) and neutral point (NP) voltage for neutral point clamped three-level inverter (NPC TLI). Then, the space vector pulsewidth modulation (SVPWM) and traditional virtual SVPWM (VSVPWM) are discussed in terms of these two issues, revealing the drawbacks in reducing CMV or eliminating NP voltage oscillation. A novel virtual space vector modulation, named as RCMV_VSVPWM, is proposed in this paper to reduce CMV and eliminate NP voltage oscillation for NPC TLI. By selecting vectors with lower CMVs, a set of novel virtual voltage vectors are generated. The highlight of the method is zero average NP current in one control cycle and lower CMV. Furthermore, the active NP voltage control suitable for RCMV_VSVPWM is presented and evaluated. The corresponding experimental results are given, which are well-consistent with theoretical analysis. [ABSTRACT FROM AUTHOR]

According to different clamping methods, nine modes (C_MODE1-9) of the traditional discontinuous pulsewidth modulation (DPWM) for neutral-point-clamped three-level converter have been revealed. Since traditional DPWM cannot balance neutral point (NP) voltage under the full range of modulation index (MI) and power factor (PF), two extended modes (E _MODEs) are proposed in this paper, which can balance NP voltage. The proposed extended discontinuous pulsewidth modulation (EDPWM) is characterized by using C_MODEs and E_MODEs alternately.Therefore, EDPWM can balance NP voltage under the full range of MI and PF. Since the switching numbers under C_MODE and E_MODE in one switching cycle are two and three, respectively, the switching loss under EDPWM is lower than that under other pulsewidth modulation (PWM) strategies. The performance of EDPWM is analyzed and compared with traditional DPWM, space vector PWM (SVPWM) and virtual SVPWM (VSVPWM) in terms of switching loss, waveform quality, and the ability of NP voltage control. Finally, the feasibility and superiority of the proposed method are verified by experiments. [ABSTRACT FROM AUTHOR]

In order to reduce switching loss of neutral point clamped three-level inverter (NPC TLI), generally discontinuous pulsewidth modulation (DPWM) is used. But it can result in dc offset and ac ripple on neutral point (NP) voltage. So a novel pulse sequence DPWM (NPSDPWM) is proposed to reduce switching loss and control NP voltage simultaneously in this paper. NP voltage is controlled by choosing proper clamping modes. To avoid unexpected switching action during changing clamping mode, an improved pulse sequence is also presented. The switching loss and NP voltage ripple of NPSDPWM, traditional and proposed DPWM in previous literature are compared, respectively. The experimental results show that NPSDPWM has well NP voltage control ability and the switching losses are reduced effectively. [ABSTRACT FROM AUTHOR]

In this paper, a novel discontinuous pulsewidth modulation (DPWM) modulation strategy for a neutral-point-clamped (NPC) three-level converter (TLC) is proposed to reduce the switching loss, reduce common-mode voltage (CMV), and remove dc offset from the neutral-point (NP) voltage simultaneously, which is named as RCMV_DPWM. Based on the space vector diagram with reduced CMV, all clamping modes under RCMV_DPWM are revealed. Then, the NP voltage is controlled by selecting proper clamping mode. The realization of RCMV_DPWM is also discussed. Moreover, the performances of RCMV_DPWM are analyzed and compared with other PWM strategies in term of the NP voltage ripple, switching loss, and waveform quality. Finally, the feasibility and superiority of RCMV_DPWM are verified by experiments. [ABSTRACT FROM AUTHOR]

The parallel three-phase grid-connected converters sharing dc and ac bus can increase the system power level effectively. However, the zero sequence circulating current (ZSCC) will occur inevitably under space vector pulse width modulation or discontinuous pulse width modulation (DPWM). In this paper, the mechanism and the mathematical model of ZSCC are studied. Then, a hybrid PWM (HPWM) strategy is proposed to suppress the ZSCC based on the same zero sequence voltage injected, which is dependent on the common grid information. The dc voltage utilization of HPWM can be extended compared with sinusoidal PWM (SPWM). The number of parallel modules can be infinity theoretically by using HPWM. It is noted that there is no internal commutation among modules (expect the dq current reference). Finally, the feasibility and the effectiveness of the proposed method are verified by experiments. [ABSTRACT FROM AUTHOR]

In this letter, space vector pulse width modulation (SVPWM) and virtual SVPWM (VSVPWM) for the neutral-point-clamped (NPC) three-level inverter (TLI) are reviewed briefly. The relationship between VSVPWM and carrier-based PWM is revealed based on the PWM model of TLI with NP current equation. Then, carrier-based VSVPWM (CB_VSVPWM) is proposed. The CB_VSVPWM is implemented by comparing double modulation waves with a single carrier, and the two modulation waves for each phase are deduced. The CB_VSVPWM can simplify the implementation of VSVPWM to a great extent. Moreover, comparisons between SVPWM and CB_VSVPWM are provided in detail. At last, the simple method proposed in this letter is verified by experiments. [ABSTRACT FROM AUTHOR]

This paper briefly reviews virtual space vector pulse width modulation (VSVPWM) for the diode-clamped multilevel inverter (DCMLI). Based on the universal modulation model of the DCMLI with N-level, a modulation strategy named as full range capacitor voltage balance PWM (FRCVBPWM) is proposed, which has similar capacitor voltage balance characteristics as VSVPWM. The characteristic of FRCVBPWM is that there are respectively zero, N − 1 and N − 2 switching actions for the three phases of the DCMLI. Therefore, the total switching actions are greatly decreased compared with VSVPWM. The switching loss comparison between FRCVBPWM and VSVPWM is conducted by comprehensive simulations. Finally, the feasibility and superiority of FRCVBPWM over VSVPWM is verified by experiments. [ABSTRACT FROM AUTHOR]