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High current qualities and high efficiencies are always two important characteristics for power converters. However, it is challenging to achieve the two targets simultaneously. In this paper, the dead‐time‐effect elimination pulse‐width‐modulation (PWM) for improving current qualities and the discontinuous PWM (DPWM) for reducing switching losses are combined, proposing a double‐modulation‐wave DPWM. An additional modulation wave is added, whose amplitude is adjusted according to the current polarity. By utilizing the added drive pulses in the current freewheeling stage, the proposed double‐modulation‐wave DPWM successfully reduces the dependence on the current polarities. The overmodulation phenomenon brought by the added modulation wave is analysed, which is proved to be negligible for achieving the maximum modulation index of 1.15. Finally, the effectiveness of the proposed double‐modulation‐wave DPWM is experimentally verified at a switching frequency of 40 kHz. [ABSTRACT FROM AUTHOR]

In a three-phase three-level grid-connected inverter, the ac output current ripple actually fluctuates four times per switching period with each fluctuation generating some core loss. However, only the two larger fluctuations are considered in most loss estimation methods, resulting in a smaller core loss evaluation. In this letter, an alternative method has, hence, been proposed, beginning with the deduction of fundamental and ripple equivalent circuits from the inverter. These circuits permit current ripple to be calculated, from which its four fluctuations are all considered for forming the dual current-ripple envelopes (DCREs). These DCREs, together with the fundamental current and a selected core loss model, can then be solved to give the estimated fundamental and ripple core loss values. The nonlinear characteristic of the filter inductor has also been considered in the calculation of the DCREs and the core loss. The estimated values have eventually been verified through testing with a 10-kW three-phase T-type three-level grid-connected inverter. [ABSTRACT FROM AUTHOR]

The dead-time elimination pulsewidth modulation (PWM) enables the drive pulses of the upper and the lower switching devices to alternate according to the current polarity, thus abandoning the dead time and essentially avoiding the dead-time effect in power converters. However, the current zero crossing will be distorted by the current jump generated by the drive-pulse alternation, and the current zero-crossing distortion will be further intensified if errors exist in the detected current polarity. Thanks to the noise-attenuation and frequency-adaptability characteristics of the double second-order generalized integrator frequency-locked loop (DSOGI-FLL), it can obtain accurate current polarities even in harmonic and unbalanced conditions. A DSOGI-FLL-based dead-time elimination PWM is, therefore, proposed in this paper, and several improvements are made to minimize the current zero-crossing distortion. An underlap period is added when alternating the upper and lower drive pulses to smooth the current jump at zero crossing, and a delay compensation term is inserted in the DSOGI-FLL to compensate both the current measurement delay and the control delay. The effectiveness of the proposed DSOGI-FLL-based dead-time elimination PWM has been validated by experiments, respectively, in the unbalanced-current, power-change, and frequency-variation conditions with an RL load, as well as in a grid-connected converter. [ABSTRACT FROM AUTHOR]