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This paper presents a highly linear optically reconfigurable microwave switch with high power handling ability. A silicon superstrate with bottom illumination is employed. A transparent substrate is used and two different microstrip gap distances are characterized by two-tone nonlinearity measurement with different tone spacings and optical powers. A maximum third order intercept point referred to input power of +78.5dBm has been obtained and the maximum microwave power tested was over 30W per tone close to 2 GHz. Thermal imaging has been used to observe the device hot-spots as a function of RF power.

The design and measurements of a fabricated novel digitally programmable wideband power amplifier (PA) are presented. The PA is made suitable for use in all communication standards, including GSM, 3G, LTE and Femto-cells, offering a bandwidth of several octaves covering presently 300 MHz to 3.5 GHz. It meets power, efficiency and linearity specifications. The amplifier showed excellent performances. The uniquely linear and high power SONY GaAs J-PHEMT process along with novel output-stage multiple cascode topology structure are discussed. This enabled a distinctive larger output impedance and power and low voltage operation. The output stage offered 15–20 dB of gain without a driver. The circuit requires only little output or input matching for gain or impedance, depending on the application. In order to obtain higher gain and optimal application specific performance, a driver stage was added on the same die. A digitally programmable tuning chip was incorporated to the solution to optimize the performance for large bandwidths exceeding 40%. For smaller bandwidths no digital tuning was required. Digital pre-distortion algorithm was tested for better linearization. To the best knowledge of the authors, this is the first comprehensive plug-and-play solution for multi-band and multi-mode handset transmitters with the single chip one PA.

Increased network capacity and transmission speed has driven the development of many different wireless standards. Radio Frequency (RF) Technology has also been improving with the changing wireless standards. Such developments demand high linearity and power added efficiency from the RF Power Amplifier (RFPA). 5th Generation wireless standard (5G) is the next generation standard for mobile telecommunications. In this paper we consider a waveform obtained using Filter Bank Multi-carrier (FBMC) modulation, one of possible candidates for 5G, and investigate its impact with respect to RFPA behavioural modelling parameters. The measurement has been carried out using 30 MHz to 2000 MHz, 25 W GaN wideband power amplifier. Measurement has also been performed in the presence Orthogonal Frequency Division Multiplexing (OFDM) RF signals at the input of the power amplifier. And the result is analysed in terms of crest factor, non-linear order, memory depth and Adjacent Channel Leakage Ratio (ACLR) improvement.

A methodology for the design of multichannel, wideband, highly efficient hybrid Class-J power amplifiers for fourth-generation (4G) communication transmitters is proposed. The design procedure is based on the automatic generation and evaluation of a vast number of output matching networks of the same topology but different dimensions, with respect to efficiency, output power, and linearity. The approach can find application in the management of the efficiency/linearity/bandwidth tradeoff in amplifier design. In this paper, two matching network architectures have been considered. One multistubbed network and a stepped-impedance microstrip line network. The approach has been validated through the design, simulation, and measurement of two power amplifiers realized using the aforementioned procedure. The first amplifier covers 1.6-2.2 GHz (31.6% fractional bandwidth) with 55%-68% drain efficiency at the 2-dB compression point and worst case adjacent channel power ratio (ACRP) and error vector magnitude (EVM) of - 21.8 dBc and 8.35%, respectively, over the bandwidth. The second covers 0.5-1.8 GHz (113% fractional bandwidth) with 50%-69% drain efficiency at the 2-dB compression point and worst case ACRP of - 27.5 dBc and EVM of 4.22%. Both amplifiers are based on a commercial, packaged 10-W GaN HEMT transistor.

Linearizing power amplifiers (PA) using digital pre-distortion (DPD) results in the use of a pre-distorted driving input signal that exhibits higher peak-to-average power ratio (PAPR). This results in a decrease in the PA efficiency which is dependent on the level of output power back-off required. This work proposes a new linearization architecture based on a new “post-distortion” method for power amplifier (PA) nonlinearity compensation. The proposed architecture allows for PA linearization with optimal input signal drive level to avoid efficiency degradation. A pseudomorphic high electron-mobility transistor (pHEMT) dual input PA architecture is also introduced and shown to be suitable for the proposed linearization approach. In comparison to classic pre-distortion techniques, the proposed post-distortion improves the output power by 2 dB and the drain efficiency by 9% in the presence of a 20MHz LTE up-link signal.

An original measurement system for nonlinear RF power amplifier characterization is presented. This new setup enables AM-AM and AM-PM measurements using one six-port reflectometer as a traveling wave ratio calculator. Experimental results of a commercial power amplifier at 2 GHz are presented and compared to those performed using a vector network analyzer.

In this paper, a high efficiency GaN based power amplifier is designed using multi-harmonics load pull measurements. A load matching network that independently controls the load impedance at the fundamental, second and third harmonic frequencies is used for straightforward implementation. The continuously driven single-ended deep class AB biased power amplifier achieves a peak power added efficiency of 68% at saturation. It is found that the designed power amplifier exhibit highly non linear characteristics with 7 dB gain compression at saturation. Digital predistortion based linearizer is used to improve the linearity performance of the power amplifier under a WCDMA excitation (PAPR=9.8 dB). At a 10 dB output power back-off, 21% power added efficiency was measured along with 53 dBc adjacent channel leakage ratio.

A dedicated inverse Doherty amplifier is presented in this paper using commercially available 10W GaN HEMT devices. Results show that an emulated 1W peaking amplifier and a 10W carrier amplifier can be used to create a highly efficient amplification architecture. Ideal inverse active load-pull is introduced theoretically with experimental results showing good agreement with the theory. A generic characterization scan of the inverse Doherty amplifier yields state of the art drain and power added efficiency in the output power back-off. A drain and power added efficiency of 60% and 50% are obtained at 10dB output power back-off respectively with a maximum output power of 41dBm at 2.1GHz.