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This paper presents a 132–140 GHz power amplifier (PA) array in 0.13‐µm SiGe BiCMOS technology. The four dielectric‐loaded end‐fire antennas are integrated with the PA array on chip. With the absence of the lossy power combining networks at the output, the presented PA array achieves a measured maximal effective isotropic radiated power of 29.7 dBm. The array size is only 6.14 × 2.49 mm2 and consumes 5.16 W from a single 4 V DC supply. [ABSTRACT FROM AUTHOR]

This paper presents the detailed design and demonstration of a Ka-band single-chip transmit (TX)/receive (RX) front-end in 0.13- \mu \textm SiGe BiCMOS technology. The front-end includes single-pole double-throw (SPDT) switches, low-noise amplifier, loss compensation amplifiers (LCAs), phase shifter, and power amplifier. Distributed structures are utilized in gain amplifiers to ensure broadband performance while stacked structure is adopted in power amplifier to deliver high output power in the TX mode. A 5-b phase shifter with design strategies for low rms phase/gain errors serves as the common leg of the RX and TX paths. In the RX mode, measurements show a gain of 17 dB, an output P\mathrm { {-1~dB}} of −1 dBm, an rms phase error less than 4°, and an rms gain error less than 0.6 dB with 0.528-W dc power from 30 to 40 GHz. In the TX mode, measurements show a gain of 14 dB, an output P\mathrm { {-1~dB}} of 20.5 dBm, an rms phase error less than 3.7°, and an rms gain error less than 0.55 dB with 1.587-W dc power from 30 to 40 GHz. The whole front-end occupies $3.2 \times 2.2$ mm2 including the testing pads. By choosing inductors and capacitors with reasonable values, designing a well-matched SPDT switch with high isolation, and optimum ordering of phase shift cells and LCAs in the phase shifter design, this TX/RX front-end achieves excellent rms phase/gain error performance without any trimming in a system-level measurement at Ka-band. [ABSTRACT FROM AUTHOR]

This paper presents the design of an X-band phased-array transceiver core chip in 0.13-\mu\m SiGe BiCMOS technology. The system is based on the all-RF architecture and contains switches, low-noise amplifier (LNA), power amplifier (PA), and the common leg 5-bit phase shifter with loss compensation amplifiers. A distributed structure is used in the gain amplifiers design to ease the multi-stage gain roll-off in the transmit (TX)/receive (RX) paths. A distributed LNA is utilized in the RX path to achieve broadband amplification with acceptable noise figure (NF) while a stacked PA is utilized in the TX path to get high output power. In the RX mode, the receiver demonstrates a gain of > \25 dB, an average NF of 3 dB, an output P -1~dB of 6 dBm, a root mean square (rms) phase error less than 3.8^\circ and an rms gain error less than 1.2 dB from 9 to 11 GHz; while dissipating 352-mW dc power. In the TX mode, the transmitter demonstrates a gain of > \22 dB, an output P -1~dB of 28 dBm, an rms phase error less than 3^\circ, and an rms gain error less than 0.6 dB from 9 to 11 GHz; while dissipating 4.128-W dc power. The whole transceiver occupies 5.2\,\times\,3 \mm^2 chip area including the testing pads. [ABSTRACT FROM PUBLISHER]

A 340-GHz on-chip antenna (OCA) with high-gain and high-radiation efficiency is designed using a standard 0.13\-\upmu m SiGe BiCMOS technology without any postprocesses. In the proposed OCA structure, a rectangular slot loop is etched in the upper wall of a substrate integrated waveguide (SIW) to form a magnetic current loop radiator. The SIW structure forms a back cavity to suppress the surface waves and separate the radiation aperture from the low-resistivity substrate. Furthermore, the side wall of the SIW cavity and the edge of the slot form a ${{{\lambda }}_{{g}}}/4$ resonator to reflect the power back to the slot loop. As a result, the radiation efficiency is improved. By etching a slot properly in the SIW upper wall, another resonating point is constructed and hence, the bandwidth is broadened. Single antenna element and a {2} \times {2} array are both designed and fabricated with- and without- the slot structure; a maximum gain of 7.9 dBi with the radiation efficiency of 48% at 340 GHz is achieved for the proposed SIW cavity-backed antenna structure. [ABSTRACT FROM PUBLISHER]