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This work presents a capacitive modulator design and modeling of a new waveguide architecture using silicon and poly-si technologies. We use a methodology involving the entire lumped-type modulator design process, from the optical design to the small-signal RF analysis. By means of geometric and physical parameters adjustments, the trade-offs among several figures of merit are analyzed in this paper. Due to the waveguide configuration, it is shown that the modulator can improve the trade-off between $V_{\pi }$ and bandwidth compared to the state-of-the-art for this kind of device. For instance, the best combinations are $V_{\pi }\simeq$ 1 V @ 20.4 GHz and $V_{\pi }$ = 5.7 V @ $\sim$ 31 GHz, with equivalent optical losses of 3 dB and 1.1 dB, respectively.

We propose and demonstrate a polarization splitter and rotator (PSR) operating in the range of 1530–1590 nm, built on the SOI platform and based on a new bow tie converter TM0-to-TE1. Comparing with other compact (

This paper presents a capacitive modulator design and modeling using poly-si and silicon technologies. We propose a methodology involving the entire modulator design process, from the optical design, charge distribution calculation and small-signal RF analysis. Thus, in the case of silicon photonics modulators, the paper proposes means to optimize the trade-offs among several figures of merit. It is shown that high bandwidth operation (>30 GHz) can be achieved by sacrificing a little the modulation efficiency. info:eu-repo/semantics/publishedVersion

In this work, we experimentally demonstrate a single-drive push-pull Silicon Mach-Zehnder modulator with more than 48 GHz modulation bandwidth and V Π L ≈ 2.3 V.cm, compatible with standard Silicon-on-Insulator (SOI) process. The modulator also presents S 11 < −15 dB up to 50 GHz.

In this work, we present a design for a high-bandwidth (> 40 GHz) O-band Silicon Mach-Zehnder modulator using a lateral junction and compare it with an interleaved junction in terms of efficiency, loss and bandwidth.

We present the concept and design of a hybrid integrated widely tunable III-V-on-silicon ring laser with 80 nm tuning range by means of theoretical investigation. Laser spontaneous emission is provided by two gain chips, one for the C band and the other for the L band. Gain chip sections are duplexed into the silicon photonic passive cavity using a lattice filter. Wavelength tunability is proposed using the Vernier effect between two ring resonators incorporated in the silicon photonic cavity. We present numerical results of modeled laser cavity using a time-domain circuit simulator optimizing the choice of the output mirror reflectivity. The simulated performance shows a waveguide output power up to 65 mW and a high SMSR (> 45 dB) over the entire wavelength range. Linewidth calculations show feasibility for high-order modulation formats.

We present the design of a carrier depletion silicon modulator with series push-pull diode configuration and slow-wave transmission line for the 1550 nm wavelength range. The electro-optical bandwidth is 40 GHz at −2.5 V diode bias and 35 Ω termination resistance in a 3.15 mm long device. The modulation efficiency V π L π is 2.2 V.cm and optical loss is 12.8 dB/cm for the same bias. The steps in the design process are detailed and simulation results are presented.

Silicon photonics has been widely researched as a potential technology for the next generation of optical devices due to its high integration capabilities. After presenting the first Brazilian high speed integrated 100G-DPQPSK transmitter, this paper brings the design and characterization of a compact integrated silicon coherent receiver, with a footprint of are 4.5 mm x 1 mm. The characterization was performed with 112 Gb/s DP-QPSK modulation resulting in an estimated BER of 5.46 x10 -7 .