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Band-to-band tunneling was studied in ion-implanted P/N junction diodes with profiles representative of present and future silicon complementary metal-oxide-silicon (CMOS) field effect transistors. Measurements were done over a wide range of temperatures and implant parameters. Profile parameters were derived from analysis of capacitance versus voltage characteristics, and compared to secondary-ion mass spectroscopy analysis. When the tunneling current was plotted against the effective tunneling distance (tunneling distance corrected for band curvature) a quasi-universal exponential reduction of tunneling current versus, tunneling distance was found with an attenuation length of 0.38 nm, corresponding to a tunneling effective mass of 0.29 times the free electron mass (m 0), and an extrapolated tunneling current at zero tunnel distance of 5.3× 10 7 A/cm² at 300 K. These results are directly applicable for predicting drain to substrate currents in CMOS transistors on bulk silicon, and body currents in CMOS transistors in silicon-on-insulator. [ABSTRACT FROM AUTHOR]

The electrical characteristics of a heterojunction tunneling field-effect transistor (HETT), with a p-type \Si0.75\Ge0.25 source, have been measured as a function of strain. HETTs with channel transport and applied strain both in the [110] direction show a smooth monotonic change in drain current over a range of 0.09% compressive to 0.13% tensile strain. A measure \gamma = (d/d\ln JD)(d\ln JD/ds)\verts = 0 of the effect of strain s on tunneling current JD is proposed, which captures the dependence of the tunneling exponential argument on strain. An experimental value of \gamma = - \11.7 is extracted for the tensile case and compared to simulation results. We found theoretically that the value and sign of \gamma depend sensitively on the built-in strain at the Si–SiGe interface. [ABSTRACT FROM AUTHOR]

The article reports that the excellent electrical properties of single-walled carbon nanotubes (SWCNT) make them the most promising candidate for creating transistors on a scale smaller than can be achieved with silicon. A field-effect transistor (FET), which is the basic component of present computer circuitry, has been demonstrated based on individual SWCNTs. This achievement would demonstrate that SWCNTs can be used as a basis for electronics, similar to the way silicon wafers are currently used. A ring oscillator is the ultimate test for new materials in high-frequency ac applications and for evaluating their compatibility with conventional circuit architectures. In a CMOS inverter, both an n-type FET and a p-type FET are needed to realize a basic logic function. An extra inverter stage, which eliminates interference between the measurement setup and the oscillator operation, follows the ring oscillator portion to allow for the signal to be read by a spectrum analyzer.