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The thermal expansion coefficient mismatch between GaN and SiC is lower than between GaN and Si. However it is usually observed that GaN on SiC/Si templates has higher tensile stress than GaN directly on Si. To provide an insight into the relationship between SiC template residual stress and GaN overlayer residual stress and crystal quality, we have analyzed the in-plane residual stress gradient present in GaN/SiC microstructure arrays of various dimensions and shapes using micro-Raman spectroscopy. It was found that the GaN overlayer residual stress is directly proportional to the SiC buffer layer residual stress. GaN films with lower residual stress also resulted in GaN films with improved crystal quality. Our study shows that the frequently encountered problems of high tensile stress in GaN films deposited on SiC templates is due to the high tensile residual stress in the SiC layers. The poorer GaN crystal quality deposited on SiC templates reported in literature is also likely due to the high tensile stress in the SiC templates. In order to grow GaN films with sufficient compressive stress and crystal quality for subsequent device processing, it is crucial to reduce the high tensile stress present in the SiC templates. [ABSTRACT FROM AUTHOR]

In recent years, different power transistors have been developed in silicon carbide (SiC) and gallium nitride (GaN) as replacements for silicon based IGBTs. This paper presents a simulation comparison of the static and dynamic performance of silicon IGBTs with different SiC and GaN based lateral and vertical power transistors (HEMT, MOSFET and IGBT) with breakdown voltage ratings between 1.2 kV to 15 kV. The strengths and weaknesses of different technologies which make them suitable at different voltage levels have been discussed. [ABSTRACT FROM AUTHOR]

A new approach is proposed to the synthesis of a semipolar GaN on a Si(100) substrate at the surface of which the V‐shaped nanostructures with the characteristic size of elements as low as 100 nm are formed. It has been demonstrated that application of buffer layers of 3C‐SiC and AlN enables formation of the GaN(10–11) layer characterized by the full width at half maximum value as low as ωθ ≈45 arcmin for the X‐ray diffraction rocking curve. The model based on anisotropic nucleation of AlN on the V‐shaped nanostructure is proposed to explain the growth of the GaN layer in a single semipolar direction. In this article, Bessolov et al. focus on the growth of the GaN layer in a semipolar direction by heteroepitaxy of the GaN layer on nano‐patterned Si(100) substrate with V‐shaped nano‐grooves arranged with the period as low as 100 nm, combined with the synthesis of a nano‐sized SiC layer formed by solid‐phase substitution of silicon atoms by carbon atoms. [ABSTRACT FROM AUTHOR]

GaN-on-Si transistors attract increasing interest for power applications. However, the breakdown behavior of such devices remains below theoretical expectations, for which the Si substrate is typically made responsible. In this work, the effect of the thickness of an aluminum nitride buffer layer on the vertical breakdown voltage, measured relative to a grounded silicon substrate, has been investigated. A voltage-polarity-dependent breakdown mechanism has been observed. It has been found that the breakdown in the positive bias voltage regime is initiated by carrier injection, for which the carriers originate from an inversion channel formed between the epitaxial layers and the p-silicon substrate. TCAD simulations have confirmed the proposed explanations, and suggest that appropriate modification of the electronic structure at the AlN/silicon interface could significantly improve the vertical breakdown voltage. [ABSTRACT FROM AUTHOR]