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Maximizing the efficiency and power density of dc–dc converters demands parallel optimizations in design and control, especially for variable-frequency converters operating over wide frequency ranges. This letter presents the full-scale optimization of a kilowatt-range megahertz-class boost converter based on the impulse rectification. To maximize the heat extraction from the converter and increase its power density, the entire power stage is implemented on a single-layer insulated-metal substrate. For high efficiencies over wide frequency ranges, high-performance gallium nitride transistors are employed and various high-frequency materials (MnZn, NiZn, and air) with different geometries are compared to realize a wide-bandwidth inductor. Silicon carbide Schottky diodes with a zero reverse recovery are utilized for efficient high-frequency rectification, and the impact of the device's current rating on its generated reactive power and the overall system efficiency are investigated at different power levels up to 1 kW. The proposed optimum duty cycle control maximizes the conversion efficiency at different gains and powers and prevents fatal device hard switching at high frequencies. The optimized converter enables a peak efficiency of 98.6% along with an ultrahigh power density of 52 kW/l (850 W/in3). A loss breakdown summarizes major efficiency bottlenecks to be overcome by future advances in power electronics. [ABSTRACT FROM AUTHOR]

Soft-switching power converters based on wide-band-gap (WBG) transistors offer superior efficiency and power density advantages. However, at high frequencies, loss behavior varies significantly between different WBG technologies. This includes losses related to conduction and dynamic on-state resistance (RDS(ON)) degradation, also charging/discharging of input capacitance (CISS) and output capacitance (COSS). As datasheets lack such important information, we present measurement techniques and evaluation methods for soft-switching losses in WBG transistors which enable a detailed loss-breakdown analysis. We estimate the gate loss under soft-switching conditions using a simple small-signal measurement. Next, we use Sawyer–Tower and nonlinear resonance (NR) methods to measure large-signal COSS energy losses up to 40 MHz. Finally, we investigate the dependence of dynamic RDS(ON) degradation on off-state voltage using pulsed-IV measurements. We demonstrate an insightful comparison of soft-switching losses for various normally off gallium nitride (GaN) and silicon carbide (SiC) devices. A p-GaN-gated device exhibits the most severe RDS(ON) degradation and the lowest gate loss. Cascode arrangement increases threshold voltage for GaN devices and reduces gate losses in SiC transistors; however, it leads to higher C{OSS losses. The study facilitates the evaluation of system losses and selection of efficient WBG devices based on the trade-offs between various sources of losses at high frequencies. [ABSTRACT FROM AUTHOR]

The dissipated energy (Ediss) related to the resonant charging–discharging of a transistor output capacitance becomes a dominant loss factor for power converters operating in the MHz range. A recent letter has introduced a small-signal measurement method to quantify Ediss with a frequency-dependent small-signal resistance, Rs, and an effective small-signal output capacitance, Cosseff. This letter provides further insights on the effect of Rs and Coss upon the device losses in a broader sense. In particular, the Coss loss tangent, tan (δ), is introduced as a normalized Ediss to combine the roles of Rs and Coss together with the operating frequency into a single loss parameter. By evaluating commercial device families, it is demonstrated that tan (δ) is constant for a given family, independent of device on-state resistance, RDS(on). It is shown that a minimum Ediss is achieved by having the lowest tan (δ) for a given stored energy (Eoss) in Coss. With accompanying guidelines, this letter identifies tan (δ) as a powerful figure of merit to classify field-effect transistors (FETs) for soft-switching applications, regardless of RDS(on) variations in devices within a family. The proposed concept provides a comprehensive method to characterize and benchmark field-effect transistors for efficient operation in high and very-high-frequency (VHF) applications. [ABSTRACT FROM AUTHOR]

The low on-resistance of wide-band-gap (WBG) transistors is a key feature for efficient power converters; however, the anomalous loss in their output capacitance (COSS) severely limits their performance at high switching frequencies. Characterizing COSS losses based on the large-signal measurement methods requires an extensive effort, as separate measurements are needed at different operation points, including voltage swing, frequency, and dv/dt. Furthermore, there is a practical tradeoff in the maximum voltage and frequency applied to the device. Here, we introduce a new circuit model, including an effective COSS and a frequency-dependent series resistance, along with a simple small-signal method to fully characterize COSS losses in WBG transistors. The method accurately predicts COSS losses at any voltage swing or frequency. Contrary to other methods, this technique directly leads to a general identification of COSS losses at different operation points, revealing new insights on COSS losses in WBG transistors, especially the dependence of EDISS on voltage and frequency. Based on the proposed approach, the issue of COSS losses in enhancement-mode GaN and SiC transistors was assigned to the limited quality factor of COSS. The precise characterization of COSS losses proposed in this letter is essential for designing efficient high-frequency power converters. [ABSTRACT FROM AUTHOR]