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An increasing share of fluctuating and intermittent renewable energy sources can cause over-currents (OCs) in the power system. The heat generated during OCs increases the junction temperature of semiconductor devices and could even lead to thermal runaway if thermal limits are reached. In order to keep the junction temperature within the thermal limit of the semiconductor, the power module structure with heat-absorbing material below the chip is investigated through COMSOL Multiphysics simulations. The upper limits of the junction temperature for Silicon (Si) and Silicon Carbide (SiC) are assumed to be 175 and 250 ∘ C, respectively. The heat-absorbing materials considered for analysis are a copper block and a copper block with phase change materials (PCMs). Two times, three times, and four times of OCs would be discussed for durations of a few hundred milliseconds and seconds. This article also discusses the thermal performance of a copper block and a copper block with PCMs. PCMs used for Si and SiC are LM108 and Lithium, respectively. It is concluded that the copper block just below the semiconductor chip would enable OC capability in Si and SiC devices and would be more convenient to manufacture as compared to the copper block with PCM. [ABSTRACT FROM AUTHOR]

Recent advancements in the silicon carbide (SiC) power semiconductor technology offer improvements for high-power converters, where today silicon (Si) devices are still dominant. Bipolar SiC devices feature particularly good conduction capability while blocking high voltages. With expected advances in SiC material quality and processing technology, resulting in higher charge carrier lifetimes, methods for tailoring will be required. In this article, three differently optimized 10-kV SiC p-i-n diodes are compared regarding their switching and conduction performance in a 50-kHz LCC converter with a high output voltage. The converter topology features capacitively assisted switching, resulting in reduced switching losses for diodes with short reverse recovery tails. One diode group was subjected to a novel carrier lifetime tailoring method, involving simultaneous annihilation and generation of carbon vacancies. Another group was tailored via proton irradiation. Tradeoffs for the optimization of the diodes are highlighted. The analysis is supported by circuit simulations, device simulations, static measurements, switching waveform measurements, and calorimetric loss measurements. The results show a total rectifier loss reduction of 37%, compared to a state-of-the-art implementation with eight 1-kV Si diodes. The switching losses account for 3%–19% of the total losses, indicating a much higher possible operation frequency. [ABSTRACT FROM AUTHOR]

Recent developments in medium-voltage (MV) silicon and silicon carbide (SiC) power semiconductor devices are challenging state-of-the-art converter and auxiliary power supply (APS) designs. The APS is an important converter component, which energizes the gate-drive units and, therefore, has an influence on the overall reliability and efficiency of the converter system. There has, however, been comparably little research on how the APS of high-power converter submodules can be realized, in particular, for high-voltage applications. New, or improved, solutions may build on state-of-the-art topologies in the near future, but utilize MV SiC technology in the APS circuit itself to enable improved efficiency, reliability, simplicity, and compactness. Externally-fed APS concepts could provide several further advantages. Their various benefits on converter and system level may enable them to be a competitive solution for future APS concepts. Especially, light-based power supply systems are considered most useful since they offer extreme voltage isolation capability and immunity to electromagnetic interference. This article presents a review of the wide range of solutions for APSs, possible implementation options, and the most important design considerations. The different solutions are evaluated in a qualitative fashion, providing an overview of available APS concepts with regard to the requirements for high-power converter applications. [ABSTRACT FROM AUTHOR]

Recent advancements in silicon carbide (SiC) power semiconductor technology enable developments in the high-power sector, e.g., high-voltage-direct-current (HVdc) converters for transmission, where today silicon (Si) devices are state-of-the-art. New submodule (SM) topologies for modular multilevel converters offer benefits in combination with these new SiC semiconductors. This article reviews developments in both fields, SiC power semiconductor devices and SM topologies, and evaluates their combined performance in relation to core requirements for HVdc converters: grid code compliance, reliability, and cost. A detailed comparison of SM topologies regarding their structural properties, design and control complexity, voltage capability, losses, and fault handling is given. Alternatives to state-of-the-art SMs with Si insulated-gate bipolar transistors (IGBTs) are proposed, and several promising design approaches are discussed. Most advantages can be gained from three technology features. First, SM bipolar capability enables dc fault handling and reduced the energy storage requirements. Second, SM topologies with parallel conduction paths in combination with SiC metal–oxide–semiconductor field-effect transistors offer reduced losses. Third, a higher SM voltage enabled by a higher blocking voltage of SiC devices results in a reduced converter complexity. For the latter, ultrahigh-voltage bipolar devices, such as SiC IGBTs and SiC gate turn-off thyristors, are envisioned. [ABSTRACT FROM AUTHOR]

The performance of theoretical ultrahigh-voltage power semiconductor devices has been predicted by means of numerical simulations using the Sentaurus technology computer-aided design tool. A general silicon carbide punch-through insulated-gate bipolar transistor (IGBT) structure has been implemented with suitable physics-based models and parameters to reflect the device characteristics in a wide range of device blocking voltages from 20 to 50 kV. The models for 20 kV class IGBTs have been implicitly validated by means of published experimental results. Mixed-mode simulations were performed that predicted total switching energy loss densities of 335, 629, 906, and 999 mJ/cm2 for 20, 30, 40, and 50 kV class devices, respectively, at 25 °C, JC = 20 A/cm2, and an ambipolar carrier lifetime of 20 μs. While the IGBT on-state forward voltage drop reduces, the switching losses increase with higher charge-carrier lifetime for a given current density (e.g., 20 A/cm2). The large span of simulation results will be used as an input support to the design of future high-power converters. [ABSTRACT FROM AUTHOR]

The temperature evolution during a short-circuit (SC) fault in the dies of three different silicon carbide (SiC) 1200-V power devices is presented in this article. Transient electrothermal simulations are performed based on the reconstructed structure of commercially available devices. The simulations reveal the location of the hottest point in each device. The nonisothermal electrical analysis supports the necessity to turn-off SC events rapidly to protect the immunity of the device after a fault. The analysis also reveal differences in delay required to turn-off devices depending on their type. A thorough analysis of the temperature rise in the die of the SiC metal-oxide semiconductor field-effect transistors (MOSFET) device is also presented, where the maximum temperature with regards to different fault cases and circuit characteristics is presented. The impact of the gate resistance, circuit inductance, detection time, drain-source voltage, and gate-source voltage are considered. [ABSTRACT FROM AUTHOR]

In this paper, a novel $dv/dt$ filter is presented targeted for 100-kW to 1-MW voltage source converters using silicon carbide (SiC) power devices. This concept uses the stray inductance between the power device and the converter output as a filter component in combination with an additional small RC-link. Hence, a lossy, bulky, and costly filter inductor is avoided and the resulting output $dv/dt$ is limited to 5–10 kV/$\mu$s independent of the output current and switching speed of the SiC devices. As a consequence, loads with $dv/dt$ constraints, e.g., motor drives can be fed from SiC devices enabling full utilization of their high switching speed. Moreover, a filter-model is proposed for the selection of filter component values for a certain $dv/dt$ requirement. Finally, results are shown using a 300-A 1700-V SiC metal–oxide–semiconductor field-effect transistor (mosfet). These results show that the converter output $dv/dt$ can be limited to 7.5 kV/ $\mu$s even though values up to 47 kV/ $\mu$s were measured across the SiC mosfet module. Hence, the total switching losses, including the filter losses, are verified to be three times lower compared to when the mosfet $dv/dt$ was slowed down by adjusting the gate driver. [ABSTRACT FROM AUTHOR]

This paper presents an experimental methodology for the characterization of thermomechanical displacement and friction properties in a free-floating press-pack structure, and evaluation of the tensile stress on the semiconductor die through simulation of different mechanical and thermal loading conditions. The press-pack structure consists of a single silver-metallized (1 \mu \textm ) silicon carbide die ( 400~\mu \textm ) in contact with rhodium-coated (0.4 \mu \textm ) molybdenum square plates. The thermomechanical displacements in the press-pack structure have been obtained using the digital image correlation technique, and the mean random error has been ±0.1 \mu \textm , which is approximately 10 ppm of the measured length (10.5 mm). The developed experimental method has led to an analytical estimation of friction coefficients on the interfaces’ silicon carbide-molybdenum and molybdenum-copper. The results demonstrate that the thin silver layer behaves as a solid film lubricant. A 2-D finite-element model representing the experimental setup has been implemented. The difference in displacement between measurement and simulation is less than 8%. Furthermore, the coinfluence of the design parameters on the thermomechanical performance of the stacked structure has been analyzed through simulations. Finally, design guidelines to reduce the tensile stress on the silicon carbide die have been proposed regarding free-floating press-pack power electronics packaging. [ABSTRACT FROM PUBLISHER]

An experimental analysis of the behavior under short-circuit conditions of three different silicon-carbide (SiC) 1200-V power devices is presented. It is found that all devices take up a substantial voltage, which is favorable for detection of short circuits. A transient thermal device simulation was performed to determine the temperature stress on the die during a short-circuit event, for the SiC MOSFET. It was found that, for reliability reasons, the short-circuit time should be limited to values well below Si IGBT tolerances. Guidelines toward a rugged design for short-circuit protection (SCP) are presented with an emphasis on improving the reliability and availability of the overall system. A SiC device driver with an integrated SCP is presented for each device-type, respectively, where a short-circuit detection is added to a conventional driver design in a simple way. The SCP driver was experimentally evaluated with a detection time of 180 ns. For all devices, short-circuit times well below 1 \upmu\texts were achieved. [ABSTRACT FROM AUTHOR]

This paper presents the design process of a 312-kVA three-phase silicon carbide inverter using ten parallel-connected metal–oxide–semiconductor field-effect-transistor power modules in each phase leg. The design processes of the gate-drive circuits with short-circuit protection and power circuit layout are also presented. Measurements in order to evaluate the performance of the gate-drive circuits have been performed using a double-pulse setup. Moreover, electrical and thermal measurements in order to evaluate the transient performance and steady-state operation of the parallel-connected power modules are shown. Experimental results showing proper steady-state operation of the power converter are also presented. Taking into account measured data, an efficiency of approximately 99.3% at the rated power has been measured for the inverter. [ABSTRACT FROM PUBLISHER]

A circuit solution to the normally-ON property of the normally-ON silicon carbide junction field-effect transistor, namely the self-powered gate driver, has been recently proposed. This letter sheds some light on the design process of the self-powered gate driver concept as well as limitations from the system perspective. It is experimentally shown that the parameters of the self-powered gate driver must be chosen taking into account a tradeoff between a fast response and stable operation of the driver. Moreover, the influence of the shoot-through current in the fast activation of the self-powered gate driver is also presented. [ABSTRACT FROM AUTHOR]

Soft-switching converters equipped with insulated gate bipolar transistors (IGBTs) in silicon (Si) have to be dimensioned with respect to additional losses due to the dynamic conduction losses originating from the conductivity modulation lag. Replacing the IGBTs with emerging silicon carbide (SiC) transistors could reduce not only the dynamic conduction losses but also other loss components of the IGBTs. In the present paper, therefore, several types of SiC transistors are compared to a state-of-the-art 1200-V Si IGBT. First, the conduction losses with sinusoidal current at a fixed amplitude (150 A) are investigated at different frequencies up to 200 kHz. It was found that the SiC transistors showed no signs of dynamic conduction losses in the studied frequency range. Second, the SiC transistors were compared to the Si IGBT in a realistic soft-switching converter test system. Using a calorimetric approach, it was found that all SiC transistors showed loss reductions of more than 50%. In some cases loss reductions of 65% were achieved even if the chip area of the SiC transistor was only 11% of that of the Si IGBT. It was concluded that by increasing the chip area to a third of the Si IGBT, the SiC vertical trench junction field-effect transistor could yield a loss reduction of approximately 90%. The reverse conduction capability of the channel of unipolar devices is also identified to be an important property for loss reductions. A majority of the new SiC devices are challenging from a gate/base driver point-of-view. This aspect must also be taken into consideration when making new designs of soft-switching converters using new SiC transistors. [ABSTRACT FROM AUTHOR]

This paper describes issues related to parallel connection of SiC bipolar junction transistors (BJTs) in discrete packages. The devices are applied in a high-frequency dc/dc boost converter where the switching losses significantly exceed the conduction losses. The design and construction of the converter is discussed with special emphasis on successful parallel-operation of the discrete BJTs. All considerations are experimentally illustrated by a 6-kW, 250-kHz boost converter (300 V/600 V). A special solution for the base-drive unit, based on the dual-source driver concept, is also shown in this paper. The performance of this driver and the current sharing of the BJTs are both presented. The power losses and thermal performance of the parallel-connected transistors have been determined experimentally for different powers and switching frequencies. An efficiency of 98.23% (±0.02%) was measured using a calorimetric setup, while the maximum temperature difference among the four devices is 12 °C. [ABSTRACT FROM AUTHOR]

The paper presents an inductor with reduced self-capacitance, designed and evaluated with fast-switching SiC transistors in dc-dc converters. A conventional inductor with the same core and number of turns was also build for comparison. The two inductors are tested experimentally on two different 2 kW, 100 kHz dc-dc converters with silicon carbide switches-one with a junction field-effect transistor (JFET) and the other with a bipolar junction transistor (BJT). Replacing the conventional inductor with the one that has lower self-capacitance improved the switching performance of the converter and reduced its electromagnetic emissions. Furthermore, the efficiency of the converter is improved-in the case of the JFET boost converter the power losses were reduced by 16% and by 20% in the case of BJT. [ABSTRACT FROM AUTHOR]

Operation of parallel-connected 4H-SiC vertical junction field effect transistors (VJFETs) from SemiSouth is modeled using numerical simulations and experimentally verified. The unbalanced current waveforms of parallel-connected VJFETs are investigated with respect to the spread in the critical parameters of the device structure and to the influence of the parasitic inductances in the measurement circuit. The device structures are reconstructed based on scanning electron microscopy (SEM) analysis, electrical characterization, and device simulations. The doping concentration and profile depth of a p-grid formed by angular implantation are studied as main contributors that influence the variation of the on-state characteristics, and the threshold voltage of the experimental devices. It has been shown elsewhere that similar differences in p-grid also lead to differences in gate-source breakdown voltage. The switching performance of the parallel-connected JFETs is measured using single and double gate drivers in a double-pulse test and compared with simulations. The switched current and voltage waveforms from measurements are reproduced in simulation by introducing the parasitics. From the analysis, it is found that reasonable differences in doping levels and profiles of the p-grid give rise to significant differences in device parameters. However, even with these parameter differences and circuit asymmetries, it is possible to successfully operate parallel-connected VJFETs of this type. [ABSTRACT FROM AUTHOR]

Silicon Carbide high-power modules populated with several parallel-connected junction field-effect transistors must be driven properly. Parasitic elements could act as drawbacks in order to achieve fast and oscillation-free switching performance, which are the main goals. These two requirements are related closely to the design of the gate-drive unit, and they must be kept under certain limits when high efficiencies are targeted. This paper deeply investigates several versions of gate-drive units and proposes a dual-function gate-drive unit which is able to switch the module with an acceptable speed without letting the current suffer from significant oscillations. It is experimentally shown that turn-on and turn-off switching times of approximately 130 and 185 ns respectively can be reached, while the magnitude of the current oscillations is kept at an adequate level. Moreover, using the proposed gate driver an efficiency of approximately 99.7% is expected for a three-phase converter rated at 125 kVA and having a switching frequency of 2 kHz. [ABSTRACT FROM AUTHOR]

Silicon carbide (SiC) bipolar junction transistors (BJTs) require a continuous base current in the on-state. This base current is usually made constant and is corresponding to the maximum collector current and maximum junction temperature that is foreseen in a certain application. In this paper, a discretized proportional base driver is proposed which will reduce, for the right application, the steady-state power consumption of the base driver. The operation of the proposed base driver has been verified experimentally, driving a 1200-V/40-A SiC BJT in a dc-dc boost converter. In order to determine the potential reduction of the power consumption of the base driver, a case with a dc-dc converter in an ideal electric vehicle driving the new European drive cycle has been investigated. It is found that the steady-state power consumption of the base driver can be reduced by approximately 60%. The total reduction of the driver consumption is 3459 J during the drive cycle, which is slightly more than the total on-state losses for the SiC BJTs used in the converter. [ABSTRACT FROM AUTHOR]

The very low on-state resistance, the voltage-controlled gate, and the relative simplicity of fabrication of the normally ON silicon carbide junction field-effect transistor (JFET) make this device the most important player among all state-of-the-art silicon carbide transistors. However, the normally ON nature counts as the main factor which keeps this device far from being considered as an alternative to the silicon insulated-gate bipolar transistor. A self-powered gate driver without external power supply for normally ON silicon carbide JFETs is presented in this paper. The proposed circuit is able to handle the short-circuit currents when the devices are subjected to the dc-link voltage by utilizing the energy associated with this current. On the other hand, it supplies the necessary negative gate-source voltage during the steady-state operation. A detailed description of the operating states in conjunction with a theoretical analysis of the proposed self-powered gate driver is presented. The first part of the experimental investigation has been performed when the proposed circuit is connected to a device which is directly subjected to the dc-link voltage. The second set of measurements were recorded when the self-powered gate-driver was employed as the driver of normally ON components in a half-bridge converter. From the experimental results, it is shown that the short-circuit current is cleared within approximately 20 μs after the dc-link voltage is applied, while the power consumption when all devices are kept in the OFF state equals 0.37 W. Moreover, it is experimentally shown that the proposed gate driver can properly switch when it is employed in a half-bridge converter. Finally, limitations regarding the range of the applications where the self-powered gate drive can efficiently operate are also discussed. [ABSTRACT FROM AUTHOR]

State-of-the-art silicon carbide switches have current ratings that are not sufficiently high to be used in high-power converters. It is, therefore, necessary to connect several switches in parallel in order to reach sufficient current capabilities. An investigation of parallel-connected normally ON silicon carbide JFETs is presented in this paper. The device parameters that play the most important role for the parallel connection are the pinch-off voltage, the gate–source reverse breakdown voltage, the spread in the on-state resistances, and the variations in static transfer characteristics of the devices. Moreover, it is experimentally shown that a fifth factor affecting the parallel connection of the devices is the parasitic inductances of the circuit layout. The temperature dependence of the gate–source reverse breakdown voltages is analyzed for two different designs of silicon carbide JFETs. If the spread in the pinch-off and gate–source reverse breakdown voltages is sufficiently large, there might be no possibility for a stable off-state operation of a pair of transistors without forcing one of the gate voltages to exceed the breakdown voltage. A solution to this problem using individual gate circuits for the JFETs is given. The switching performance of two pairs of parallel-connected devices with different combinations of parameters is compared employing two different gate-driver configurations. Three different circuit layouts are considered and the effect of the parasitic inductances is experimentally investigated. It is found that using a single gate circuit for the two mismatched JFETs may improve the switching performance and therefore the distribution of the switching losses significantly. Based on the measured switching losses, it is also clear that regardless of the design of the gate drivers, the lowest total switching losses for the devices are obtained when they are symmetrically placed. [ABSTRACT FROM AUTHOR]

The papers in this special issue cover the following topics: survey and device related topics; reliability; modeling; packaging and modules; high-temperature aspects; gate and base drivers and aspects on switching speed; cascode circuits; dc-dc converters; resonant and soft-switching converters, matrix converters; and grid-side and motor-drive applications. [ABSTRACT FROM AUTHOR]

During recent years, silicon carbide (SiC) power electronics has gone from being a promising future technology to being a potent alternative to state-of-the-art silicon (Si) technology in high-efficiency, highfrequency, and high-temperature applications. The reasons for this are that SiC power electronics may have higher voltage ratings, lower voltage drops, higher maximum temperatures, and higher thermal conductivities. It is now a fact that several manufacturers are capable of developing and processing high-quality transistors at cost that permit introduction of new products in application areas where the benefits of the SiC technology can provide significant system advantages. [ABSTRACT FROM PUBLISHER]