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We propose and experimentally demonstrate a silicon photonic circuit that can perform the comparison operation of two-bit digital signals based on microring resonators (MRRs). Two binary electrical signals regarded as two operands of desired comparison digital signals are applied to three MRRs to modulate their resonances through the microheaters fabricated on the top of MRRs, respectively (here, one binary electrical signal is applied to two MRRs by a 1×2 electrical power splitter, which means that the two MRRs are modulated by the same binary electrical signal). The comparison results of two binary electrical signals can be obtained at two output ports in the form of light. The proposed device is fabricated on a silicon-on-insulator substrate using the complementary metal-oxide-semiconductor fabrication process, and the dynamic characterization of the device with the operation speed of 10 kbps is demonstrated successfully.

An integrated electronic-photonic phase-locked loop (PLL) modulates the frequency of a tunable laser for use in frequency-modulated continuous-wave (FMCW) lidar 3D imaging. The proposed lidar can perform 180k range measurements per second. The rms depth precision is 8 $\mu \text{m}$ at distances of ±5 cm from the range baseline. The range window is 1.4 m, with a precision of 4.2 mm at the edges of the window. Optical circuitry, including input light couplers, waveguides, and photodiodes, is realized on a 3 mm $\times $ 3 mm silicon-photonic chip. The 0.18- $\mu \text{m}$ CMOS ASIC of the same area comprises the front-end transimpedance amplifier, analog electro-optical PLL, and digital control circuitry consuming 1.7 mA from a 1.8 V supply and 14.1 mA from a 5-V supply. The latter includes 12.5-mA bias current for the distributed Bragg reflector section of the tunable laser. The two chips are integrated using through-silicon-vias implemented in the silicon-photonic chip.

Optical networks-on-chip (NoCs) provide a promising answer to address the increasing requirements of ultra-high bandwidth and extremely low power consumption. Designing a photonic interconnect, however, involves a number of challenges that have no equivalent in the electronic domain, particularly the crosstalk noise, which affects the signal-to-noise ratio (SNR) possibly resulting in an inoperable architecture and hence constraining the network scalability. In this article, we point out the implications of application-driven task mapping on crosstalk effects. We motivate the main rationale of our work and provide a formalization of the problem. Then we propose a class of algorithms that automatically map the application tasks onto a generic mesh-based photonic NoC architecture such that the worst-case crosstalk is minimized. We also present a purpose-built experimental setup used for evaluating several architectural solutions in terms of crosstalk noise and SNR. The setup is used to collect extensive results from several real-world applications and case studies. The collected results show that the crosstalk noise can be significantly reduced by adopting our approach, thereby allowing higher network scalability, and can exhibit encouraging improvements over application-oblivious architectures.

The next generation of Multiprocessor Systems-on-Chip will require communication facilities that cannot be provided by traditional electronic communication infrastructures. Silicon photonics appears today a promising solution to handle future communication needs thanks to ultra-high bandwidth and extremely low-power consumption. However, designing an optical on-chip network requires addressing several challenges that have no equivalent in the electronic domain. In particular, photonic networks-on-chip suffer from considerable power loss, which affects the network scalability and impacts the performance by constraining the total number of wavelengths and hence the available bandwidth. In this paper, we propose an algorithm which automatically maps the IP cores onto a generic mesh-based photonic NoC architecture such that the worst-case power loss is minimized. As the main contribution, we first formulate the problem of power loss aware mapping and then we propose a genetic algorithm to solve it. Experimental results show that the power loss can be significantly reduced enabling much higher scalability of the on-chip photonic interconnect.

We present a design for an on-chip MEMS-actuated Variable Optical Attenuator (VOA) based on Silicon Photonic MEMS technology. The VOA consists of 30 individual mechanically movable MEMS cantilevers, suspended over an integrated, 1 mu m wide bus waveguide, each terminating with two optical attenuation bars. By exploiting the pull-in instability, electrostatic actuation allows to move the individual cantilevers into proximity of the waveguide, leading to scattering of the evanescent field and thus attenuation of the remaining optical power in the waveguide. Electrodes are placed below the cantilevers for electrostatic actuation. Mechanical stoppers are used to avoid contact between the cantilevers and the electrodes and to keep the bars at a precisely defined distance of 60 nm away from the bus waveguide. The attenuator provides nearly zero insertion loss in OFF state, while in ON state, the attenuation range is defined by the number of actuated digital attenuation cantilevers and can be adjusted in discrete increments of only 1.2 dB. Owing to the small size, fast microsecond scale response time can be achieved, and electrostatic MEMS actuation allows for broadband and low-power operation. Our design exhibits a compact footprint of 30 mu m x 45 mu m, attenuation from 0 dB to 36 dB, while keeping return loss below 27 dB. To the best of our knowledge, this is the first presentation of a design of a VOA in Silicon Photonic MEMS technology.

We experimentally investigate the smallest germanium waveguide cavity resonators on silicon that can be designed to work around 1.55 mu m wavelength and observe an almost 30-fold enhancement in the collected spontaneous emission per unit volume when compared to a continuous germanium film of the same thickness. The enhancement is due to an effective combination of (i) excitation enhancement at the pump wavelength, (ii) emission enhancement (Purcell effect) at the emission wavelength, and (iii) effective beaming by the nanoresonators, which act as optical antennas to enhance the radiation efficiency. Our results set a basis for the understanding and engineering of light emission based on subwavelength, CMOS-compatible nanostructures operating at telecommunication wavelengths.

This paper reports about an efficient method for the numerical simulation of the electrical and optical characteristics, in both steady state and transient conditions, of free carrier injection- or depletion-based electro-optical active devices, based on the low cost technology of hydrogenated amorphous silicon (a-Si:H) and related semiconducting alloys, like a-SiC:H. In particular, our experimental results, recently achieved for low-loss, birefringence-free, single-mode waveguide-integrated phase modulators, are used to tune the many simulation parameters and validate the mixed electro-optic simulation environment. The tool is used to design a Mach–Zehnder Interferometer (MZI)-based modulator enhancing the performances of previous realized devices.

International audience; A silicon integrated wideband common emitter amplifier driver unit in 55 nm SiGe BiCMOS technology designed for a 60 Gb/s silicon photonic segmented Mach-Zehnder Modulator (SE-MZM) is reported in this paper. It achieves a bandwidth of 42.2 GHz (0.3-42.5 GHz), allowing the transmission of an On-Off Keying (OOK) modulated optical signal on a single optical channel with a data rate of up to 60 Gb/s. For a power consumption of 125 mW, it provides a small signal gain of 18 dB and a single-ended peak-to-peak output voltage swing of up to 1.1 V on a 50 Ω output load. The die active area is as small as 204 x 137 µm2.

Asymmetric quantum well systems are excellent candidates to realize semiconductor light emitters at far-infrared wavelengths not covered by other gain media. Group-IV semiconductor heterostructures can be grown on silicon substrates, and their dipole-active intersubband transitions could be used to generate light from devices integrated with silicon electronic circuits. Here, we have realized an optically pumped emitter structure based on a three-level Ge/Si0.18Ge0.82 asymmetric coupled quantum well design. Optical pumping was performed with a tunable free-electron laser emitting at photon energies of 25 and 41 meV, corresponding to the energies of the first two intersubband transitions 0 → 1 and 0 → 2 as measured by Fourier-transform spectroscopy. We have studied with a synchronized terahertz timedomain spectroscopy probe the relaxation dynamics after pumping, and we have interpreted the resulting relaxation times (in the range 60 to 110 ps) in the framework of an out-of-equilibrium model of the intersubband electron−phonon dynamics. The spectral changes in the probe pulse transmitted at pump−probe coincidence were monitored in the range 0.7−2.9 THz for different samples and pump intensity and showed indication of both free carrier absorption increase and bleaching of the 1 → 2 transition. The quantification from data and models of the free carrier losses and of the bleaching efficiency allowed us to predict the conditions for population inversion and to determine a threshold pump power density for lasing around 500 kW/cm2 in our device. The ensemble of our results shows that optical pumping of germanium quantum wells is a promising route toward siliconintegrated far-infrared emitters.

International audience; In this paper, a silicon integrated driver unit, intended for a single-channel NRZ 3D heterogeneous silicon photonic modulator is proposed. It allows data rate of up to 100 Gb/s, which is beyond the current state of the art. It directly controls 160 GHz bandwidth high speed phase modulator (HSPM) segment of a Mach Zehnder Interferometer (MZI). It is fabricated in 55 nm SiGe BiCMOS technology with fT of up to 300 GHz. It features a 300 mW of dc power consumption and delivers a 2.5 Vpp single-ended output swing at 100 Gb/s.

Future many-core systems will require energy-efficient, high-throughput and low-latency communication architectures. Silicon Photonics appears today as a promising solution to achieve these goals. However, the photonics inability to perform inflight buffering and logic suggests the use of Hybrid Photonic-Electronic architectures. In order to exploit the full potential of photonics, it is essential to thoroughly design the Path-Setup architecture, which is the primary source of performance degradation and power consumption. In this paper, we propose a new power-aware path-setup protocol able to put allocated circuits on a stand-by state, rapidly recovering them when needed. We compare in terms of performance and energy consumption some path-setup architectural solutions that differ from each other in the routing algorithm, the path-setup protocol and the deadlock avoidance technique. The results show that the proposed protocol outperforms other solutions in terms of performance and energy efficiency. In addition, this comparison will help many-core system designers to select the most appropriate path-setup architecture according to traffic characteristics and network size.

We investigate light-matter interactions in periodic silicon microcrystals fabricated combining top-down and bottom-up strategies. The morphology of the microcrystals, their periodic arrangement, and their high refractive index allow the exploration of photonic effects in microstructured architectures. We observe a notable decrease in reflectivity above the silicon bandgap from the ultraviolet to the near-infrared. Finite-difference time-domain simulations show that this phenomenon is accompanied by a ∼2-fold absorption enhancement with respect to a flat sample. Finally, we demonstrate that ordered silicon microstructures enable a fine tuning of the light absorption by changing experimentally accessible knobs as pattern and growth parameters. This work will facilitate the implementation of optoelectronic devices based on high-density microcrystals arrays with optimized light-matter interactions.