Search

Semiconducting silicon carbide (4H-SiC) exhibits characteristics of high hardness, notable brittleness, and excellent chemical stability. The commonly employed technique for achieving an ultra-smooth and flat surface is chemical mechanical polishing (CMP), which is utilized to process the 4H-SiC surface. Wet oxidation, as an important process of chemical-mechanical polishing of single-crystal 4H-SiC, directly affects the rate and surface quality of CMP. This paper provides a comprehensive overview of the current research status of wet oxidation of single-crystal 4H-SiC. It discusses the oxidants used in the wet oxidation of 4H-SiC, such as KMnO4, H2O2, K2S2O8. Based on this, it further summarizes commonly employed oxidation-enhancement methods, including photocatalytic-assisted oxidation, electrochemical oxidation, and Fenton reaction. The mechanism of wet oxidation of single-crystal 4H-SiC is analyzed from the aspect of theoretical calculation, and the future research direction of wet oxidation of 4H-SiC is proposed. [ABSTRACT FROM AUTHOR]

4H silicon carbide (4H-SiC) substrate wafers without surface / subsurface damages and low surface roughness are ideal substrates for the development of power electronics and radio frequency (RF) microwave devices, which hold great promise in applications of new energy, rail transportation, smart grid and 5G communication. The processing of 4H-SiC substrate wafers includes slicing, grinding, lapping, polishing and cleaning. However, the surface damages ( SDs) and subsurface damages (SSDs) introduced during the processing of 4H-SiC substrates affects the properties of 4H-SiC substrates and epitaxial layers, and thus the performance and reliability of devices based on 4H-SiC. This paper focuses on the formation and removal mechanisms of SDs / SSDs during the processing of 4H-SiC substrate wafers. Based on the detection method of SDs / SSDs, the morphologies and characterization approaches of SDs / SSDs are reviewed. Finally, three commonly used technologies for the removal SDs / SSDs, along with their technical advantages, development challenges and trends, are briefly discussed. [ABSTRACT FROM AUTHOR]

4H silicon carbide (4H‐SiC) holds great promise for high‐power and high‐frequency electronics, in which high‐quality 4H‐SiC wafers with both global and local planarization are cornerstones. Chemical–mechanical polishing (CMP) is the key processing technology in the planarization of 4H‐SiC wafers. Enhancing the performance of CMP is critical to improving the surface quality and reducing the processing cost of 4H‐SiC wafers. In this review, the superior properties of 4H‐SiC and the processing of 4H‐SiC wafers are introduced. The development of CMP with chemical, mechanical, and chemical–mechanical synergistic approaches to improve the performance of CMP is systematically reviewed. The basic principle and processing system of each improvement approach are presented. By comparing the material removal rate of CMP and the surface roughness of CMP‐treated 4H‐SiC wafers, the prospect on the chemical, mechanical, and chemical–mechanical synergistic improvement approaches is finally provided. [ABSTRACT FROM AUTHOR]