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SIMD (Single Instruction Multiple Data) extensions are acceleration components integrated in general processor, aiming at extracting instruction and data level parallelism of multimedia and scientific calculation programs. Currently, most of the automatic vectorization methods for SIMD architectures are based on innermost loops. Inner loop vectorization is the common approach for auto-vectorization. This method has been used for many years and its efficiency is widely accepted by people. In this paper, we put forward a better method than inner loop vectorization for some loop nests, which is outer loop vectorization. Outer loop vectorization method means vectorizing the outer loop directly. It can extract more data level parallelism and make the most use of the spatial locality to improve the program efficiency than the inner one which is more suitable for some loop nests. This paper presents the realization. In this paper, we first revisit the preliminary analysis of outer loop vectorization based on Open64 complier. And then, data type conversion and code generation is presented in detail. Finally, we propose two optimization methods, capable of boosting the performance of outer loop vectorization to achieve the acceleration of 20% on average, 50% at most.

Nowadays more and more processors are integrated with SIMD extensions, and many compilers have applied auto-vectorization. SLP is an vectorization algorithm that could vectorize scientific applications more effectively than traditional algorithm. However, if basic blocks have not vectorized efficiently by SLP then the vectorization performance will degrade. To solve that problem this paper brings SLP that applied recovery methodology. The algorithm adopts SLP algorithm to vectorize program and then esitimate the vectorization benifit based cost model, at last recover the basic blocks that haven’t vectorized efficiently to their original states. Experiment results indicate that with the adoption of the new policy, the speedup gain for some applications can reach 29.4%.

Discontinuous references to memory and misalignment of memory access mode can have great impact on program performance in auto-vectorization. Different target-specific architecture may have different influence on vectorization performance. As a popular technology in recent years, the multimedia extension technique is important in the vectorization field. Supported by special processing unit in microprocessors, the SIMD automatic vectorization become available. Compiler targeted to SIMD has been widely used in research. This article has proposed a cost analytical model in automatic vectorization compiler. Based on the analysis of several important factors which impact the performance, this model combining with the SLP technique, evaluates both benefit and cost during vectorization and exists as a guidance to vectorization. Experimental results indicate that to some extent this model can accurately predict benefits for vectorization and guide compiler optimization.