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Process simulations can be used to improve grinding circuit performance, which efficiently reduces operating costs. The population balance model (PBM) is widely accepted for grinding modeling because it can reproduce breakage events in tumbling mills, as described by Austin et al. (1984). In this study, a pseudodynamic model is introduced, integrating the PBM with the Monte Carlo Method to stochastically simulate variables in an industrial grinding circuit. This integrated approach enabled circuit simulations over a period of 2 hours, representing the operational variables as seen in historical data. Model validation showed a correlation of 0.74 in the product size distribution when comparing simulated outcomes with the original population. [ABSTRACT FROM AUTHOR]

A complete circuit model of Surface Acoustic Wave (SAW) devices with straight interdigital transducers is presented. This equivalent circuit can be implemented in LTspice and contains variable design characteristics that can be easily changed to see their effect on the electrical response of the final SAW device design. Later a two port Surface Acoustic Wave device with 13-finger-IDT electrodes is fabricated and its electrical characterization is examined using a vector network analyzer. The test results are then compared with the equivalent circuits' simulation output results for the verification. The results show an acceptable agreement between the experimental and simulation results for a wide frequency range. This paper offers an easy method to create an equivalent LTSpice model to determine the electrical response of a SAW device before fabrication. The model can also be used to simulate the behaviour of the circuits containing SAW devices using LTSPICE tool. [ABSTRACT FROM AUTHOR]

A piezoelectric vibration-based energy harvester (PVEH) consists of an electromechanical structure and an electric circuit, influencing each other. The finite element method (FEM) allows for the simulation of arbitrarily shaped and nonlinear electromechanical structures, while an electronic circuit simulator (ECS) can be applied to simulate arbitrary electric circuits. We propose a novel implicit FEM-ECS coupling method, which combines the advantages of the FEM and the flexibility of an ECS. The Newton-Raphson method is applied to achieve rapid convergence at the interface between the FEM and ECS simulations, so that arbitrary PVEHs can be efficiently analyzed. The new implicit FEM-ECS coupling is validated against explicitly and monolithically coupled FEM-ECS simulations of PVEHs from literature. Moreover, an application example consisting of a nonlinear electromechanical structure and a self-powered SSHI circuit is considered and a shock-like base excitation is applied. The examples demonstrate the practical applicability of the novel coupling method for realistic simulations of PVEHs. [ABSTRACT FROM AUTHOR]

In the present paper the application of the Laplace transform and its inverse transform for solving ordinary differential equations with constant coefficients and initial condition is considered. The solution of an ordinary differential equation that describes a serial RLC circuit is provided. Some results of the simulations are also given. [ABSTRACT FROM AUTHOR]

Piezoelectric vibration-based energy harvesters consist of an electromechanical structure and an electric circuitry, influencing each other. We propose a novel approach that allows a finite element based system simulation of nonlinear electromechanical structures coupled to nonlinear electric circuitries. In the finite element simulation the influence of the electric circuit on the electromechanical structure is considered via the vector of external forces, using an implicit time integration scheme. To demonstrate the applicability of the new simulation method an active power circuit is considered. Several examples of piezoelectric vibration-based energy harvesters, connected to standard or synchronized switch harvesting on inductor (SSHI) circuits, showing linear or nonlinear mechanical behavior, are studied to validate the proposed simulation method against numerical results reported in the literature. The advocated method allows for consistent and efficient simulations of complete nonlinear energy harvesters using only one software tool. [ABSTRACT FROM AUTHOR]

An editorial is presented on photovoltaic (PV) power generation having great potential for meeting a majority of the global energy demand. Topics include various performance indices like voltage stress, number of passive elements, voltage and efficiency being discussed; and evaluating the circuit parameters influencing zero voltage switching zone reporting for both simulation and experimental.

This article introduces a thermally-compensated magnetic hysteresis model, capable of accurately determining core losses of ferrite materials while accounting for core temperature variations. The employed model is based on permeance-capacitance analogy and it captures the frequency-independent hysteresis effect with the help of the Preisach model. For validation purposes, a 100 kW, 10 kHz realized medium frequency transformer prototype is selected and modeled as a part of a full-bridge LLC resonant converter in a time-domain simulation environment. Conducted simulations show the ability of the thermally-compensated magnetic hysteresis model to impact the generated core losses for core temperatures of up to 120° C. Finally, a temperature-feedback loop within the transformer is successfully closed inside of a system-level simulation, allowing for a more precise determination of the core and winding steady-state temperatures. [ABSTRACT FROM AUTHOR]

Featured Application: The electromechanical analysis of full 3D interacting devices is often necessary. This paper presents such an analysis applied to the system constituted by a rail launcher and its feeding generator. The adopted numerical tool has general validity and can be used in other contexts. Multiphysics problems represent an open issue in numerical modeling. Electromagnetic launchers represent typical examples that require a strongly coupled magnetoquasistatic and mechanical approach. This is mainly due to the high velocities which make comparable the electrical and the mechanical response times. The analysis of interacting devices (e.g., a rail launcher and its feeding generator) adds further complexity, since in this context the substitution of one device with an electric circuit does not guarantee the accuracy of the analysis. A simultaneous full 3D electromechanical analysis of the interacting devices is often required. In this paper a numerical 3D analysis of a full launch system, composed by an air-core compulsator which feeds an electromagnetic rail launcher, is presented. The analysis has been performed by using a dedicated, in-house developed research code, named "EN4EM" (Equivalent Network for Electromagnetic Modeling). This code is able to take into account all the relevant electromechanical quantities and phenomena (i.e., eddy currents, velocity skin effect, sliding contacts) in both the devices. A weakly coupled analysis, based on the use of a zero-dimensional model of the launcher (i.e., a single loop electrical equivalent circuit), has been also performed. Its results, compared with those by the simultaneous 3D analysis of interacting devices, show an over-estimate of about 10–15% of the muzzle speed of the armature. [ABSTRACT FROM AUTHOR]

A circuit-fluid coupled model is proposed for describing the dynamics of the electron-hole plasma and the evolution of the electric field in the drift step recovery diodes (DSRDs). The model takes account of the real doping profile of the p+-p-n+ type silicon DSRD and the elementary processes such as the impact ionization, Shockley-Read-Hall recombination and Auger recombination. The current opening process of the DSRD is simulated with the proposed model and then the nanosecond opening-mechanism is investigated. The opening process is found to appear at the base region of the DSRD, due to the high density electron-hole plasma formed at the forward pumping period. According to the opening rate, the opening process can be divided into two stages: a slow stage near the p+-p boundary and an abrupt one at p-n junction. Moreover, simulation results show that the p+-p-n+ type DSRD with a lower base tends to generate pulses with shorter rise time and higher peak voltage. [ABSTRACT FROM AUTHOR]

This paper reports methods for measuring the spring constant and modeling the deflection of piezoelectric devices. Because this method uses the equivalent electric circuit of the piezoelectric device and deflection with respect to input voltage, it is a noncontact measurement method. Measurements of the spring constant from the equivalent circuit method and force versus deflection measurements are within 3.3% of each other. An equivalent electrical circuit of the piezoelectric device is also used to provide a model of the relationship between frequency and deflection according to input voltage. Input voltage and power with respect to driving frequency are modeled for a constant mechanical deformation. This model gives an estimation of the required input electrical power to piezoelectric devices for many applications. In order to verify the models, experiments are conducted and the models and experimental results show very good agreement. [ABSTRACT FROM AUTHOR]

The lack of dc fault clearance capability is a major obstacle that restricts the development of high-voltage direct current (HVdc) systems. Employing an active mechanical dc circuit breaker (M-DCCB) is an effective method to handle the dc fault. However, the existing active M-DCCBs can interrupt the fault current once but have problems in making the second interruption instantly in case of reclosing a permanent dc fault. In this paper, a novel topology of the active M-DCCB is proposed by inserting a precharged capacitor into a bridge formed by four spark gap switches. The operating strategy for the proposed M-DCCB is discussed to handle the dc faults. Its parameters, including the oscillation inductor and the oscillation capacitor, are determined by inequations derived from the requirements of dc fault interruption. The selection standard for the spark gap switch is set based on its breakdown characteristics. Finally, simulations are conducted to investigate the performance of the proposed M-DCCB. Results show that the capacitor can accumulate a sufficiently large reverse charge voltage automatically charged by the fault current. The proposed active M-DCCB topology and the dc fault handling strategy can interrupt the dc fault in HVdc power systems consecutively. [ABSTRACT FROM AUTHOR]

The paper presents a simulation model of the hybrid magnetic bearing dedicated to simulations of transient state. The proposed field-circuit model is composed of two components. The first part constitutes a set of ordinary differential equations that describes electrical circuits and mechanics. The second part of the simulation model consists of parameters such as magnetic forces, dynamic inductances and velocity-induced voltages obtained from the 3D finite element analysis. The MATLAB/Simulnik software was used to implement the simulation model with the required control system. The proposed field-circuit model was validated by comparison of time responses with the prototype of the hybrid magnetic bearing. [ABSTRACT FROM AUTHOR]

Energy system as a key component of stratospheric airship plays an important role in the success or failure of the whole flight mission. Here, the topology of HE-boost SBC converter for airship energy system is deeply studied. Based on the original HE-boost converter, a new HE-boost converter is proposed. By analysing its state space equation and small signal model, it is concluded that the stability of the new HE-boost converter is better than that of the original HE-boost converter. Based on this analysis, the optimal design of compensation network of the new HE-Boost converter is studied to ensure that the converter satisfies the condition of minimum phase system, so as to improve the stability of converter. Here, the theoretical analysis is verified and optimised by means of simulation. The paper builds: circuit, verify the correctness of the theoretical analysis and test, the frequency characteristics of the new HE-boost converter under different input and output conditions, technical index of converter can meet the requirements. [ABSTRACT FROM AUTHOR]

The compact design is suitable for the urban areas with intensive loads. The flexible multistate switch (FMS) can effectively reduce the footprint by removing transformers, which is the development trend of the flexible AC distribution equipment. In PSCAD/EMTDC, a simulation model containing two supply areas embedded in a transformerless FMS is built. Through the single-phase grounding fault simulation under the arc suppression coil grounding, the characteristics of zero-sequence component of FMS are analysed. By means of circuit analysis and sequence component decomposition, the intrinsic mechanism of AC/DC voltage fluctuation in the non-fault supply area caused by the zero-sequence component at the fault area is analysed, and the simulation result is explained. Based on the feeder transformation, a new protection and control scheme is proposed to overcome the problem of the zero-sequence ride through among different supply areas. [ABSTRACT FROM AUTHOR]

Power converters in the system-level real-time simulation are usually emulated by L/C-based associated discrete circuit (L/C-ADC). However, the L/C-ADC approaches may suffer from two issues: How to mitigate the unacceptable virtual power loss especially in high-frequency applications, and how to tune LC parameters setting which is affected by the external circuit. This paper proposes a novel generalized associated discrete circuit (G-ADC) model with parameterized history current sources. By utilizing the stability region of the feasible parameter space, the optimized G-ADC models with the best damping characteristic are developed for both two-level and three-level converters. The analytical results also guarantee that the parameters of the optimized G-ADC model are independent of the external circuit for most power grid applications. Furthermore, an field programmable gate array (FPGA)-based real-time simulation platform is built to verify the feasibility of the proposed scheme. Extensive simulation and hardware-in-loop experiment results demonstrate the effectiveness and superiority of best-damped models as well as the modeling flexibility corresponding to insensitivity to operating conditions and external system parameters. [ABSTRACT FROM AUTHOR]

An analysis methodology is presented to investigate soft failures in electronic devices. This methodology combines transmission line pulse (TLP) full-wave simulations with system-level and TLP measurements. Information on susceptible parts in the device under test (DUT) and/or soft failure sensitivity of the integrated circuits (ICs) are obtained from the measurements. Then, the TLP current spreading within the printed circuit board (PCB) of the DUT is simulated. The susceptible signals can be determined by comparing the simulated voltages and/or currents at the signal terminations with the measured threshold values. If the simulated voltages and/or currents are higher than the threshold values, the signal is considered susceptible and a soft failure may occur in the DUT. Using the obtained information from simulations and measurements, the root causes of soft failures can be identified. Further, by utilizing full-wave simulations, the design of the product can be modified to reduce the electrostatic discharge (ESD) noise on the susceptible signals, and consequently prevent soft failures. The proposed analysis methodology is applied to a tablet which suffers from soft failure. The root cause of the soft failure is identified, and countermeasures are designed against the ESD-induced soft failure. [ABSTRACT FROM AUTHOR]

This paper presents a quasi-static surface-based partial element equivalent circuit (PEEC) model for electromagnetic problems consisting of coupled conductors and heterogeneous dielectrics of finite size. The PEEC model is based on the surface equivalent principle. Unlike the traditional surface-based PEEC models, in which the integral equations are set up by enforcing the field continuity in the true field region, the homogeneous integral equations in this model are obtained by enforcing the tangential null field condition in the null field regions. Simplified integral equations are obtained under the quasi-static assumption, in which the circuit elements carrying electric currents and magnetic charges on the dielectric surfaces are vanished. Consequently, the size of the subcircuit describing dielectrics is reduced significantly compared to the full-wave surface-PEEC (S-PEEC) model. Since the quasi-static S-PEEC model only contains frequency-independent circuit elements, it can be conveniently used for time-domain simulation. Three numerical examples are presented to validate the new PEEC model for typical embedded RF passive components, packaging and interconnection problems in both the frequency domain and the time domain. Excellent agreement is observed between the results of the proposed PEEC model, S-PEEC model, and those of commercial software within the quasi-static frequency range. [ABSTRACT FROM AUTHOR]

In this study, a method is presented for implanting controlled switching taking into account simultaneously the exact values of trapped charge and pre-strike voltage when Circuit Breaker (CB) contacts are approaching each other. This approach is implemented in the EMTP/ATPDraw environment using Transient Analysis of Control Systems routine. By presenting a new approach, the proposed method determines the optimum closing point for CB contacts without imposing any limitation on lineside fluctuations. In order to perform statistical switching, the presented method models the uncertainties of controller circuit, the mechanical circuit of CB, and trapped charge voltage. Unlike the conventional approaches in which the statistical parameters were selected by default, in the presented statistical switching these parameters are estimated based on CB parameters. Furthermore, the presented method is used to calculate the insulation risk caused by controlled switching overvoltage. Simulation results show the accurate and efficient performance of the proposed controlled switching approach in significantly decreasing the risk and the maximum overvoltage created along the line, compared to the conventional CB. So that, insulation risk has decreased to zero and the maximum overvoltage created along the line has decreased to 46%. [ABSTRACT FROM AUTHOR]

In this paper the authors present a multifunctional reconfigurable fractional-order filter performing a low-pass, high-pass, band-pass and band-reject transfer function. The filter is based on two types of active elements, OTA (Operational Transconductance Amplifier) and ACA (Adjustable Current Amplifier). It provides pole frequency control, depending on the values of the transconductance of the OTA elements. The quality factor is also electronically controlled, depending on the amplification of the ACA element. The order of the filter can be changed by switching the fractional-order capacitor having various values of the order. The circuit was implemented as a PCB (Printed Circuit Board) and measured in laboratory conditions. Measurement results are compared with the simulation results. The behavioural models were used for the purpose of the simulation. Index [ABSTRACT FROM AUTHOR]

We present a black-box model of miniature circuit breakers having a realistic physical background. In compliance with basic physics, engineering know-how and magneto-hydro-dynamics arc simulations, two sets of differential-algebraic equations are derived to model air plasma chemical dynamics and its interaction with breaker's physical environment (chamber shape, splitter plates, arc traveling). A numerically efficient and accurate electrical model at the breaker terminals is proposed. Its behavior is shown by comparing simulations with short-circuit experiments. Applications are at system level, including simulation of networks with several breakers, such as multiphase switching transients, selectivity, and coordination with fuses, other breakers and surge protection devices. [ABSTRACT FROM AUTHOR]

This paper presents a new passivity enforcement technique for frequency-dependent network equivalents expressed as rational models. The main feature of the proposed technique is that only a few residues of the rational model are perturbed, so that the passivity enforcement procedure becomes computationally more efficient compared to existing methods. The proposed technique is verified on practical network cases. It is demonstrated that the accuracy of the perturbed model is maintained in frequency-domain fitting and time-domain simulations of transients. [ABSTRACT FROM AUTHOR]

Abstract The paper introduces a novel multi-bit counter for efficient binary multiplication. A 7:3 counter is proposed, customized and optimized by 3-pronged approach, firstly by group-wise parallel addition using half-adders, secondly by eliminating redundant carry-generators from the design and finally, by optimizing the resultant hardware. The circuit is designed and optimized on standard static-CMOS. Corner analyses with TT, FF and SS for PVT-variation have been performed on proposed design to study reliability and robustness. A benchmarking exercise on Power-Delay-Product (PDP) with reported candidate designs demonstrates superiority of the proposed design. The study reveals that the 7:3-counter, designed using proposed strategy, has up to 36% less PDP, compared to the best candidate-design. Next, the proposed counters are employed, first to design an 8-b × 8-b Column-Compression (CC) multiplier and thereafter, using decomposition-logic on thus-designed-8-b × 8-b-multipliers, to design a 16-b × 16-b multiplier. The multipliers are optimized on 90-nm standard-CMOS technology and compared for speed-power performance with reported candidate designs at 500 MHz. Simulations show that the presented design of 16-b × 16-b multiplier using proposed 7:3 counter offers 55% less PDP, compared to the best candidate design under identical conditions. Once again, all simulations are performed on TSMC 90-nm CMOS technology at 25 °C temperature and 1.0 V supply-rail. [ABSTRACT FROM AUTHOR]

A simulation-based design verification process creates a large pool of functional test sequences. Such sequences have several advantages when they are used as manufacturing tests and for defect diagnosis. This brief considers the problem of selecting functional test sequences from a given pool when the goal is to use the sequences for defect diagnosis. The procedure described in this brief relies on the defect diagnosis of faulty units for the selection of sequences. Experimental results for simulated faulty units based on benchmark circuits demonstrate the possibility of learning from a limited set of faulty units which sequences from a given pool are effective for defect diagnosis. [ABSTRACT FROM AUTHOR]

This paper presents a design methodology for a dc-dc power conversion system (PCS) for battery packs. The methodology provides with an optimal design of the PCS and the associated inductive-capacitive filter interfacing the battery pack with the PCS. The PCS adds superior capability over conventional designs, which is performing current and voltage perturbations at the battery terminals for the so-called electrochemical impedance spectroscopy (EIS). This technique is an option for battery state-of-charge (SoC) and state-of-health (SoH) assessment. The design is optimal in the sense that it minimizes volume and system power losses. Such multi-objective optimization is addressed adopting the theory of weighted sum and Pareto front. The methodology is tested through a case study, addressing a lithium-ion battery pack. The offered analyses permit to identify the impact in system performance of diverse design variables such as dc-link voltage for the PCS and its switching frequency. [ABSTRACT FROM AUTHOR]

Switching operations of the disconnecting switch (DS) within high‐voltage gas‐insulated substations generate very fast transient electromagnetic interferences. Fast front pulses induced by these interferences produce high‐level transient currents that can lead to disturbed voltage output of Rogowski coil current transformers (RCTs). Predicting the transient characteristics of RCTs requires the implementation of accurate simulation models of the Rogowski coil. Concentrating on the DS operation process, this paper analyzes the performance of the lumped parameter model (LPM) and the distributed parameter model (DPM) available in the literature by means of comparisons in the time domain and frequency domain between two models, as well as comparisons between simulation results and measurement results in terms of the waveform properties and the distribution of amplitude. It is confirmed that the simulation results based on the DPM show better agreement with the measurements than those based on the LPM. It is also indicated that the maximum amplitude of the RCT output is approximately 580 mV with the dominant frequency of 2 MHz during the fast transient. © 2018 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc. [ABSTRACT FROM AUTHOR]

More and more system operators are interested in calculating transfer capability in real time using real-time power flow models generated from the Energy Management System (EMS). However, in comparing these models with offline study models, the EMS models usually include only a limited portion of the interconnected system. It is not practical to extend the EMS model in order to capture the impact of the external systems and as such using an equivalent network becomes necessary for this purpose. Equivalent circuits derived from the offline models for certain predetermined operating conditions would suffer from invalid results under various real-time operating conditions. Hence, it is necessary to derive an equivalent circuit model that is adaptive to the real-time system conditions. This paper presents a general method of creating an equivalent circuit model based on the measured boundary station parameters such as voltages and power flows. Simulation studies show that such derived equivalent circuit models provide solutions with adequate accuracy. [ABSTRACT FROM AUTHOR]

A dynamic frequency divider using a negative-differential-resistance (NDR) circuit combined with an inductor and a capacitor was demonstrated. This NDR circuit was made of Si-based metal-oxide-semiconductor field-effect transistor (MOS) and SiGe-based heterojunction bipolar transistor devices. The operation of this frequency divider circuit was based on the long-period behavior of the nonlinear NDR circuit generating chaos phenomena. This circuit was analyzed by numerical simulation and the results showed that different dividing ratio could be obtained by modulating the input signal frequency using the MATLAB program and the HSPICE program. Some measured results were shown to verify our analyses. This application was designed based on a standard 0.18 μm BiCMOS technique. [ABSTRACT FROM AUTHOR]

During the arc interruption process, the internal pressure in the arc chamber of a molded-case circuit breaker (MCCB) rises rapidly. In this study, the arc behavior and internal pressure in an MCCB are measured and calculated. First, using computational fluid dynamics, the internal pressure in the arc chamber is computed both with and without a baffle. In the presence of the baffle, it is found that the pressure is similar at various measurement points, whereas without the baffle, obvious differences in pressure are observed. Second, a moving model considering the contact opening process is proposed based on the relationships between the arc positions, arc area, and source terms at a typical point in time. Compared with a fixed arc model, the moving arc model provides a more precise arc distribution and pressure in the arc chamber of an MCCB. [ABSTRACT FROM AUTHOR]

We present a system simulation approach for piezoelectric vibration energy harvesting devices. Accurate modeling of the electromechanical structure is achieved by the finite element method. For consideration of power electronic circuits as a means of energy extraction, the finite element model is iteratively coupled to electric circuits via Simulink. The high computational cost of conventional finite element calculations is overcome by a specialized modal truncation method for general linear piezoelectric structures. In doing so, the simulation approach allows efficient prediction of mechanical quantities (e.g. displacements, stresses) as well as electric potentials in the continuum under the influence of arbitrary electrical circuits. Several examples are studied to validate the truncation approach against analytical models and full finite element models. The applicability of the method is demonstrated for a piezoelectric vibration energy harvester in conjunction with a power electronic circuit. [ABSTRACT FROM AUTHOR]

The sub-threshold circuit design is regarded as a promising technique to provide considerable power reduction for ultra-low-power applications under tight energy constraints. This paper presents Power-Gating Sub-Threshold Source-Coupled Logic (PG-STSCL), which employs the fine-grain power gating at the gate level. It introduces isolation and retention circuits to ensure reliable propagation of data along a pipeline of power gated circuits, called a micro-pipeline. While the conventional STSCL circuits can considerably cut down the active power consumption, they have the drawback of continuous static current flow. To overcome this drawback, the proposed architecture shuts off the static current by utilizing the fine-grain power-gating technique. We have designed a 32-bit adder based on the proposed PG-STSCL gates in a 65 nm CMOS technology. The adder was simulated and compared to reference adders using standard CMOS gates, and conventional STSCL gates. Simulations demonstrated that the proposed gates provide a power reduction of 89.56% and 99.78% when compared to the standard CMOS and STSCL gates, respectively. [ABSTRACT FROM AUTHOR]

Although the near threshold voltage (NTV) design has achieved energy efficiency, certain challenges remain regarding its application. In this paper, we describe the analysis of thermally induced reliability concern in test process. In an NTV environment, the thermal dependency of a circuit delay is changed, and a difference in thermal constraints from that in a nominal voltage design exists. In addition, we propose a new test scheduling method for NTV circuits that alleviates the thermal constraints in system-on-chip test processes. Our simulation results show that the test time could be reduced while minimizing the reliability loss. [ABSTRACT FROM AUTHOR]

In this paper, a new single-ended travelling wave-based protection scheme for double-circuit lines is proposed. It is developed to operate in parallel with traditional phasor-based protective relays and is able to accelerate the tripping time in most fault scenarios. The proposed method considers the propagation of travelling waves in a loop formed by the faulted and healthy line circuits. Disturbances within a given protected zone can be reliably detected according to the amplitude, polarity and time difference between the arrival instants of travelling waves that reach the monitored terminal. Also, the accumulative cross-differential current deviation is used to confirm internal faults, distinguishing them from other non-fault events. From the analysis of massive digital fault simulations and actual field records, it is attested that the proposed protection is feasible and effective. [ABSTRACT FROM AUTHOR]

This study proposes new methods for finding frequency-dependent network equivalents of power systems. Since stability of the time-domain solution is a major concern, additional constraints are added to ensure the stability in both single-port and multi-port network equivalents. For single-port problem, an equivalent circuit consisting of only passive elements is estimated to ensure passivity and, consequently, stability of the time-domain solution. For multi-port case, additional stable branches are added to fit the frequency response data with high accuracy while maintaining stability of the equivalent. Several case studies are considered to evaluate the performance of the proposed approaches. The simulation results prove the efficacy of the proposed methods for finding stable equivalent circuits with high accuracy. [ABSTRACT FROM AUTHOR]

In this paper, power losses in high-speed switched reluctance machine (HS-SRM) is studied considering the copper loss, including skin and proximity effect, iron loss in machine side; switching and conduction losses in the drive circuit side using interactive coupled simulation methods. In high frequency fed electric machines, copper losses are increased due to the skin and proximity effects. Moreover, iron losses play a significant role in total electrical losses. Nevertheless, its computation is not straight. In addition, power electronics switching devices cause both conduction and switching losses in the SRM drive circuit. Switching loss may reach excessive levels with the high-frequency switching. In this study, the losses are calculated detailed though coupled simulation method. Different wire constructions in the bundle are analyzed and compared. Finally, circuit simulation is performed on different switching devices. The results prove that high-speed switched reluctance machine driving and operating efficiency is really sensible to design methodology with suitable material and device selection. [ABSTRACT FROM AUTHOR]

Secondary arc is widely existed in the power system, especially on the high-voltage transmission lines. The extinction of secondary arc is important to the single phase self-reclosing on power transmission lines. In this paper, based on the research of physical characteristics and modelling methods of secondary arcs in recent decades, the research status of the arc experiments, circuit simulation models, arc dynamic models and the extinction criteria were analyzed. The future research prospect of secondary arc is proposed, and the solutions to the key problems are provided. Combining with the dynamic model of the secondary arc, the space-time evolution characteristics can be analyzed, and an on-line suppression method for the dynamic compensation of secondary arc is further proposed. [ABSTRACT FROM AUTHOR]

SUMMARY: In this paper, a SPICE implementation of a memristive model is presented and put under test by means of different circuit configurations. The model is based on sigmoidal threshold functions that switch the parameters involved in the transport equation. Results show that the model is stable under different driving signals, in particular, in multielement circuits. Antiparallel and anti‐series configurations are investigated as well as its application to thresholding devices and 1R1S structures. Copyright © 2017 John Wiley & Sons, Ltd. [ABSTRACT FROM AUTHOR]

A novel strategy based on a zero common mode voltage pulse-width modulation (ZCMV-PWM) technique and zero-sequence circulating current (ZSCC) feedback control is proposed in this study to eliminate ZSCCs between three-level neutral point clamped (NPC) voltage source inverters, with common AC and DC buses, that are operating in parallel. First, an equivalent model of ZSCC in a three-phase three-level NPC inverter paralleled system is developed. Second, on the basis of the analysis of the excitation source of ZSCCs, i.e., the difference in common mode voltages (CMVs) between paralleled inverters, the ZCMV-PWM method is presented to reduce CMVs, and a simple electric circuit is adopted to control ZSCCs and neutral point potential. Finally, simulation and experiment are conducted to illustrate effectiveness of the proposed strategy. Results show that ZSCCs between paralleled inverters can be eliminated effectively under steady and dynamic states. Moreover, the proposed strategy exhibits the advantage of not requiring carrier synchronization. It can be utilized in inverters with different types of filter. [ABSTRACT FROM AUTHOR]

Bus-Invert ( BI ) coding schemes have been used in the circuit design to save power usage by minimizing the number of transitions between successive words. With an increased number of bits for bus width, many other coding schemes like Bus-Shift ( BS ) and Shift-Invert ( SINV ) have been proposed for better power saving. In this paper, we are proposing a new Successive Shift-Invert ( SSINV ) coding scheme where the transmitting data will first be inverted. Then both the original and the inverted word will be shifted circularly for each bit and compared with the data just sent for least hamming distance. Thus, the combination having the least hamming distance with the last sent data will be selected and sent. The proposed method exhibits better power saving compared to other reported methods, but needs one extra control bit than BS ; which add to the computation time. Simulation results show a saving margin of 5–15% in average cases in comparison with BI , BS , and SINV for higher bus width. A VerilogA implementation of SSINV using TSMC 65 nm technology is also presented as a proof of concept. [ABSTRACT FROM AUTHOR]

This paper presents the design consideration on a converged Rx surface acoustic wave (SAW) duplexer module for integrated RF front end. Two different matching-circuit and notch-circuit configurations were examined with importance placed on electrical characteristics (insertion loss and isolation of duplexer) and simplification of module, respectively. From circuit simulations and examinations, we verified that a simplified design was best in terms of both characteristics and space in the case of a finite inductor's Q. We also fabricate a quad-band converged Rx module (Band I + II, V + VIII) using an SAW duplexer and verified that its electrical characteristics agree well with our simulation results. [ABSTRACT FROM AUTHOR]

Recently, many active filter circuits that use only MOS transistors were presented in the literature. In these circuits, instead of passive resistors, transconductances of MOSFETs operating in saturation region are used. Moreover, their parasitic gate to source capacitances are employed instead of passive capacitors. These circuits provide circuit implementation with fewer transistors and eliminate the need for external passive elements. In this study, a MOS-only third order Butterworth filter for high frequency applications has been proposed. The circuit leads to a compact circuit having fewer number of transistors compared to classical active block-based analog counterparts. Simulation results agree well with the theoretical study. [ABSTRACT FROM AUTHOR]

Recently, consumer applications have dramatically created the demand for low-cost and compact gyroscopes. Therefore, on the basis of microelectromechanical systems (MEMS) technology, many gyroscopes have been developed and successfully commercialized. A MEMS gyroscope consists of a MEMS device and an electrical circuit for self-oscillation and angular-rate detection. Since the MEMS device and circuit are interactively related, the entire system should be analyzed together to design or test the gyroscope. In this study, a MEMS vibratory gyroscope is analyzed based on the system dynamic modeling; thus, it can be mathematically expressed and integrated into a circuit simulator. A behavioral simulation of the entire system was conducted to prove the self-oscillation and angular-rate detection and to determine the circuit parameters to be optimized. From the simulation, the operating characteristic according to the vacuum pressure and scale factor was obtained, which indicated similar trends compared with those of the experimental results. The simulation method presented in this paper can be generalized to a wide range of MEMS devices. [ABSTRACT FROM AUTHOR]

Purpose Equivalent Square ( ES) enables the calculation of many radiation quantities for rectangular treatment fields, based only on measurements from square fields. While it is widely applied in radiotherapy, its accuracy, especially for extremely elongated fields, still leaves room for improvement. In this study, we introduce a novel explicit ES formula based on Weighted Power Mean ( WPM) function and compare its performance with the Sterling formula and Vadash/Bjärngard's formula. Methods The proposed WPM formula is [ABSTRACT FROM AUTHOR]

In this paper, we propose a new approach for the robust design of complementary metal-oxide-semiconductor amplifiers based on settling-time specifications. The approach is based on the definition of the separation factors and on the analysis of their role in the settling time. We define a design strategy for being certain that an OTA satisfies the settling-time constraint under any statistical variation of process or design parameters. The proposed strategy is applied to the transistor level design of a two-stage amplifier and a three-stage one. Simulation results, in good agreement with theory, confirm the validity of the proposed approach. Copyright © 2016 John Wiley & Sons, Ltd. [ABSTRACT FROM AUTHOR]

This paper has proposed a new pre-processing stage algorithm to enhance the overall performance of current simplification algorithms in analog circuits. This pre-process stage takes place after the calculation of symbolic transfer function and before the main core of the simplification algorithm. The detailed stages of this pre-process are completely independent of the main simplification and symbolic transfer function algorithm. As such, the pre-process algorithm can be easily added to any simplification algorithm to improve the total simplification performance. The use of this command, which is based on the stack decision method, helps the pre-process algorithm to obtain a high-process speed. Based on the CPU time simulation results for a transfer function with 139 terms, it is expected to have a total CPU time in the simplification of a 9820 term of about 28 to 30 seconds pulse and 1.2 to 4.9 seconds for the pre-process algorithm. Finally, a total method, which involves the combination of this pre-process algorithm with the main simplification algorithm is proposed in, and a CPU time of about 30 to 35 seconds is needed for simplifying a huge transfer function with 9820 terms. The addition of extra pre-process algorithm to the main simplification algorithm will reduce the total CPU time of simulation from 820 to 35 seconds, indicating a reduction of 95% in the total needed simulation time. [ABSTRACT FROM AUTHOR]

This paper presents a novel double-magnetic-source magnetic circuit (DMSMC) with pole shoes (PS) in order to achieve high and uniform air-gap magnetic field in an angular vibration exciter. First, the structure of the DMSMC with PS is proposed based on the demand of the angular displacement of 60°, in which the four pair of permanent magnets are adopted. After that, the DMSMC is modeled and analyzed theoretically by the equivalent circuit method, which has been verified that the magnetic circuit structure can realize high magnetic flux density (MFD) in the axial air-gap. To improve the uniformity of the MFD, the DMSMC with PS is proposed and the role of PS is analyzed by the principle of magnetic flux refraction. Then, the influence factors of the MFD in the air-gap, such as the permanent magnet with or without PS, the parameters of the magnet and the PS, are analyzed with the finite element method. The simulation results demonstrate that the optimized DMSMC with PS can obtain high and uniform MFD in the air-gap. Finally, the experimental results for the angular vibration exciter prototype prove to be well consistent with the simulation results, which further verify the validity of the proposed magnetic circuit structure. [ABSTRACT FROM AUTHOR]

We have developed a circuit particle-in-cell (PIC) coupled model for simulating a pulsed power system, based on a circuit algorithm of a pulsed power supply and a PIC simulation for a magnetically insulated transmission line (MITL) system. The coupled algorithm comprises an external circuit algorithm based on BERTHA and a coupled algorithm for the PIC and circuit interface based on the Mur absorbing boundary condition. In this paper, a simple coaxial MITL with a single linear transformer driver (LTD) was simulated to validate the coupled model compared with PSPICE and BERTHA simulations. The numerical results show that the circuit–PIC coupled model achieved almost the same outputs on the load. The coupled model was then applied to an MITL system driven by ten LTD cavities. The simulation results and experimental results were in agreement, which confirms that the circuit–PIC coupled model could provide a reference for the structural design of experimental apparatuses. [ABSTRACT FROM PUBLISHER]

The increasing issues in scaled Complementary Metal Oxide Semiconductor (CMOS) circuit fabrication favor the flourishing of emerging technologies. Because of their limited sizes, both CMOS and emerging technologies are particularly sensitive to defects that arise during the fabrication process. Their impact is not easy to analyze in order to take the necessary countermeasures, especially in the case of circuits of realistic complexity based on emerging technologies. In this work, we propose a new methodology supported by an efficient and reliable tool for the identification of the impact of faults in complex circuits implemented using the emerging technology we are focusing on in this case: nanomagnetic logic. The methodology is based on three main steps: (i) we performed exhaustive physical-level simulations of basic blocks based on a detailed finite-element tool in order to have a full characterization, to know their properties in presence of defects, and to have a solid reference point for the following steps; (ii) we developed a model ( fanomag) for the basic block behavior suitable for simulations in presence of defects of complex circuits, that is, lighter than a physical level one, but accurate enough to capture the most important features to be inherited at circuit level; (iii) starting from a physical design of complex circuits that we perform using a specific design tool we developed, that is, ToPoliNano, we simulated using fanomag, now embedded in our ToPoliNano tool, the behavior of circuits in presence of multiple sets of fabrication defects using a Monte Carlo approach now included in ToPoliNano as a new feature. In this paper, a specific type of defect is considered as a case study. The framework and methodology are conceived to be easily extended to handle other types of defects and problems due to working conditions that a designer and/or a technologist might want to focus on. The major outcome is then a powerful methodology and tool capable to analyze with a good accuracy nanomagnetic logic complex circuits and architectures both in ideal conditions and in presence of defects with remarkable performance in terms of simulation times. Copyright © 2016 John Wiley & Sons, Ltd. [ABSTRACT FROM AUTHOR]