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The Class Φ2/EF2 amplifier is an attractive topology for high-voltage and high-frequency power conversion because of the high efficiency, reduced device voltage stress, simplicity of gate driving, and load-independent ZVS operation. Due to many degrees of freedom for tuning, previous studies can only solve the single-ended Φ2 circuit using numerical methods. This work focuses on improving the design and operating characteristics of a push–pull Φ2 amplifier with a T network connected between the switch nodes, or a PPT Φ2 amplifier. The PPT Φ2 amplifier has less circulating energy and achieves higher cutoff frequency ƒT than other Φ2/EF2 circuits. We, then, present a series-stacked input configuration to reduce the switch voltage stress and improve the efficiency and power density. A compact 6.78-MHz, 100-V, 300-W prototype converter is demonstrated that uses low-cost Si devices and achieves 96% peak total efficiency and maintains above 94.5% drain efficiency across a wide range of voltage and power. Together with the advances in wide-bandgap semiconductors and magnetic materials, the PPT Φ2 circuit opens more possibilities for the state-of-the-art performance of solid-state RF amplifiers in high-frequency, high-power applications, including wireless charging for electric vehicles, plasma RF drives, and nuclear magnetic resonance spectroscopy. [ABSTRACT FROM AUTHOR]

Single-phase universal-input ac–dc converters are needed in a wide range of applications. This paper presents a novel power factor correction (PFC) architecture that can achieve high-power density and high efficiency for grid-interface power electronics. The multitrack PFC architecture reduces the internal device voltage stress of the power converter subsystems, allowing PFC circuits to maintain zero-voltage-switching at high frequency (1 MHz–4 MHz) across universal input voltage range (85  $\rm V_{\text{ac}}$ –265  $\rm V_{\text{ac}}$). The high performance of the power converter is enabled by delivering power in multiple stacked voltage domains and reconfiguring the power processing paths depending on the input voltage. This multitrack concept can be used together with many other design techniques for PFC systems to create mutual advantages in many function blocks. A prototype 150 W, universal ac input, 12  $\rm V_{\text{dc}}$ output, isolated multitrack PFC system with a power density of 50 W/in $^3$ , and a peak end-to-end efficiency of 92% has been built and tested to verify the effectiveness of the multitrack PFC architecture. [ABSTRACT FROM AUTHOR]

This paper demonstrates a two-stage implementation of a step-down power factor preregulator design that achieves a high efficiency across the entire universal input voltage range ($\text{85}\text{--}\text{265}\,\textrm {V}_{\textrm {rms}}$) for an offline power supply application. In this implementation, a resonant LLC converter supplies power to a boost converter operating in a continuous conduction mode. A variable frequency multiplier technique is used in a resonant LLC converter stage to provide different dc gains and compress the effective input voltage range. The efficiency performance achieved is flatter and higher than other conventional offline power converter design consisting of a boost power factor correction circuit followed by a resonant LLC converter, whose efficiency tends to drop significantly at low-line input voltages. The proposed circuit allows MOSFETs with lower voltage ratings and better conduction/switching characteristics to be used in both converter stages. Both of the LLC stage and boost circuit can be better optimized due to the compressed operation range and better semiconductor switches. A scaling law of power losses versus breakdown voltage requirement for boost circuit under the condition of the same output power is presented. Experimental results demonstrated a flatter high efficiency performance across a wide input range. [ABSTRACT FROM AUTHOR]

This paper introduces a MultiTrack power conversion architecture that represents a new way of combining switched-capacitor circuits and magnetics. The MultiTrack architecture takes advantages of the distributed power processing concept and a hybrid switched-capacitor/magnetics circuit structure. It reduces the voltage ratings on devices, reduces the voltage regulation stress of the system, improves the component utilization, and reduces the sizes of passive components. This architecture is suitable to dc–dc and grid-interface applications that require both isolation and wide voltage conversion range. An 18–80 V input, 5 V, 15 A output, 800 kHz, 0.93 in $^2$ (1/16 brick equivalent) isolated dc–dc converter has been built and tested to verify the effectiveness of this architecture. By employing the MultiTrack architecture, utilizing GaN switches, and operating at higher frequencies, the prototype converter achieves a power density of 457.3 W/in$^3$ and a peak efficiency of 91.3%. Its power density is 3$\times$ higher than the state-of-the-art commercial converters with comparable efficiency across the wide operation range. [ABSTRACT FROM AUTHOR]