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In this article, a novel dual active clamp converter with high voltage gain is proposed for dc–dc applications. The active clamps’ switches turn on and off under zero-current switching (ZCS). In addition, the main switch turns on under ZCS condition, as well. Therefore, switching losses are significantly reduced. The converter is also capable of operating under quasi-resonance (QR) mode. In this mode, switching losses are reduced further by lowering the voltage and current, at which the main switch turns off. In comparison with the conventional interleaved converter, the voltage gain of the proposed converter is almost the same, but the number of semiconductors and switching loss are significantly reduced. The switching frequency of the active clamps’ switches is half of the main switching frequency. The operation principles of the proposed converter are studied in both pulsewidth modulation and QR modes, and the advantages are investigated. A 200-W prototype is implemented to validate the desired functionality of the converter, and experimental results are compared in both modes. [ABSTRACT FROM AUTHOR]

In this paper, total harmonic distortion (THD) minimization of the output voltage of multilevel inverters is discussed. An efficient approach in reducing the harmonic contents of the inverter's output voltage is THD minimization. In multilevel inverters with a fundamental frequency switching strategy (each switch turning on and off once per output cycle), the switching angles can be selected so that the output THD is minimized (such as the so-called optimal-minimization-of-THD strategy). To obtain the optimum switching angles, an optimization algorithm is applied to the output-voltage THD. In three-phase multilevel inverters, the optimization algorithm is commonly applied to the phase voltage of the inverter. This results in the minimum THD in phase voltage but not necessarily in the line-to-line minimum THD, whereas in three-phase applications, the line-voltage harmonics are of the main concern from the load point of view. In this paper, using the genetic algorithm, a THD minimization process is directly applied to the line-to-line voltage of the inverter. This paper is based on a seven-level inverter. To verify the simulation results, a seven-level-cascaded-H-bridge-inverter-based hardware prototype, including an ATMEGA32 AVR microcontroller, has been implemented. Both simulation and experimental results indicate superiority of this approach over the commonly used phase-voltage THD minimization approach. [ABSTRACT FROM AUTHOR]

Multilevel inverters introduce harmonics to the network besides their remarkable advantages. Total harmonic distortion (THD) is one of the most important indexes to evaluate the harmonic contents of waveforms. The conventional method of line-voltage THD calculation gives approximate answers, because high-order harmonics are ignored. In this paper, an analytical algebraic method based on formulating the line-voltage THD of multilevel inverters with unequal dc sources is presented. This method, which is general and applicable to each number of switching angles, is implemented to a five-level inverter with staircase waveform as a case study. The implementing process of this method can be easily repeated for each number of levels. The accuracy of the proposed method is illustrated in comparison with the approximate method. Some advantages of the extracted formulas of line-voltage THD are simplicity and rapidity in calculations, considering all harmonics and the possibility of finding optimal switching angles analytically. Experimental results are presented to validate the theory. [ABSTRACT FROM PUBLISHER]