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With the increasing demand for high-performance power electronic systems, the semiconductor device utilization has gained significant importance. This article proposes the Si/SiC devices based active neutral-point-clamped converter comprising SiC-based H-bridge structure. A novel pulsewidth modulation (PWM) scheme is also proposed that results in an effective utilization of the switching devices. In the proposed converter, the Si devices are soft-switched for all power-factor loading conditions. Therefore, high efficiency can be obtained even at high switching frequency operation with wide range of power factor values. Further, the conduction losses of the SiC mosfets are minimized by strategically selecting the switching states in such a way that the SiC mosfets conduct in parallel conduction paths during the null state operation. This leads to further enhanced efficiency. This article presents the detailed operating principle of the proposed topology operated with the presented PWM scheme. Moreover, a device loss analysis is presented to evaluate the conduction and switching losses of the proposed topology. The presented experimental results validate the performance parameters of the proposed topology with the proposed PWM scheme. Finally, the proposed PWM scheme is compared with the existing PWM schemes using efficiency values of the proposed and some of the prominent existing converter configurations. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC), owing to the presence of a large number of submodules (SMs) and energy storing elements, requires a large footprint and initial investment. To address these issues, this paper proposes the switched modular multilevel converter (SMMC). It consists of two major elements; the chain-links (CLs), consisting of cascade connection of SMs as in MMC, and the single-pole-triple-throw (SPTT) switches, which can be realized using either the T-type or NPC-type switch strings. The SMMC works on the principle of connecting all the phase-legs in series and their respective positions are mutually interchanged. It offers a compact structure as the SMs count is reduced to 33% of MMC, which results in a much lower energy storage requirement. Furthermore, it does not have inter-phase circulating current problem and hence the CL inductors can also be avoided. The SMMC structure, operating principles, control, and modulation schemes are explained in detail. A detailed comparison of SMMC with the other major existing converters is carried out to highlight the important features of SMMC. The efficacy of SMMC is validated using PSCAD simulation studies with a 19-level grid-connected SMMC model. A 3-phase 19-level SMMC laboratory prototype is developed to further validate its feasibility. [ABSTRACT FROM AUTHOR]

The parallel-hybrid converter (PHC) based high-voltage dc (HVdc) plant (PHC-HVdc) mandates the injection of additional harmonic-voltage components into its chain-links (CLs) to regulate its output voltage/modulation index (MI). However, these harmonic voltages are restricted to have limited magnitude and their zero crossings must coincide with the respective output voltages of converter. Hence, the operating range of MI for the PHC-HVdc has narrow limits. This article explores the reactive power compensating capabilities of the PHC based static compensator (PHC-STATCOM), which is relieved from the fixed dc source and is free to operate at any MI without requiring any additional efforts. Two degrees of freedom inherent with PHC-STATCOM are discovered, which proves that PHC is utilized to its maximum when applied for reactive compensation. The capacitor voltages of the PHC-STATCOM belonging to different CLs divert from desired value under unbalanced grid/load conditions. By the virtue of degrees of freedom associated with PHC-STATCOM, a capacitor voltage control technique is proposed using fundamental-frequency zero-sequence voltage (FFZSV). The generalized expression of the reference FFZSV is derived, which regulates the capacitor voltages. The loci planes indicating the maximum range of load unbalance that the PHC-STATCOM can compensate with specific grid voltage conditions is obtained and plotted. The working principles and proposed capacitor control are verified using experimental studies. A detailed comparative study is presented to substantiate the advantages of the proposed topology. [ABSTRACT FROM AUTHOR]

The circulating current and the large energy storage requirement are the two major limitations of the modular multilevel converter (MMC). The circulating current in MMC is majorly, in addition to the dc, second harmonic in nature. If not controlled properly, it results in reduced efficiency and/or increased energy storage requirement (ESR). To enhance the efficiency, the second and the higher order harmonic components in the circulating current of MMC are required to be suppressed. On the other hand, controlling the circulating current to have predefined magnitude and phase angle can reduce the ESR. There are many control methods available in the literature to suppress and, also, to control the second harmonic circulating current (SHCC). These methods are mainly based on sensing the arm current and calculating the SHCC and then suppressing or controlling it based on the set objectives. In this article, two control schemes are proposed to suppress the SHCC and to reduce the ESR. The proposed schemes are based on utilizing the instantaneous voltage signals of the submodule capacitors in MMC. Hence, the sensing and communicating the sensed signal of arm currents can be avoided using the proposed schemes, which increases the reliability and leads to reduced cost and complexity. The efficacy of the proposed control schemes is verified using the simulation studies and also by using the scaled-down lab prototype of a three-phase seven-level MMC. [ABSTRACT FROM AUTHOR]

The active-neutral-point-clamped (ANPC) converter is a prominent topology for medium voltage applications. To realize a high-power-density three-level ANPC converter, silicon carbide (SiC) MOSFETs may be used but they also lead to an extremely high cost. Thus, it is important to properly utilize the SiC switches in order to achieve not only a highly efficient but also a low-cost system. In this article, a three-level enhanced hybrid ANPC (E-HANPC) structure is proposed, which optimally utilizes both Si insulated gate bipolar transistors (IGBTs) and SiC MOSFETs to achieve these objectives. A dedicated modulation scheme is also proposed that enables a reduction in the conduction and switching losses and, hence, higher efficiency is achieved. The presented method optimally distributes the losses amongst the converter switches that leads to enhanced power handling capability of the E-HANPC converter. Moreover, the proposed converter also achieves short-length commutation loops for the high-frequency SiC MOSFETs, which imparts fast-switching capability with reduced overvoltage stress on these switches. To validate the efficacy of the proposed converter and modulation scheme, extensive simulation and analytical studies are performed. A prototype of the single-phase leg of the E-HANPC converter is also developed to validate its feasibility, proposed principles, and reconfirm the simulation and analytical findings. [ABSTRACT FROM AUTHOR]

The parallel hybrid converter (PHC) offers compact and highly efficient converter solution for high-power applications. One of the major drawbacks of PHC is the requirement of a bulky dc-side inductor to minimize the dc ripples. Modified third-harmonic injection method and zero-sequence voltage injection method can minimize these ripples. However, their complete mitigation is not possible with these existing methods. In this letter, a new control scheme is proposed, which eliminates the dc-side voltage/current ripple by injecting a suitable common-mode voltage into the chain-link of PHC. The presented method also increases the ac output voltage for a given dc-link voltage and effective utilization of the available dc voltage is achieved. Hence, an enhanced-PHC (EPHC) topology is achieved. The analyses presented are verified using PSCAD/EMTDC. A 25-level EPHC–HVdc system is also developed to substantiate the applicability of the proposed method for HVdc system. Experimental studies are performed using a three-phase 13-level laboratory prototype in order to verify the simulation outcomes and the findings acquired are observed to be in agreement with the simulation studies. [ABSTRACT FROM AUTHOR]

An H-bridge hybrid modular converter (HBHMC) is proposed for high-voltage direct current (HVDC) applications. It uses a wave-shaping circuit consisting of series-connected full-bridge submodules (FBSMs) at the output of the main H-bridge converter. For a three-phase system, three HBHMCs are connected either in series (series-HBHMC) or in parallel (parallel-HBHMC) across the dc-link. The operating modes of HBHMC, novel modulation strategies for voltage balancing of FBSMs, and control of HBHMC-based HVDC system are presented in this paper. A detailed comparison between HBHMC and other hybrid topologies is performed on the basis of required number of switches and capacitors. The HBHMC has the features of dc fault blocking capability, lower footprint structure, and extra degree of freedom for submodules capacitor voltage balancing. The efficacy of the HBHMC-based HVDC system for three-phase balanced and unbalanced grid conditions and its fault-tolerant capability are validated using PSCAD simulation studies. Furthermore, the feasibility of the proposed converter under normal and dc fault conditions and of the proposed capacitor voltage control scheme is validated experimentally by using a three-phase grid-connected HBHMC laboratory prototype. The results demonstrate the effectiveness of the proposed HBHMC topology, control techniques, and satisfactory responses of the HBHMC-based HVDC system. [ABSTRACT FROM AUTHOR]

Several applications such as power supplies for electric precipitators, ozone generation, partial discharge, etc., require ac superimposed dc (ACsDC) voltage supply. Most of such applications use intransigent systems for producing ACsDC voltages. In this paper, three different kinds of flexible power electronic converters are proposed for producing ACsDC voltages. These converters have two power conversion stages: input and output. In the input stage, two isolated dc voltages are obtained by using an isolated three-port dc–dc converter or two isolated two-port dc–dc converters. In the output stage, one of the input-stage dc voltages is used to generate an ac voltage and the obtained ac voltage is added to the remaining input-stage dc voltage to obtain an ACsDC voltage. Based on the converters used in the input stage, the proposed ACsDC converters are named as a dual active bridge (DAB) converter-based ACsDC converter (DAB-ACsDC), triple port active bridge (TAB) converter-based ACsDC converter (TAB-ACsDC), and dual transformer-based asymmetrical triple port active bridge (DT-ATAB) converter-based ACsDC converter (DTATAB-ACsDC). A detailed analysis of these ACsDC converters and their verifications using simulations and experimental studies are presented, which depict that the proposed converters can be used effectively for producing ACsDC voltages. [ABSTRACT FROM AUTHOR]

The hybrid modular multilevel converter with cascaded full bridges (HMMC-CFB) is a recently proposed dc fault tolerant converter topology for high-power applications. It has a director part (DP) consisting of a series of connected half-bridge submodules, and a wave-shaping part (WSP) composed of a series of connected full-bridge submodules (FBSMs). The submodules in DP avoid high voltage stresses and improve synchronization between DP and WSP by slowing down the change rate of DP output voltage. This slowdown is achieved by using a trapezoidal reference signal for DP. The WSP attenuates the voltage harmonics produced by DP. However, the energy exchanged by WSP changes with modulation index, which may cause improper voltage regulation of the submodule capacitors. This paper proposes a new control technique to regulate the energy exchanged by WSP, which uses a variable slope trapezoidal reference signal of DP. To obtain this slope, the feedforward and feedback controllers are used. The feedforward controller gives the value of slope depending on the modulation index (mv) to keep the energy exchanged by WSP nearly equal to zero, whereas the losses and nonideality of the converter are taken care of by the feedback controller. This technique guarantees proper voltage regulation of the submodule capacitors for all modulation indices. The efficacy of the proposed technique is confirmed using simulations and experimentations. This paper also presents a circulating current suppressing controller for HMMC-CFB. The proposed control schemes and dc fault tolerant capability of HMMC-CFB are tested on a grid-connected model built in PSCAD. [ABSTRACT FROM AUTHOR]

The fault-tolerant multilevel converters are gaining increased interests for high-voltage direct current (HVDC) applications due to their ability to suppress the fault current during dc-side faults. However, most of these topologies use full-bridge submodules (FBSMs) resulting in the requirement of a large number of semiconductor switches. In this paper, a new generalized cross-connected SM (GX-SM) structure is presented, which requires lesser number of switching devices and provides the same functionality as the FBSM. A comparison of the switches required in the different converter topologies using FBSMs and GX-SMs is performed. The performance evaluation of two of the dc-side fault-tolerant converter topologies, namely alternate arm modular multilevel converter (AAMMC) and hybrid cascaded modular multilevel converter (HCMC) with the GX-SM, is performed using simulation studies done in PSCAD/EMTDC. The modulation and control schemes for these GX-SMs-based converters are presented. A new mixed-SM configuration of AAMMC is proposed which utilizes an optimal combination of GX-SMs and half-bridge SMs. The study results demonstrate the effectiveness of the proposed GX-SM structure, and satisfactory responses of the GX-SMs-based AAMMC and HCMC systems controlled using the presented modulation and control strategies under various system conditions. [ABSTRACT FROM PUBLISHER]

Multilevel current source converters are a smart choice for the high-power applications with low-voltage and high-current requirements. This paper presents the detailed analysis of a current source modular multilevel converter (CSMMC) and its application as a STATCOM. Various properties of CSMMC are compared with the voltage-source modular multilevel converter (VSMMC). The submodule inductance selection method and a sorting-based algorithm for inductor current balancing are proposed for CSMMC. The validity of the inductance selection method and the inductor current balancing algorithm are confirmed by the simulation of a three-phase CSMMC using PSCAD/EMTDC. The carrier phase-shifted sinusoidal pulsewidth modulation is used as the switching technique. The performance of a converter is analyzed with interleaved and noninterleaved carrier signals for the upper and lower arms. Results show that CSMMCs and corresponding VSMMCs have analogous features. Hence, the development on VSMMCs can be used for reference to CSMMCs and vice-versa. Furthermore, the control designs for CSMMC-based STATCOM are presented and verified using simulations. The obtained results of the proposed STATCOM show that the steady-state and transient performance of the system are quite satisfactory. This makes the CSMMC suitable for HVDC and flexible ac transmission systems applications. [ABSTRACT FROM PUBLISHER]

The applications of power semiconductors in circuit-breaker (CB) technology can help achieve considerable improvement in its performance and possible new capabilities. In this paper, new trends in power electronics for the applications in CBs are presented. It also summarizes and reviews the appropriate hybrid mechanical-static CB topologies. Various conventional and derived topologies for ac as well as dc applications are described. Discussions about common and future trends in this technology development are presented. This study will provide a useful framework and point of reference for the future development of hybrid CBs for various different applications. [ABSTRACT FROM AUTHOR]

The flying capacitor multicell inverter (FCMI) possesses natural balancing property. With the phase-shifted carrier-based scheme, natural balancing can be achieved in a straightforward manner. However, to achieve natural balancing with the harmonically optimal phase-disposition (PD) carrier-based scheme, the conventional approaches require (n − 1) × (n − 1) trapezoidal carrier signals for an n-level inverter, which is ( n − 1) × (n − 2) times more than that in the standard PD scheme. This paper proposes two improved natural balancing strategies for FCMI under PD scheme, which use the same (n − 1) carrier signals as used in the standard PD scheme. In the first scheme, the on-line detections are performed of (i) the band in which the modulation signal is located, (ii) corresponding period number of the carrier, and (iii) rising or falling half cycle of the carrier waveform to generate the switching signals based on certain rules. In the second strategy, the output voltage level selection is first processed and the switching signals are then generated according to a rule based on preferential cell selection algorithm. These methods are easy to use and can be simply implemented as compared to the other available methods. Simulation and experimental results are presented for a five-level inverter to verify these proposed schemes. [ABSTRACT FROM AUTHOR]

The hysteresis modulation for power electronic converters is attractive in many different applications because of its unmatched dynamic response and wide command-tracking bandwidth. Its application and benefits for two-level converters are well understood, but the extension of this strategy to multilevel converters is still under development. This paper summarizes and reviews the various hysteresis modulation approaches available in the literature for multilevel converters. The pros and cons of various techniques are described and compared for tracking the reference signal in order to attain an adequate switching optimization, excellent dynamic responses and high accuracy in steady-state operation. By using the recently developed multilevel hysteresis modulation approaches, the advantages of using several accessible dc potentials in a multilevel inverter have been fully exploited. All of these hysteresis modulation approaches are tested for tracking a current reference when applied to a five-level inverter. The relevant simulation and experimental results are also presented. This study will provide a useful framework and point of reference for the future development of hysteresis modulation for multilevel converters. [ABSTRACT FROM AUTHOR]