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Self-rectifying memristor (SRM) with high rectification ratio (RR) and nonlinearity (NL) is a superior candidate for 3-D integrated array by effectively tackling the sneak path problem. In this article, we fabricated bilayer Pt/Al2O3/TaO $_{\!{X}}$ /Ta SRMs with a 250-nm feature size, which show record-low < 2-pA operation current, >103 ON-/ OFF-ratio, >104 RR, high uniformity, and good retention. The high resistance [low resistance state (LRS): 1010– $10^{11} \Omega $ , high resistance state (HRS): > $10^{14} \Omega $ ] yields fJ-level switching power consumption. Moreover, the SRMs exhibit superior NL (~104) and ultralow leakage current (~10 fA), leading to a calculated 538-Mbit passive array scalability with the premise of 10% read margin. Detailed mechanism analysis reveals that high RR and NL can be attributed to the high barrier in Pt/Al2O3 and Al2O3/TaO $_{\!{X}}$ interface, respectively, during the resistive switching process. Our work advances the development of SRMs for high-density passive array and even 3-D integration. [ABSTRACT FROM AUTHOR]

We propose an AgGeSe/Al2O3/Pt selector with great potential in a dense memory array. In terms of on-current drive, selectivity, and uniformity, devices with the mixed AgGeSe layer outperform the Ag/Al2O3/Pt device. The introduction of GeSe not only blocks the diffusion of Ag, but also facilitates the backflow of Ag to the active electrode, therefore increasing the on-current. The ultra-high on-current drive (3 mA and 12.7 MA/cm2), high selectivity (1010), small variation, high thermal stability, and steep switching slope (0.27 mV/dec) realized in our AgGeSe/Al2O3/Pt device render it a promising candidate for selector application. [ABSTRACT FROM AUTHOR]

Through oxygen profile engineering, we fabricated W/AlO $_{\mathbf {x}}$ /Al $_{\mathbf {{2}}}~\text{O}_{\mathbf {{3}}}$ /Pt bilayer memristors with a 250-nm feature size. The AlO $_{{\mathbf {x}}}$ fabricated by sputtering serves as an oxygen vacancy source, whereas the Al $_{{\mathbf {{2}}}}~\text{O}_{{\mathbf {{3}}}}$ deposited by atomic layer deposition acts as a dominant resistive switching (RS) layer. Our devices show forming-free RS behaviors with high speed (28 ns), uniform resistance distribution, large on/off ratio ($\sim 10^{{\mathbf {{3}}}}$ @100K, $\sim 10^{{\mathbf {{3}}}}$ @298K, and $\sim 80$ @400K), and good retention. Besides, temperature stability with record high endurance from cryogenic to high-temperature ($10^{{\mathbf {{8}}}}$ @100K, $10^{{\mathbf {{10}}}}$ @298K, and $10^{{\mathbf {{7}}}}$ @400K) is demonstrated, to the best of our knowledge. [ABSTRACT FROM AUTHOR]

In-memory computing architecture is an emerging revolutionary computing paradigm that can break the von Neumann bottleneck. Computing methodology and circuit codesign using the CMOS compatible 1T1R resistive random access memory (RRAM) integration structure is presented in this paper. Functionally complete Boolean logic and arithmetic functions are experimentally demonstrated. With a single 40-nm CMOS process 1T1R unit, each of the 16 binary logics can be realized in two logic steps with an additional readout step for cascading, which shows functional reconfiguration and low computational complexity. Up to 107 cycles of NAND and XOR logic operations are performed to validate the correctness and reliability. Moreover, several fundamental adder circuits are designed and experimentally demonstrated in 1T1R devices as the proof of concept of the 1T1R computing architecture. The adders proposed in this paper include a ripple-carry adder and its optimized design and a carry-select adder, which all show promising advantages in nonvolatility, computation speed, and circuit area. This paper reports the most complex yet efficient RRAM-based 8-bit addition function experimentally so far and lays a solid foundation for constructing the future in-memory computing architecture. [ABSTRACT FROM AUTHOR]

This letter introduces a method of using bipolarity bias voltages in the forming process to effectively reduce the forming voltage of a one-transistor and one-resistance random access memory device. A bipolar incremental-step-pulse programming process is applied, and a complete operation pulse for the forming process is described. This method reduces forming voltage without any cost to the device performance, and the device maintains good reliability. The likely physical mechanism of this bipolar operation is also presented based on the measured electrical characteristics. [ABSTRACT FROM PUBLISHER]

Through ab initio calculations, we propose that the conductive filaments in Pt/HfO2/Pt resistive random access memories are due to HfOx suboxides, possibly tetragonal, where x\leq 1.5 . The electroforming process is initiated by a continuous supply of oxygen Frenkel defect pairs through an electrochemical process. The accumulation of oxygen vacancies leads to metallic suboxide phases, which remain conductive even as ultranarrow 1- {\rm nm}^{2} filaments embedded in an insulating {\rm HfO}_{2}$ matrix. Our experiments further show that the filaments remain as major leakage paths even in the OFF-state. Moreover, thermal heating may increase the OFF-state resistance, implying that there are oxygen interstitials left in the oxide layer, which may recombine with the oxygen vacancies in the filaments at high temperature. [ABSTRACT FROM PUBLISHER]