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This article presents an integrated circuits (ICs) for authentication with visible-light-based interrogation. The design uses an on-chip DC–DC boost regulator that wakes up and supplies remaining circuits via visible light upon interrogation. The data transfer is also performed via visible-light-based communication using on-chip photodiodes. An on-chip PRINCE cipher is used for encryption to provide counterfeit resistance. A prototype test-chip fabricated in 65 nm complementary metal-oxcide-semiconductor (CMOS) consumes 2.29 μW standby power and achieves 53.8 kb/s data receive rate demonstrating ultralow-power interrogation. Measurements of electromagnetic emission-based side-channel attack show that 280000 encryptions are necessary to reveal the secret key of the tag. [ABSTRACT FROM AUTHOR]

This paper demonstrates autotuning of the coefficients of the feedback loop of an inductive integrated voltage regulator (IVR) using an on-chip delay sensor. The proposed approach improves the effective performance of the digital core under variations in the on-die/package integrated passives and transistor process. A 130-nm CMOS test-chip is designed containing a multisampled 125-MHz IVR with a wirebond inductor, on-die capacitor, and all-digital proportional-integral-differential (PID) controller powering a parallel Advanced Encryption Standard (AES) engine. The autotuning is performed using a Vernier delay line based on-chip delay sensor and an all-digital tuning engine. The measurement results demonstrate up to 5.2% improvement in the maximum operating frequency of the AES core using performance-based autotuning. [ABSTRACT FROM AUTHOR]