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This article proposes an improved hybrid parallel compensator (IHPC) for enhancing the power transfer capability of a photovoltaic (PV) grid-connected inverter. A thyristor switched capacitor (TSC) module is used in series with a conventional inductive-coupling voltage source inverter to reduce the dc-link voltage. Under a low dc-link voltage, the voltage across the insulated gate bipolar transistor (IGBT) will also be low, which will reduce the voltage stress of the IGBT, thereby improving the reliability and reducing the loss of the voltage resource inverter. First, the mechanism of reactive compensation for improving the PV inverter power transmission capability is analyzed. Then, the circuit configuration and operating principle of the IHPC are introduced. After that, an optimal control strategy for the IHPC is proposed to address the resonance problem caused by the TSC connected in series with the L filter and to improve the compensation performance of the IHPC. Finally, the effectiveness of the proposed IHPC and the control method is validated by the simulation and experiments. The results show that the IHPC with optimal control strategy can achieve continuous reactive power compensation under a low dc-link voltage, thereby enhance PV power transfer capability. [ABSTRACT FROM AUTHOR]

This paper proposes a dual-function dynamic voltage restorer (DFDVR) with fault current-limiting capability. The new topology can operate under different modes: the short-circuit fault current-limiting mode and the compensation mode for voltage fluctuation. Different functions of the DFDVR are achieved by controlling a brake chopper circuit and antiparallel thyristors. During fault conditions, the antiparallel thyristors are deactivated to protect the dc-side capacitor, and the duration of the on- and off-periods of the semiconductor switch in the brake chopper circuit is controlled to adjust fault current amplitudes. During voltage sags, the antiparallel thyristors are activated, and the brake chopper circuit is turned off by controlling the gate turn-off thyristor in the brake chopper circuit, thus making the DFDVR similar to a conventional DVR. The control scheme and optimal parameter selection of the DFDVR are provided. The design methodology of the DFDVR was verified through simulations performed using the PSCAD/EMTDC software. The experimental results prove the capability and effectiveness of the DFDVR topology. [ABSTRACT FROM AUTHOR]

This paper proposes a combinational voltage booster technique for fault ride-through (FRT) capability enhancement of squirrel-cage induction generators (SCIGs) by a multifunctional series compensator (MFSC). This technique uses a couple of antiparallel thyristors across the ac terminals of a traditional dynamic voltage restorer (DVR). Two control schemes are applied: a DVR mode and a multifunctional mode. The MFSC can operate in the DVR mode to compensate the slight voltage fluctuations/imbalances at the point of common coupling (PCC). Also, when serious voltage sags occur in the line, the MFSC controller deactivates the faulty phase inverter and activates its corresponding thyristors to insert the equivalent impedance to maintain the voltage level during the fault. Then, it switches to DVR mode to improve the recovery time after the fault. An operational algorithm is applied to deal with different voltage sag depths caused by various fault conditions (both symmetrical and asymmetrical faults). Comprehensive simulations were carried out by using PSCAD/EMTDC software, and results show that the proposed technology is a very effective device to improve the FRT capability of the SCIG. A scaled-down experimental verification was carried out. Experimental results confirm the effectiveness of the combinational voltage booster technique of the MFSC for both slight and serious voltage sags. [ABSTRACT FROM AUTHOR]

This paper presents a new multilevel cascaded-type dynamic voltage restorer (MCDVR) with a fault current-limiting function. This topology can operate in two operational modes: 1) a compensation mode for voltage fluctuations and unbalances and 2) short-circuit current-limiting mode. The current-limiting function of the MCDVR is performed by activating antiparallel thyristors during the short-circuit fault, and deactivating them during normal operation. The mathematical model of the MCDVR system is also established in this paper. The control scheme design and optimal parameter selection are outlined based on the detailed theoretical analysis of the converter. The transient states of the MCDVR in the compensation mode and current-limiting mode are also analyzed. Simulation results based on the PSCAD/EMTDC software, and experimental results on a laboratory setup help to validate the proposed topology and the theoretical analysis. [ABSTRACT FROM AUTHOR]

This paper proposes a new fault current limiting dynamic voltage restorer (FCL-DVR) concept. The new topology uses a crowbar bidirectional thyristor switch across the output terminals of a conventional back-to-back DVR. In the event of a load short, the DVR controller will deactivate the faulty phase of the DVR and activate its crowbar thyristor to insert the DVR filter reactor into the grid to limit the fault current. A fault condition is detected by sensing the load current and its rate of change. The FCL-DVR will operate with different protection strategies under different fault conditions. Design of the FCL-DVR involves selecting important parameters, such as DVR power rating, dc link voltage of the DVR, output filter reactors and capacitors, and grid-tied transformers is proposed. The design methodology of the proposed FCL-DVR is fully discussed based on power systems computer aided design (PSCAD)/electromagnetic transients including dc (EMTDC) simulation. A scaled-down experimental verification is also carried out. Both modeling and experimental results confirm the effectiveness of the new FCL-DVR concept for performing both voltage compensation and fault current limiting functions. [ABSTRACT FROM PUBLISHER]