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This paper examines the impact of two important geometrical parameters, namely the thickness and source/drain extensions on the performance of low doped p-type double lateral gate junctionless transistors (DGJLTs). The three dimensional Technology Computer-Aided Design simulation is implemented to calculate the characteristics of the devices with different thickness and source/drain extension and based on that, the parameters such as threshold voltage, transconductance and resistance in saturation region are analyzed. In addition, simulation results provide a physical explanation for the variation of device characteristics given by the variation of geometric parameters, mainly based on investigation of the electric field components and the carries density variation. It is shown that, the variation of the carrier density is the main factor which affects the characteristics of the device when the device's thickness is varied. However, the electric field is mainly responsible for variation of the characteristics when the source/drain extension is changed. [ABSTRACT FROM AUTHOR]

In this paper, we have investigated the characteristics and transport features of junctionless lateral gate transistors via measurement and simulations. The transistor is fabricated using an atomic force microscopy (AFM) nanolithography technique on silicon-on-insulator (SOI) wafer. This work develops our previous examination of the device operation by using 3D numerical simulations to offer a better understanding of the origin of the transistor operation. We compare the experimental measurements and simulation results in the transfer characteristic and drain conductance. We also explore the behavior of the device in on and off states based on the variation of majority and minority carriers' density, electric-field components, and recombination/generation rate of carriers in the active region of the device. We show that the device is a normally on device that can force the current through a depleted region ( off state) and uses bulk conduction instead of surface conduction. We also found that due to the lateral gate design, low-doped channel, and lack of the gate oxide the electrostatic squeezing of the channel effectively forces the device into the off state, but the current improvement by accumulation of carriers is not significant. [ABSTRACT FROM AUTHOR]

• High performance T2SLs-based heterojunction phototransistors were demonstrated. • The HPT exhibits an optical gain of 345.3 at 1.6 μm at room temperature. • A −3 dB cut-off frequency of 5.1 GHz was achieved at 150 K for the HPT. In this study, a comprehensive analysis of the n-p-n infrared heterojunction phototransistors (HPTs) based on Type-II superlattices has been demonstrated. Different kinds of Type-II superlattices were carefully chosen for the emitter, base, and collector to improve the optical performance. The effects of different device parameters include emitter doping concentration, base doping concentration, base thickness and energy bandgap difference between emitter and base on the optical gain of the HPTs have been investigated. By scaling the base thickness to 20 nm, the HPT exhibits an optical gain of 345.3 at 1.6 μm at room temperature. For a 10 μm diameter HPT device, a −3 dB cut-off frequency of 5.1 GHz was achieved under 20 V at 150 K. [ABSTRACT FROM AUTHOR]

In this paper, we investigate the effect of lateral gate design on performance of a p-type double lateral gate junctionless transistors (DGJLTs) with an air gate gap. The impact of lateral gate length, which modifies the real channel length of the device and gate gap variation down to 50 nm which have been found to be the most influential factors in the performance of the device have been comprehensively investigated. The characteristics are demonstrated and compared with a nominal DGJLTs through three-dimensional technology computer-aided design (TCAD) simulation. At constant channel geometry (thickness and width), when the lateral gate length decreases, the results show constant flatband drain current characteristics while the OFF state current (IOFF) increases significantly. On the other hand, by decreasing the air gap the subthreshold current considerably decreases while the flatband current is constant. Moreover, at a certain gate gap, the gates lose control over the channel and the device simply works as a resistor. Electric field component, carriers' density, band edge energies, and recombination rate of the carriers inside the channel in depletion and accumulation regimes are analysed to interpret the variation of output characteristics. [ABSTRACT FROM AUTHOR]