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A switching-state selection scheme for a five-level stacked multilevel inverter for open-end winding motor drive is presented in this article. Using the proposed scheme, converter can be operated with a single dc supply and with zero common-mode voltage. In addition, the switching transition of high-voltage switches occurs at zero-voltage conditions. The degree of freedom provided by the redundant switching-states and voltage vectors of the inverter topology is utilized to design the modulation scheme. The proposed switching-state selection leads to inherent capacitor balancing without using any extra sensors and fundamental frequency switching of the high-voltage switches of the topology. The modulation scheme uses triangular carrier comparison and, hence, avoids the complexity of subsector identification and dwell time calculation. Half-wave symmetry in output waveforms is ensured by maintaining synchronous sampling with constant samples per fundamental cycle. The inverter topology and the effectiveness of the state selection scheme are experimentally validated on an open-end winding induction motor drive, and experimental results showing steady-state and dynamic operations are presented. [ABSTRACT FROM AUTHOR]

This article introduces a family of carrier-based pulse width modulation (PWM) schemes for three-level (3 L) inverter fed motor drive for low-speed operation. The proposed PWM in dual-inverter topology (DIT) simultaneously clamps two phases of each inverter throughout the fundamental cycle, which reduces the switching transition in the pole voltage and common-mode voltage (CMV). Four PWM variants in the family (i.e., PWM-1–PWM-4) are discussed and compared with conventional discontinuous PWM schemes. A mapping of the gating pulse is derived to extend the proposed PWM to a classical 3 L inverter fed star-connected motor drive. The gating pulses are generated using triangular carrier comparison with synchronous sampling. The steady-state and dynamic performances of PWM are validated both in DIT fed open-end winding induction motor (IM) drive and neutral point clamped (NPC) inverter fed star-connected IM drive. It is observed that the proposed PWM gives inherent capacitor voltage balance in the NPC topology. PWM-1 has a higher linear modulation range than conventional zero clamp PWM and leads to reduced CMV in the NPC topology. PWM-2 and PWM-3 give reduced CMV in DIT. PWM-4 has fault tolerance to single-phase open-switch and short-switch failure in DIT. [ABSTRACT FROM AUTHOR]