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Abstract: A new exact formula to determine the substrate resistance and capacitance is presented in this work. It is derived from the solution of the Laplace equations for equivalent problems. It achieves the level of accuracy of standard electromagnetic methods while it is orders of magnitude faster than them. Equations for both rectangular and non-rectangular shapes of interconnect lines which apply to sub-micron technologies are presented. Both data from commercial simulators and measurement data obtained from a fabricated test chip are utilized in order to show the validity of the proposed formula. The results show that the proposed formula succeeds in computing the substrate's resistive and capacitive coupling. [Copyright &y& Elsevier]

Abstract: A new closed-form formula for the computation of the coupling capacitance of metal tiles is presented in this work. It exploits the analytical solution of the Laplace equations of equivalent studied problems. Comparative results are given with two commercial tools employing the boundary element method (BEM) and the finite element method (FEM). The results show that the capacitance value computed by the proposed formula is in close agreement to the value obtained by the simulators. [Copyright &y& Elsevier]

In this paper, a new approach is presented for determining the substrate parameters of an arbitrary doping profile. It is general, technology independent, nonintrusive, and relies on simple direct-current measurements. A single measurement is required for uniform substrates, whereas two more measurements are needed for each additional layer in the multilayer case. Two different kernels are introduced for substrate resistance computation. One features a closed-form analytical solution of the Laplace equations defining the problem under study. The other relies on a geometric formulation of the current streamlines in order to compute the substrate resistance. Both simulations and measurements are exploited in order to show the validity of the proposed scheme. For measurements, data from literature are utilized and also data from a fabricated test chip. The results demonstrate that the proposed method succeeds in computing the substrate parameters fast and with high accuracy. In uniform substrates, the error falls to zero, whereas, in epitaxial substrates, the average error is kept bellow 4%. [ABSTRACT FROM AUTHOR]

Abstract: The problem of computing the capacitance coupling in Very Large Scale Integrated (VLSI) circuits is studied in this work. The proposed method is an approximate extended version of the method of images. The initial problem is formulated here as an optimization problem for the solution of which a genetic algorithm (GA) is employed. The proposed method is fast, general, does not rely on fitting techniques and is applicable to an arbitrary 2D or 3D geometry configuration of conductors. Extensive simulation results are presented for several practical case studies. Comparative results are given with other methods from literature and a commercial tool employing the Finite Element Method (FEM). The results show that the capacitance value computed by our method is in close agreement to the value obtained by the other methods from literature and also by the commercial tool with the average difference ranging between 2% and 5% while demonstrating better scalability as the problem complexity rises. [Copyright &y& Elsevier]