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In this article, a 2.5m five-stage inductive power transfer (IPT) system based on domino cylindrical solenoid coupler (CSC) compensated, respectively, in layers is proposed. The system is considered to be used as 220 kV post insulators application, transferring power for sensors and measuring instruments of smart grids. The distributed series compensation method is applied to double-layer CSC. Compared with the two types of parallel schemes, this method can significantly reduce the current of the main circuit. Compared with the concentrated series compensation method, this method can effectively reduce the resistance caused by the stray capacitance. The interaction between the post insulator and the magnetic coupling structure is analyzed. The circuit model of the system with constant voltage output characteristics is analyzed. A prototype with a maximum efficiency of 66.7% is built. When the power is transferred to a larger value of 77.8W, the efficiency can still reach 62%. Comparing with previous works, the wireless distance is extended while the efficiency is improved. [ABSTRACT FROM AUTHOR]

The overmodulation strategy plays an important role in the field weakening control for high-speed permanent magnet synchronous motor (PMSM) drives. However, the voltage jumps between the output voltage vectors (OVVs) in high overmodulation regions result in the deterioration of both current performance and loading capability. In order to solve this problem, a novel overmodulation strategy based on the voltage vector space division is proposed. The overmodulation regions are divided by the amplitude and the phase of reference voltage vectors to guarantee the continuity of OVVs. When the overmodulation region changes, the voltage jump can be efficiently suppressed, which contributes to eliminating current ripples. In addition, the proposed parallel projection replaces the traditional center projection to increase the modulation index, which can also improve the fundamental voltage amplitude, and make a reduction of the field weakening current and its current overshoot. By improving the utilization of the dc bus voltage, the higher capability of the output torque can be achieved in the field weakening region. Finally, the effectiveness of the proposed strategy is verified on a high-speed surface-mounted PMSM platform by the experimental results. [ABSTRACT FROM AUTHOR]

Communication links, as a part of coordinated control in dc microgrids (MGs), play an essential role in achieving high operational performance. In this article, a bipolar topology based on series modular structure of dc MG is designed, and a complementary dual-window dc bus interacting (CDBI) method which combines droop control with antidroop control is proposed to improve the robustness of system and against communication failure. In the proposed CDBI method, distributed generations regard dc buses as common communication channels for information exchange, and the coordinated control within the dc MGs can be realized through predesigned sequences of voltage pulses without extra communication links. Finally, the proposed symmetrical bipolar structure and communication-free coordinated control scheme have been verified in various cases through rapid control prototype. The experimental results show that the bipolar-type dc MG controlled by the proposed CDBI method can supply high-quality power for a long time even in the case of communication failure. [ABSTRACT FROM AUTHOR]

This article proposes a coordinate impedance compression strategy for high frequency inverter systems. Based on a two parallel inverter structure, the strategy adopts two methodologies: 1) a passive LC network to adjust the current and voltage seen by each inverter module, and 2) an active modulation of the inverter input voltage and output voltage phase to adjust the load current distribution. For the proposed strategy, the resistance and reactance can be compressed coordinately, which can help the inverter to operate in high efficiency load range. The Half-Bridge Class D inverter is taken as an example to be analyzed. A 10-MHz prototype is built and the experimental results verify the correctness and feasibility of the proposed strategy. [ABSTRACT FROM AUTHOR]

Electrolytic capacitorless Vienna rectifiers have many advantages, such as longer lifetime and higher power density. However, the reduced dc-link capacitance aggravates the voltage stress due to the neutral point (NP) fluctuation. In this article, a hybrid modulation strategy combining the modulations of redundant vector and compression vector is proposed, which can realize the NP voltage balance for electrolytic capacitorless Vienna rectifiers. On the basis of analyzing the limitation of NP-balance capability of conventional space vector pulsewidth modulation (PWM) strategy in the region of high modulation index, the negative influence of reduced capacitance on the NP fluctuation and the input current harmonics is revealed. To suppress the NP fluctuation, the compression coefficient is introduced to redistribute the duty cycles of voltage vector, which can reduce the negative effect of medium vector on the NP voltage. In addition, the phase voltage error is modeled to reduce the input current harmonics with the appropriate adjustment factor. The implementation of the proposed strategy is realized by the equivalent carrier-based PWM, which can avoid the sector judgment and angle calculation. By using the proposed strategy, the NP voltage balance and the input current harmonics reduction can be realized simultaneously. The effectiveness of the proposed strategy is verified on an electrolytic capacitorless Vienna rectifier platform. [ABSTRACT FROM AUTHOR]

Sharp LC resonance peak may enlarge inherent harmonics, dominant harmonics of the supply voltage generated by a three-phase diode rectifier, around the resonance frequency, which will intensify fluctuations of the dc-link voltage, and grid currents in motor drives with small dc-link capacitor. In this article, a novel resonance suppression strategy based on inherent harmonics impedance shaping is proposed specially for three-phase input permanent magnet synchronous motor (PMSM) drives with small dc-link capacitor. Instead of increasing the damping of the whole system for resonance suppression, the motor side power disturbance can be reduced by designing the impedance for inherent harmonics around LC resonance frequency based on the new model with the consideration of motor side characteristic. For damping current generation, the angle of the virtual admittance is modified to eliminate the influence of the dc-link voltage sampling delay. Experimental results show the effectiveness of the method on a prototype of electrolytic capacitorless PMSM drive. [ABSTRACT FROM AUTHOR]

Passive diode bridge rectifier with LC filter is widely used in wireless power transfer (WPT) system due to its simple structure and uncontrolled characteristics. However, as the load resistance decreases, its input phase angle will also decrease rapidly until it shows obvious capacitive. Therefore, a novel rectifier topology with an input-series inductor (hereafter called ISIR) is proposed in this article to solve this problem. What is more, the ISIR can avoid the duty cycle loss and improve the dc–dc efficiency. First, the mechanism of ISIR is analyzed in detail combined with the operating status of topology. Then, the inductance and compensation parameters are determined based on theoretical calculation and simulation results. Finally, a prototype with a maximum load of 7 Ω is built to validate the feasibility and effectiveness of ISIR, and 88% efficiency is achieved under this condition. Compared with the traditional method, it has increased by 1.05%. The maximum efficiency of WPT system is as high as 91.14% with the proposed ISIR. [ABSTRACT FROM AUTHOR]

Inductive power transmission has been applied in industries, such as electric vehicles, consumer electronics and biomedical fields. However, there is a long-term key problem in this field that has not been solved. This is the adverse effect of the parasitic capacitance of the coil, which will cause the change of the coil inductance, the reduction of the quality factor and the reduction of efficiency. Especially in the field of long-distance wireless power transmission. The existing technologies all adopt the scheme of sacrificing volume in exchange for the quality factor of the coil. As a result, the volume of the system is very large, and the quality factor of the coil is still not high enough because the influence of parasitic capacitance has not been completely eliminated. Here, we found the solution. Connect compensation capacitors in series to the coil sections to short-circuit the parasitic capacitance and reduce its loss. The designed system has a diameter of 502 mm and a thickness of 22 mm, which can transmit 115.2 W of power within a distance of two meters with an efficiency of 29%. [ABSTRACT FROM AUTHOR]

In this article, a high-performance modified Y-source dc–dc converter is proposed. Comparing with traditional Y-source dc–dc converter, the proposed converter can achieve soft switching characteristics. Due to the discontinuous conduction mode operation of one of the coupled inductor windings and the resonant cell constructed by switch parasitic capacitor, the switch can operate in zero voltage switching (ZVS) and diodes realize zero current switching. Also, the voltage gain of the proposed converter is greatly improved. Meanwhile, the control strategy of hybrid pulsewidth modulation and PFM is adopted to guarantee the ZVS operation within a wide range. A 160 W experimental prototype based on planar coupled inductor is built to verify theoretical analysis and efficiency is up to 94.45% under full load condition. [ABSTRACT FROM AUTHOR]

The nonlinearity of the voltage source inverter (VSI) leads to the error between output voltage and reference voltage, and causes the phase current harmonics. It is necessary to compensate its influence in the fields such as parameter identification, sensorless control, and servo drives. In this article, an industrial solution for VSI nonlinear compensation method based on lookup table (LUT) is introduced. The characteristics of semiconductor devices, equivalent dead-time and influence of parasitic capacitance effects are calculated quantitatively though injecting increase and decrease current during self-commissioning process. The critical current value for parasitic capacitor and the variation of equivalent dead time are verified through different distorted voltage curves. Considering dc-link voltage variation is irresistible for industrial products, 3-D linear interpolation is adopted to compensate the variation of VSI nonlinearity under different voltage conditions. Proposed LUT method does not require VSI datasheet and complicated calculation formula during implementation. Experiments are carried out on a commercial permanent magnet synchronous motor drive system to verify the proposed LUT method. [ABSTRACT FROM AUTHOR]

Inthis article, a two-phase series capacitor dual-path hybrid dc–dc converter with the step-down ratio of less than 1/6 is proposed for the first time. In this converter, the output current is divided into capacitance- and inductance-path, so the average value and ripple of inductance current are reduced. On the same time, the conduction loss caused by inductance equivalent series resistance (ESR) is also reduced. The addition of series capacitor leads to desirable characteristics, including lower switching stress, switching loss, parasitic output capacitance loss on mosfet, automatic phase current balancing, duty ratio extension, etc. A 120 W prototype has been designed to demonstrate theoretical analysis. Obtained efficiency was up to 93.18% at full load. Experimental results show good agreement with theoretical analysis and high feasibility of proposed converters. [ABSTRACT FROM AUTHOR]

In the existing offline inductance identification methods of permanent magnet synchronous machines (PMSMs), dq-axis voltage equations are generally adopted and the inverter nonlinearity compensation is necessary, which complicates the identification process and restricts the generality. In order to solve the problem, an offline inverter-nonlinearity-immune inductance identification method is proposed in this article based on the PMSM equivalent impedance model. The method can identify the dq-axis inductances by injecting both dc and high frequency signals, where the magnetic saturation and the cross saturation are considered. Besides, an inductance surface forming algorithm is introduced based on the bilinear interpolation. The continuous dq-axis inductance surfaces can be then obtained by only a few identified data, so that the time of data sampling and processing is greatly shorten compared with the existing methods. To enhance the accuracy of the identification method, the digital delay error and the sampling error in zero current zone are investigated and compensated. The effectiveness of the proposed method is validated on three different test machines. [ABSTRACT FROM AUTHOR]

The extensive application of vector phase shift modulation method in permanent magnet synchronous motor drive systems with single dc-link current sensor results in obvious current ripple in the low-speed region. The patterns of these ripples vary greatly in different sectors, leading to nonnegligible phase current reconstruction errors. In this article, an estimation of the local average current change rate (ELAC2R) based reconstruction error suppression method within the switching cycle is proposed to resolve this problem. By comparing the actual and the ideal sampling points, the increase of current ripple and the reconstruction error caused by the combination of the vector phase shift and the single current sensor sampling in the low-speed region are modelled and analyzed. Then according to equivalent modelling of the current ripple between the ideal and the actual sampling points, the more accurate phase current information can be quickly obtained based on the sampling value. The compensation process is significantly simplified and the computation burden of the processor is reduced. Experimental results show that the performance of current reconstruction can be improved effectively with less harmonic content with the proposed method. [ABSTRACT FROM AUTHOR]

Beat phenomenon is an important issue for the practical application of electrolytic capacitorless motor drives. In this study, the characteristics of stator current harmonics caused by the voltage sampling delay are analyzed. Further, the beat phenomenon generated from the interaction between the harmonics and the fundamental currents is investigated, and the envelope feature of the stator current is derived mathematically. For the purpose of suppressing the beat phenomenon, a voltage reconstruction strategy is proposed to reduce the influence of dc-link voltage sampling delay at the six times of grid frequency. By utilizing the reconstructed dc-link voltage for calculation of PWM duty ratio, the beat phenomenon can be attenuated significantly. The proposed method can be integrated into motor control system easily. Experimental results show the effectiveness of the proposed strategy in a prototype of electrolytic capacitorless permanent magnet synchronous motor drive. [ABSTRACT FROM AUTHOR]

In the voltage source inverter applications, inverter nonlinearities would affect the parameter identification process in many ways. Hence, this article proposes an offline identification method for resistance and dq-axis inductance surface by considering the inverter nonlinearity characteristics. A variable amplitude square-wave injection (VASI) scheme is proposed for the dq-axis inductance identification. The VASI method achieves the inductance identification with a novel data sampling strategy. Meanwhile, it can also establish the inductance surfaces by only a few identified data points with a polynomial fitting algorithm, which greatly reduces the identification time compared with the existing methods. The resistance identification is realized by a slope signal injection method, in which the effect of IGBT voltage drop is analyzed. In order to improve the identification accuracy, the inverter nonlinearities are compensated by a self-learning method considering the zero-axis voltage at different rotor positions. At the same time, the sampling error in zero current zones of abc-phases is researched. In order to verify the effectiveness and generality, the proposed method is carried out on two different test machines and confirmed by finite element analysis. [ABSTRACT FROM AUTHOR]

In this article, a 10 MHz dc/dc converter based on three-dimensional air core transformer with zero-phase difference synchronous driving signals is designed. By using the characteristics of no leakage inductance in the inner winding of the nested toroidal air core transformer, the phase difference between the output voltage of the inverter and the input voltage of the rectifier can be regarded as zero, so that the rectifier and the inverter can use the same driving signal, which simplifies the control of the synchronous rectifier switches, and realizes the reliable and efficient synchronous rectification control at 10 MHz. The prototypes with primary and secondary compensation are proposed and the experimental results verify the feasibility of the proposed control method and numerical design method. [ABSTRACT FROM AUTHOR]

Under weak grid condition, negative influence is brought in on system stability because the grid impedance and the grid-connected converter control system are coupled to each other. The key factor affecting the stability of the system is the perturbation of the voltage fluctuation at the point of common coupling (PCC) to the phase-locked loop (PLL) and the dc-link voltage loop. In this article, the impedance model of a three-phase grid-connected converter, including the current loop, PLL, and dc-link voltage loop in the dq frame, is adopted, because it includes coupling information of the converter and reflects the transferring relationship among grid-connected system variables. Based on the transferring relationship, this article analyzes the perturbation paths of PCC voltage and proposes the corresponding compensation methods, i.e., the PLL and dc-link voltage loop compensation terms, which are inserted into the q and d axes of the current loop controller, respectively. The impedance analysis results show that the proposed method can effectively improve the system stability. In addition, the experimental results verify the correctness of the theoretical analysis and the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

Many reduced common mode voltage (CMV) modulation methods have been proposed for three-level inverters. However, most of them suffer from large current distortion because only part of the available base vectors is utilized. The interleaved paralleling can reduce both CMV and the output current distortion, though the CMV reduction is limited and large zero-sequence circulating current (ZSCC) is inevitably caused by the phase-shifted carriers. To further reduce the CMV while maintaining smaller current distortion and ZSCC, a five-level reduced CMV (RCMV) modulation method is proposed in this article, which treats the parallel inverters as a whole. Theoretical analysis reveals that the integrated modulation provides additional base vectors that contribute to smaller total harmonic distortion (THD) of the current, and the selected vectors ensure the nearest-three-vector synthesis and half-reduced CMV. The switching sequences design and neutral point balancing strategy are also developed for dual-parallel three-level inverters, ensuring that the average circulating current is zero and the neutral point voltage is balanced, which are both critical to the proper operation of parallel inverters. Superior performance in terms of CMV, THD, and ZSCC provided by the proposed method in comparison with conventional modulation is verified by comprehensive simulation and experimental results. [ABSTRACT FROM AUTHOR]

Bipolar LVdc distribution is a promising solution for better integration of renewables and enhancement of system efficiency and reliability, but it also faces the challenge of pole voltage imbalance. By simple modifications of the bidirectional CLLC dc/dc converter, this article presents a dc/dc converter with integrated pole voltage balance capability. The converter presents less number of semiconductors, smaller overall footprint, and lower power loss compared to the employment of additional pole voltage balancers. Operating principle of this dc/dc converter and its inherent pole voltage balancing capability are explained, while further control scheme is also developed to compensate the small pole voltage difference caused by the dead time effect. Simulation results with 150 kW/±375 V bipolar output demonstrate the effectiveness of the converter, and the experimental results from a 500 W/±50 V downscaled prototype further prove the proposed concept. [ABSTRACT FROM AUTHOR]

In the transition process from the base-speed region to the field-weakening region of induction motor (IM), the voltage margin would suddenly disappear due to the limited inverter voltage. This insufficient voltage margin would deteriorate the current control of IM, causing severe voltage saturation and current ripple. To address this problem, a circular arc voltage trajectory method is proposed with the smooth transition-combined field-weakening controller. The voltage and current behavior are analyzed quantitatively during the transition process. The theoretical analysis shows that the studied circular arc trajectory can suppress the sudden decrease of the voltage increasing rate in the transition region, leading to the reduced voltage saturation and current ripple. The sufficient voltage margin and smooth current can be realized at the cost of < 10% voltage utilization ratio. The effectiveness of the studied method is verified by contrast experiments on an ARM-based 3.7-kW IM platform. [ABSTRACT FROM AUTHOR]

• A detailed impedance model of the DFIG system is established. • The relationship between voltage disturbance and controller output can be obtained. • Disturbance compensation is introduced into the controller under weak grid condition. • Compensation control implemented in RSC and GSC can improve the stability better. This paper proposes a grid voltage disturbance compensation control for the stability of the DFIG system under weak grid conditions. A detailed impedance model of the DFIG system, including the generator, the inner and outer control loops of the rotor side converter (RSC) and grid side converter (GSC), the DC-link and phase locked loop (PLL) dynamic, is developed in the d-q synchronous reference frame. Based on the proposed model, the relationship between the outputs of the controllers and the grid voltage disturbance at the point of common coupling (PCC) can be obtained. Then, the compensation control of the grid voltage disturbance is integrated to the current controllers of RSC and GSC to improve the stability of the DFIG system connected to the weak grid. In this paper, the effectiveness of the proposed compensation control strategy is proved using the generalized Nyquist criterion (GNC), which illustrates that the compensation control strategy implemented in RSC and GSC simultaneously has a better ability to maintain the stability of the DFIG system under weak grid conditions than only one side applied. The simulation results verify the analysis. [ABSTRACT FROM AUTHOR]