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This article proposes a novel continuous pulsewidth modulation (CPWM) method to reduce dc-link current harmonics in voltage source inverters over wide range of load power factor. This modulation method contributes to a current stress reduction of dc-link smoothing capacitor and a suppression of its temperature rise. Furthermore, high-cost digital hardware, such as a field-programmable gate array, is not necessary because this modulation is implemented with only one carrier. The dc-link current harmonics are reduced by shifting voltage references in every half control period to reduce a fluctuation of the dc-link current around its average value. Experimental results confirm that the application of the proposed CPWM reduces the dc-link current harmonics by 24.2% at most and lowers an equilibrium capacitor temperature by 6.0 °C compared to the conventional CPWM. [ABSTRACT FROM AUTHOR]

This paper presents a high power density design for a step-down rectifier incorporating a modular multilevel converter (MMC) in a power system connected to a 6.6 kV ac grid. In particular, the relationship among the number of cells, the output voltage of the MMC, and the overall volume is clarified. A proposed design flowchart focuses on minimizing volumes of cell capacitors, heat sinks, and arm inductors by using optimal number of cells. Moreover, the commercial electrolytic capacitors are used as the cell capacitor. Besides, the formulae used to determine the ripple currents in the electrolytic capacitor and the arm inductor are presented, along with that for the semiconductor loss. Each of these formulae were verified experimentally using a miniature model and theoretical values from all formulae agree with the measured values within minimal deviations that are discussed with regard to the design of a practical converter for a 6.6 kV system. Finally, the conditions necessary to achieve high power density in an MMC are provided, based on volume evaluations of the electrolytic capacitor, the arm inductor, and the heat sink. Using this optimization process, an MMC design achieved a volume reduction of approximately 90% compared to a conventional system. [ABSTRACT FROM PUBLISHER]

This paper discusses a new circuit configuration and a new control method for a single-phase ac–dc converter with power factor (P.F.) correction and a power pulsation decoupling function. The proposed converter can achieve low total harmonic distortion (THD) on the input current and the power pulsation decoupling function between the input and output sides, which allows low output voltage ripple even on a small output energy buffer at the same time using an active buffer. Therefore, the proposed converter does not require large smoothing capacitors or large smoothing inductors. The buffering energy is stored by a small capacitor, which controls the variation of the capacitor voltage through the active buffer. In this paper, the fundamental operations of the proposed converter are investigated experimentally. The experimental results reveal that the input current THD is 1.44%, the rate of the output voltage ripple is 6.33%, and the input P.F. is over 99%. In addition, a maximum efficiency of over 96% is obtained for a 750-W prototype converter. [ABSTRACT FROM PUBLISHER]

Control strategy and loss evaluation is discussed for a proposed dc/ac two-stage boost converter using the neutral point of a motor. The proposed converter consists of a small boost chopper and a three-phase inverter, which has a boost-up function from the use of the leakage inductance of a motor, instead of a boost-up reactor, for dc to ac conversion. A six-step operation strategy is proposed for the circuit. When the inverter part outputs a square waveform of 180^\circ, the input current has a distortion because the neutral point voltage of the motor fluctuates at a frequency three times the output frequency. The input current is also shown distorted due to the neutral point voltage fluctuation. Feedforward compensation is proposed to reduce the input current fluctuation. In addition, the dc current in the proposed circuit is imposed into the phase current of the motor. Loss evaluation is therefore implemented to investigate the influence of the imposed dc current on the experimental results. Also, finite-element method was used to analyze the motor loss for a 1.5-kW interior-permanent-magnet motor. [ABSTRACT FROM PUBLISHER]

In this paper, a beatless control that enables unity input power factor for the single-pulse operation in the matrix converter is proposed. The proposed method controls the output voltage to synchronize with the output current in terms of voltage–time product during the high output frequency operation. Following the proposed synchronous control method, the beat current is suppressed by approximately 1% at output frequency 1432 Hz. The experimental results also demonstrate that the input current waveform achieves sinusoidal waveform with unity power factor. In addition, the voltage transfer ratio of the matrix converter is improved from 0.866 to 0.955 in the high output frequency region. The maximum efficiency 96.4% is achieved at a 1.34-kW RL load. [ABSTRACT FROM AUTHOR]

This paper discusses two overmodulation controls, namely, square wave and trapezoidal, in the indirect matrix converter (IMC) for motor drive application. The differences between these two modulations are analyzed based on the output–input voltage transfer ratio (VTR), the efficiency, and the current total harmonic distortions under two load conditions. Moreover, the performance is then improved by implementing four-step commutation methods in the primary side of the IMC. The validity of the proposed methods will be demonstrated through simulation and experimentally. The experimental results show that the VTR can be improved from 0.866 to 0.97 in the square wave modulation and 0.92 for the trapezoidal wave modulation in an induction motor drive system. [ABSTRACT FROM PUBLISHER]

This paper proposes a new circuit topology for a multilevel pulse width modulation (PWM) rectifier. The proposed method forms a new circuit by combining a diode clamp-type topology with a flying capacitor-type topology. The proposed circuit uses only 12 switches, despite the use of a five-level three-phase PWM rectifier. Further, the proposed circuit can obtain good performance, same as a conventional multilevel circuit. This paper describes about the features of the proposed topology; the control strategy and the loss analysis that is estimated by a circuit simulator. In addition, the basic operation of the proposed method is confirmed by simulation and experimental results. The proposed converter achieved total harmonic distortion of 3.4% for the input current and efficiency of 97.4% for a 1 kW class experimental setup. [ABSTRACT FROM AUTHOR]

This paper proposes a zero-voltage ride-through (ZVRT) method and an LCL filter design method to meet the fault ride-through (FRT) requirements for a single-phase grid-connected inverter with a minimized LCL filter. A high inverter output current overshoot occurs at a grid voltage sag and a grid voltage recovery, when a low-inductance LCL filter design is employed in order to minimize the filter volume. In order to suppress the current overshoot, a high-speed gate-block operation and the design method of the minimized LCL filter are proposed. In particular, the filter design considers the delay time in the gate-block operation in order to clarify the reduction limitation of the inductance in the LCL filter. As a result, the maximum inverter output current overshoot is suppressed to 146% by the high-speed gate-block operation and the designed LCL filter, where the impedances of an interconnected inductor and a filter inductor are 1.0% and 0.78% of the inverter normalized impedance, respectively. Therefore, it is possible to meet the FRT requirements with the proposed ZVRT method even with the minimized LCL filter. [ABSTRACT FROM AUTHOR]

This paper proposes a new circuit configuration and a control scheme for a single-phase current-source inverter with a power decoupling circuit which is called as the active buffer. The proposed inverter achieves a low-dc-input voltage ripple and also provides a sinusoidal current that can achieve unity power factor, without large passive components in the dc bus such as smoothing inductors and electrolytic capacitors. These components are conventionally required in order to decouple the power pulsation caused by the single-phase power source. In this paper, the fundamental operations of the proposed inverter are demonstrated experimentally. From the experimental results, the input voltage ripple is 8.87%, and the output current total harmonic distortion is 4.24%. In addition, an output power factor of 99% and a maximum efficiency of 94.9% are obtained. Finally, it is confirmed that the maximum power densities of the conventional circuit and the proposed circuit are 2.75 kW/L at the switching frequency of 70 kHz and 4.86 kW/L at the switching frequency of 80 kHz, respectively. [ABSTRACT FROM AUTHOR]

This paper proposes a control method for a dual active bridge (DAB) converter, which achieves both a reduction in the nonlinear transmission power error due to the dead‐time and a reduction in the inductor current with a three‐level operation. The nonlinear transmission power error is compensated by designing a zero current period in the inductor current with the three‐level operation. In addition, an inductor current reduction method for the three‐level operation is also proposed. In the nonlinear transmission power error compensation method, the inductor current is reduced by suppressing the circulating current by considering the zero‐current period to be the dead‐time. The validity of the proposed method is confirmed using a 2.0‐kW prototype. The experimental results show that the transmission power error is reduced by up to 85.1%. In addition, the inductor current is reduced by up to 64.1% and the loss is reduced by up to 58.6%. Moreover, the DC offset is eliminated by utilizing the voltage polarity reverse phenomenon in the voltage control. [ABSTRACT FROM AUTHOR]