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This paper presents the design and analysis of an LO chain implemented using the CMOS 65 nm bulk process. The LO chain was fabricated for driving the short-range radar IQ mixer in the 77∼81 GHz band. The LO chain comprised a poly phase filter (PPF), driver amplifiers to compensate for PPF losses, and a 3-bit 7-dB attenuator to ensure the appropriate power conditions. Measurement results indicated that the maximum gain within the target band was 8 dB, and the gain and phase difference between the IQ outputs were 0.5 dB and 74°, respectively. The LO chain consumed 74 mW of power at 1 V, and the size of the fabricated chip was 1.027×0.45 mm², including RF and DC pads. [ABSTRACT FROM AUTHOR]

This paper presents the design of a driving amplifier intended for use in W-band RFICs. The amplifier adopts a differential two-stage common-source configuration to ensure robust output power. Furthermore, it has been enhanced through the incorporation of a neutralized capacitor to improve stability and maximize gain. The driving amplifier was fabricated using a 65-nm bulk CMOS process for validation. The measured performance of the amplifier demonstrated characteristics, including an input/output return loss exceeding 10 dB and a peak gain of 14.1 dB, achieved within the frequency range of 77∼88 GHz. The power consumption of the amplifier was only 34 mW at a voltage of 1 V, and it exhibited an OP1dB of 3.8 dBm. The size of the driving amplifier, excluding DC and RF pads, was 0.401×0.14 mm². [ABSTRACT FROM AUTHOR]

This paper discusses the design of a W-band down-conversion mixer, fabricated using a 65-nm bulk CMOS process. The mixer employs a passive double-balanced structure, resulting in no power consumption. It includes LC matching circuits for RF and LO input voltage amplification via resonance and RC filter circuits for precise IF signal separation. The manufactured mixer measured 0.614×0.25 mm², including RF and DC pads. Measurement results showed input return losses of more than 8 dB, a maximum conversion gain of －5.5 dB, and RF-IF isolation of 37.3 dB at 77–81 GHz. [ABSTRACT FROM AUTHOR]

This paper presents the design of W-band Wilkinson power divider using 65 nm bulk CMOS process. In this design, the quarter-wavelength (λ/4) transmission line was replaced with a lumped element, and a CRC structure was applied to the isolation network circuit. In addition, a metal wall was installed between the two output lines to enhance isolation. This power divider had a maximum insertion loss of 1.93 dB and a minimum isolation of 13.3 dB in the 75~110 GHz band. The return loss was more than 7.2 dB, and the size of the core was 0.2×0.12 mm². [ABSTRACT FROM AUTHOR]

This article presents the design of a W-band wideband low-noise amplifier (LNA) using a 65-nm bulk complementary metal-oxide semiconductor process. A negative feedback transformer is used as an input matching network for wideband matching of the LNA. The transformer is composed of the input shunt inductor and the source inductor of the transistor. The transformer is optimized to achieve low-noise performance and to prevent gain degradation while achieving wideband matching. The LNA has a size of 0.45×0.53 mm, including radio frequency and direct-current pads. As a result of the design, the return loss is more than 10 dB in the 75-85 GHz band, with a peak gain of 17 dB and a minimum noise figure of 4.8 dB. [ABSTRACT FROM AUTHOR]