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This paper describes the design and implementation of a virtual machine oriented towards the execution of concurrent programs written in the high level language EDISON defined by P. Brinch Hansen in [1] and [2]. The target machine specification includes primitives reflecting typical constructs of source programs. For instance, there are primitives realizing directly those source operations involving array type and set type variables; instructions to create, synchronize, and to kill processes etc. As required by the source language, the virtual machine implements the concept of Conditional Critical Regions [3]. EDISON programs are translated to target code before their actual interpretation. Some virtual machine interpreters were implemented: first we developed two interpreters in high level language; next an interpreter in ASSEMBLY language; and finally we implemented a μ-programmed version of the virtual machine. Some performance figures of the interpretation are included in the appendix.

In an earlier work we have introduced an Architecture Description Language (ADL for short) and its support system implemented in a machine-independent fashion [5]. This system provides facilities for teaching and research in computer architecture: target machines described in ADL are fed into the support system, and the corresponding interpreter programs are automatically generated. These programs reproduced the run-time environment of the target, as specified by the ADL description, including the interpretation of the target code. This paper presents a brief review of the language and the implementation of its support system. Next, the new constructs that have been incorporated into ADL to give an extended version (ADL-X) are described. Through these mechanisms, designers can specify and synchronize target machine activities occuring in parallel. Finally, we show how the new support system is being implemented, and give a description of a pipeline machine, using the new language features.

The specification and implementation of a machine oriented to the execution of programs written in applicative languages is presented. Source programs are translated into a intermediate form which is interpreted by the target architecture: a normal graph reduction machine based on combinators. Some interpreters for this reduction machine were implemented. In this way, we developed interpreters in the C language, in ASSEMBLY language, and finally a microprogrammed version of the target architecture. The paper shows the relevant aspects of the reduction machine design and the current stage of the project.

This paper describes the design and realization of MPH, a Hybrid Parallel Machine, which is intended to be used as a tool for research in parallel computing. MPH is a multiprocessor system whose processors are arranged according to a hypercubic topology but with interprocessor communication being realized through memory segments which are shared by each pair of processors. The resulting machine incorporates the characteristics of both loosely and tightly coupled architectures, hence its hybrid nature. In addition to the design and implementation issues, the paper also describes the research potential of MPH, and the current stage of the work.

Este trabalho contém a apresentação de um projeto cujo objetivo primário é a investigação da compilação e uso de Prolog Concorrente. O projeto apresenta problemas em diversas disciplinas, incluindo Programação Lógica e Processamento Distribuído. A intenção é que seja utilizada uma arquitetura em hipercubo baseada no microprocessador Transputer e na linguagem OCCAM. Problemas a serem investigados incluem a compilação eficiente de programas em Prolog Concorrente e o balanceamento de carga em sistemas distribuídos.

COORDENAÇÃO DE APERFEIÇOAMENTO DO PESSOAL DE ENSINO SUPERIOR FUNDAÇÃO DE APOIO À PESQUISA DO ESTADO DO RIO DE JANEIRO DEMOLAN (Descrição de Máquinas Orientadas para Linguagem de Alto Nível) é uma ferramenta para avaliação de arquiteturas de computadores a nível de concepção. O projetista não só verifica se o projeto está correto, mas também tem a facilidade de experimentar uma série de alternativas de projeto. DEMOLAN além de ser uma linguagem para a especificação e descrição de arquiteturas de computadores orientados para linguagens de alto nível, é também um compilador que permite gerar um simulador da arquitetura descrita na linguagem DEMOLAN. A comprovação do funcionamento do sistema DEMOLAN foi feito a partir da descrição de três estilos diversos de arquiteturas: SECD (uma máquina orientadora para o LISP), PLM (uma máquina orientadora para o PROLOG) e SPLM (uma máquina orientadora para a linguagem Student-PL). DEMOLAN (Description of Hight-Level Language Oriented Machines) is a tool for computer architecture evaluation at a conception level. The user not only verifies the design, but also is able to try anternative project. DEMOLAN is a language for high-level language computer especification and description, and also a compiler that enables the creation of an architecture sumilator. To demontrate the DEMOLAN system, three diferent styles of architecture were described: SECD (a LISP oriented machine), PLM (a prolong oriented machine) and SPLM (a Student-PL language oriented machine).