77 results on '"Mattausch, Hans Jurgen"'
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52. Human recognition with a hardware-accelerated multi-prototype learning and classification system
53. Cluster-Based Prototype Learning System for Multiple Applications with Flexible HW/SW Codesign
54. Digital associative memory for word-parrallel Manhattan-distance-based vector quantization
55. Real-time hybrid learning and recognition system with software-hardware cooperation
56. Optimization Vector Quantization by Adaptive Associative-Memory-Based Codebook Learning in Combination with Huffman Coding
57. Low-power word-parallel nearest-Hamming-distance search circuit based on frequency mapping
58. A scalable massively parallel processor for real-time image processing
59. Associative-memory-based prototype LSI with recognition and on-line learning capability and its application to handwritten characters
60. VLSI-architecture for enabling multiple parallel associative searches with standard SRAM macros
61. Fully parallel associative memory with human memory type learning model
62. Efficient Vertical/Horizontal-Space 1D-DCT Processing Based on Massive-Parallel Matrix-Processing Engine
63. Developing a Reliable Learning Model for Cognitive Classification Tasks Using an Associative Memory
64. An FPGA-Based Region-Growing Video Segmentation System with Boundary-Scan-Only LSI Architecture
65. Application of Multi-ported CAM for Parallel Coding
66. MOSFET Harmonic Distortion up to the Cutoff Frequency: Measurement and Theoretical Analysis
67. Bank-Type Associative Memory for High-Speed Nearest Manhattan Distance Search in Large Reference-Pattern Space
68. Digital Low-Power Real-Time Video Segmentation by Region Growing
69. Automatic Pattern-Learning Architecture Based on Associative Memory and Short/Long Term Storage Concept
70. Bank-Type Multiport Register File for Highly-Parallel Processors
71. A Hierarchical 512-Kbit SRAM with 8 Read/Write Ports in 130nm CMOS
72. Combined Data/Instruction Cache with Bank-Based Multi-Port Architecture
73. Low-Power Real-Time Region-Growing Image-Segmentation in 0.35μm CMOS due to Subdivided-Image and Boundary-Active-Only Architectures
74. Fully Parallel Nearest Manhattan-Distance-Search Memory With Large Reference-Pattern Number
75. Low-Complexity, Highly-Parallel Color Motion-Picture Segmentation Architecture for Compact Digital CMOS Implementation
76. Fast and Compact Central Arbiter for High Access-Bit-Rate Multi-Port Caches
77. Localized stable electrical passivation of the thermal oxide on nonplanar polycrystalline silicon.
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