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Quantum-dot Cellular Automata (QCA) is one of the approaches to synthesizing circuits with high density and low power dissipation to conquer pitfalls of CMOS. In QCA, the performance relies on the primitive gate count, which can be optimized by minimizing the gate count. On the other hand, proper cell layout, scalability, and reliability of the circuit can be ensured with the utilization of a regular clocking scheme. The impact of Genetic Algorithm (GA) in gate count optimization on regular clock based QCA circuits is analyzed in this research. Few multi-output boolean functions are realized using an elitism-based method considering USE and RES clocking schemes. A performance study with respect to energy consumption, QCA cost, and fault tolerance are analyzed in this work. Circuits are realized in QCADesigner. QCAPro and QCADesignerE are used for energy dissipation analysis, whereas HDLQ is used for fault tolerance analysis. The result witnessed an oscillating observation in the performance of the USE and RES clocking schemes. [ABSTRACT FROM AUTHOR]

Introduction: Coronary heart disease (CHD) in Indians has reached an epidemic proportion and has the highest rate amongst all ethnic groups studied CAD occurring in Indians are often premature (<40 years of age) a generally follows a malignant course. The incidence of classical risk factors is low although high triglyceride, low HDL cholesterol, high Lp (a) level, hyperinsulinemia and central obesity show a substantial prevalence. Aims: To correlate the risk factors with coronary artery disease, angiographic characteristics individually in females, males, smokers, diabetics, patients with multiple risk factors and find out number of vessels involved in different subgroups. Materials and method: The present study was single centre institution based prospective study. This study conducted from Two years (from January 2014 to December 2015) in a tertiary care hospital of West Bengal. 50 patients were included in this study. Result: Proportion of male 40(80.0%) were higher than female 10(20.0%). Approximately one-fifth 9(18.0%) of the patients were Diabetes in this study. 16 (32.0%) patients had history of premature CAD. In this study, 33(66.0%) had no Hypertension but 1734.0%) had Hypertension. almost one third of the study population had Hypertension, again attributable to obesity, lack of exercise, smoking etc. Among arteries LAD was the most commonly involved (46.0%). Proximal lesion was more common, lesions were mostly focal, Patients with MI had thrombotic occlusion. Echocardiography showed RWMA in 18 cases (36.0%). This echo includes all patients with RWMA including ACS. ECG was found to be abnormal in 39 (78.0%) patients, in the form of ST-T changes, ST elevation, T wave changes. LV Dysfunction was present in 18 cases. In this study, 15(30.0%) patients were treated medically, PICA was done in 31(60%) patients and 4(8.0%) patients underwent CABG. Conclusion: we concluded that the risk factors with coronary artery disease, angiographic characteristics and number of vessels involved in different subgroups. [ABSTRACT FROM AUTHOR]

The transistor-based CMOS technology is facing tremendous physical challenges in nano-scale design. The Quantum-dot cellular automata (QCA) have attracted the research focus as aviable alternative to CMOS technology for future designs in the nano-scale. The cell interaction property helps in information propagation in QCA. The three-input majority gate, Inverter gate are the basic building blocks. The fabrication complexity can be optimised with coplanar and clock-based wire crossing techniques. Due to its low power feature, QCA has been experiencing significant power dissipation in its wire crossing and logic-driving cell, which needs special care. Moreover, various challenges to logic synthesis are associated with design automation and integration. Underlying metal wire crossing is another concern in the implementation of a regular clocking circuit. Extensive design proposals in QCA have been studied bypassing regular clocking and ends up with a question of proper fabrication or buildability. This research proposes an emerging technique to develop an efficient, scalable regular clocking scheme incorporating minimal metal wire crossing. The proposed clocking is employed for the cost-effective and power-efficient circuit design in both the sequential and the combinational approach. QCADesigner is used for circuit synthesis, whereas QCAPro and QCADesignerE have been utilised for energy dissipation analysis. [ABSTRACT FROM AUTHOR]