51. Power-Optimized Temperature-Distributed Digital Data Link
- Author
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Deepnarayan Gupta, Su-Wei Chang, Prasana Ravindran, Amol Inamdar, S. Sarwana, V. V. Dotsenko, and Joseph C. Bardin
- Subjects
Cryostat ,business.industry ,Computer science ,Amplifier ,Electrical engineering ,Distributed amplifier ,Condensed Matter Physics ,Noise (electronics) ,Electronic, Optical and Magnetic Materials ,Interfacing ,Rapid single flux quantum ,Electronics ,Electrical and Electronic Engineering ,business ,Data transmission - Abstract
Interfacing superconducting rapid single flux quantum logic with room temperature electronics requires the development of low-power semiconductor circuitry capable of operating at tens of Gb/s while maintaining sufficient signal to noise to achieve acceptable bit-error-rates. Such data-links must operate with sufficiently low power consumption to permit tens to hundreds of parallel channels to coexist in a single cryostat. This requires a careful trade-off between the power and noise performance of the cryogenically cooled digital amplifiers. Previously demonstrated ultra low-power cryogenic-to-room temperature digital data links have been limited to data rates on the order of a few Gb/s. In this paper we demonstrate a temperature distributed amplifier chain optimized for 30 Gb/s data transmission and consuming just 140 microwatts at 4 K.
- Published
- 2015