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Resist processing for future technology nodes becomes more and more complex. The resist film thickness is getting thinner and hardmask concepts (trilayer) are needed for reproducible etch transfer into the stack. Additional layers between resist and substrate are influencing the electron scattering in e-beam lithography and may also improve sensitivity and resolution. In this study, bare silicon wafers with different assisting underlayers were processed in a 300 mm CMOS manufacturing environment and were exposed on a 50 keV VISTEC SB3050DW variable-shaped electron beam direct writer at Fraunhofer CNT. The underlayers are organic-inorganic hybrid coatings with different metal additives. The negative-tone resist was evaluated in terms of contrast, sensitivity, resolution and LWR/LER as a function of the stack. The interactions between resist and different assisting underlayers on e-beam direct writing will be investigated. These layers could be used to optimize the trade-off among resolution, LWR and sensitivity in future applications.

We present a new simulation method predicting thicknesses of thin films obtained by atomic layer deposition in high aspect ratio 3D geometries as they appear in MEMS manufacturing. The method features a Monte-Carlo computation of film deposition in free molecular flow, as well as in the Knudsen and diffusive gas regime, applicable for large structures. We compare our approach to analytic and simulation results from the literature. The capability of the method is demonstrated by a comparison to experimental film thicknesses in a large 3D structure. Finally, the feasability to extract process parameters, i.e. sticking coefficients is shown.

In this paper, the authors present the temperature dependent sticking coefficient (SC) of bis-diethyl aminosilane (BDEAS) and trimethylaluminum (TMA) in atomic layer deposition. SiO2 from BDEAS and ozone at substrate temperatures between 200 and 350 °C as well as Al2O3 from TMA and water deposited at substrate temperatures between 150 and 300 °C was deposited on our likewise in this journal published cavity test structures. The SC of BDEAS shows an Arrhenius dependence while for TMA no temperature dependent SC could be resolved. The activation energy for BDEAS which is extracted from a linear fit to the Arrhenius diagram is compared to the value gained by density functional theory calculations from the literature. Furthermore, the different growth behavior of BDEAS and TMA under substrate temperature considerations is identified with different deposition regimes as proposed in the literature.

The authors present a new method to determine film thicknesses and sticking coefficients (SC) of precursor molecules for atomic layer deposition (ALD) in high aspect ratio three dimensional (3D) geometries as they appear in microelectromechanical system manufacturing. The method combines a specifically designed experimental test structure with the theoretical predictions from a novel 3D Monte Carlo process simulation for large structures. The authors exemplify our method using Al2O3 and SiO2 ALD processes. SCs for trimethylaluminium and bis-diethyl aminosilane (BDEAS) are extracted. The SC for BDEAS is determined for the first time.

For thermal ALD Ta"xN"yC"z films improved growth behaviour and Cu diffusion barrier performance are demonstrated by applying a plasma treatment prior to film deposition, in particular on low-k dielectrics. Two different kinds of ALD processes for depositing thermal ALD Ta"xN"yC"z films are applied in this study, involving either TBTDET or PDMAT as a precursor. Ammonia is used as a reactant and Ar as a purging gas in both processes. Within the experiment, two types of pre-treatments prior to ALD are investigated: a wet-chemical pre-treatment using diluted (0.5%) HF, and plasma pre-treatments using Ar/H"2 or N"2 plasmas. It is examined by transmission electron microscopy (TEM) from a microstuctural perspective whether improved growth behaviour of thermal ALD Ta"xN"yC"z films can be achieved by applying a plasma treatment prior to film deposition. The Cu diffusion barrier properties of 10-15nm ALD TaNC films are then evaluated by bias temperature stress (BTS) and triangular voltage sweep (TVS) measurements on metal-insulator-semiconductor (MIS) test structures, after annealing at up to 600^oC under H"2/N"2 atmosphere. The results imply that, from a process side, thermal ALD TaNC films can intrinsically achieve a Cu diffusion barrier performance similar to PVD TaN. However, if no treatment was applied, Cu drift occurred.

Chemical-mechanical planarization (CMP) is one of the most demanding process steps in interconnect integration. Therefore, with respect to the pad roughness, we systematically characterize and model the planarization of special CMP test chips, which emulate integrated circuit (IC) layouts. Therefore, a novel pad roughness characterization methodology is developed and used for the extraction of important pad surface parameters like the mean asperities radius of curvature and the asperities size distribution. The obtained pad surface data is used for the derivation of a novel chip scale CMP model based on the Greenwood-Williamson theory. It is validated by experimental data from CMP test structures containing variations of both pattern-density and pattern-size and describes the wafer topology evolution with high accuracy throughout the planarization process, indicating a strong impact of the asperities size distribution on the planarization in test chip areas having trench widths smaller than the mean asperities radius of curvature.

Chemical-mechanical planarization (CMP) is one of the most demanding process steps in interconnect integration, because it is influenced by numerous variables. Among them is the roughness of the polishing pad. Therefore we systematically characterize the break-in process and the pad surface abrasion due to the pad-wafer contact in absence of conditioning. For this we use the pad roughness characterization methodology presented in [1] to extract important roughness parameters like the mean asperities radius of curvature and the asperity density. The subsequent comparison of the pad surface characteristics at different process stages allows the estimation of the break-in time required to achieve a steady state pad texture that enables stable removal rates from wafer to wafer. In addition, by characterizing the abrasion of the pad asperities due to their interaction with the wafer, the contact height between pad and wafer is estimated and the removal rate decay in the absence of conditioning can be modeled.

Low temperature etching of Si with SF"6 has been studied, using a DECR system and a special Helicon type plasma source. In contrast to the current understanding of low temperature etching, we did not observe a ''freezing'' of the lateral etching reaction, but obtained isotropic etch profiles, even at temperatures below -120^o C. Anisotropic etch profiles are obtained by an addition of O"2. We therefore propose a sidewall passivation mechanism to explain the reduction of the lateral etching. Si etch rates of [email protected]/min at selectivities Si/SiO"2 well above 100/1, with anisotropic profile have been obtained.

ALD-Co(W) was found to have a potential to replace the conventional PVD-Ta/TaN bi-layer in further shrinking interconnects as a single-layered barrier/liner material. We could confirm good barrier property of CVD/ALD-Co(W) film by BTS-TVS method after 350 °C annealing. ALD-Co(W) showed lower resistivity of 60 µΩ-cm and good adhesion to Cu. Complete trench filling with Co(W) followed by Cu seed deposition was demonstrated. These properties were confirmed to be derived from W stuffing into grain boundaries of oxygen-free ALD-Co(W) films. We would like to suggest ALD-Co(W) as a next-generation barrier/liner layer for future development.

To fulfill the requirements of future technology nodes new resists with high resolution, high sensitivity and low LWR and LER respectively are needed. A new inorganic non-chemically amplified resist (XE15IB, an experimental resist provided by Inpria Corp.) was investigated. The resist is spin-cast from aqueous solution and is based on hafnium oxide. Metal oxide based resist as XE15IB supersede other resist materials due to its high etch resistance. 1, 2 This new material can be considered as a direct patternable spin on hard mask. XE15IB was processed in a 300mm complementary metal oxide semiconductor (CMOS) manufacturing environment and exposed on a 50 kV VISTEC SB3050DW variable shaped electron beam direct writer at Fraunhofer Center Nanoelectronic Technologies (CNT). The resist was evaluated in terms of contrast, sensitivity and resolution. The process characteristics required for CMOS manufacturing such as delay stability were also examined. Furthermore, by printing a large static random access Memory (SRAM) pattern (design CD of 22 nm), the exposure of a real application pattern was demonstrated.

We developed Fluor-based RIE processes to fabricate nanoimprint template in silicon and to transfer patterns from the imprint resist to the silicon substrate. The etched silicon patterns have slightly tapered and smooth sidewalls. The sidewall angle can be controlled between 85° and 90° by varying the ratio of the used gas. The dimension of the etched structures is identical with the patterns in the resist. We demonstrated line structures in silicon substrate down to 50 nm. The etching rate is over 100 nm per minute and the maximal achieved aspect ratio is more than 10.

Soft imprint templates trend to deformation when imprint forces are added. This deformation occurs both in the macro aspect (unevenness of the imprint resist layer through the whole imprint area) and in the micro aspect (deformation of single structure). These deformations will be transferred directly to the imprint resist after its curing and thus influence the imprint results. An understanding of these deformation behaviors depending on the template geometry and the imprint process parameters is necessary for the process development. In this work the deformation behaviors of the polymer soft imprint template was analyzed using finite element method (FEM) and experimentally investigated.

Two inorganic non-chemically amplified resists (XE15CB and XE15IB) were investigated. The resists are based on hafnium oxide sulfate and spin-cast from aqueous solution. They differ in sensitivity and resolution. In contrast to other studies, the materials were coated for the first time on 300 mm wafers and exposed on a 50 kV VISTEC SB3050DW variable shaped electron beam direct writer in a near-production environment at Fraunhofer CNT. In this paper, the evaluation of this resist family and its feasibility for production will be discussed. The resists were evaluated in terms of contrast, sensitivity and resolution. The process characteristics required for CMOS manufacturing such as delay stability were also examined. Furthermore, by exposing a large SRAM pattern (design CD of 22 nm), the exposure of a real application pattern was demonstrated.

Depositing ultra-thin metallic films with an accurate control of the film properties (like film thickness, surface roughness and electrical properties) both in the initial and in the progressed film growth regime is a critical challenge. Monitoring atomic layer deposition processes by spectroscopic ellipsometry allows film thickness control in the sub-nanometer range. In addition, ellipsometry serves as a powerful technique for process analysis as it covers many relevant issues, like the evaluation of substrate temperatures as well as the quantification of film properties during the entire ALD process (i. e. in all relevant growth regimes).

In the back end of line (BEOL) processing of advanced microprocessors several levels (ten or more) of wiring and associated via (interconnects) are required. Through these wiring-via levels signal and power can be carried throughout the chip and to the chip carrier. The semiconductor industry uses the dual damascene approach to fabricate a wiring- and a via-level simultaneously. However, the dual damascene processing requires more than twenty process steps for one wiring-via level. For an advanced microprocessor with more than ten wiring-via levels the step count for interconnects exceeds that for front end processing. Currently, the dual damascene processing is becoming the most time-consuming step in the processing sequence and affects the throughput of the semiconductor industry essentially. In this work we present a novel approach to fabricate a multi-tier structure for dual damascene processing based on UV nanoimprint lithography (UV-NIL). By using a soft polymer (PDMS) template with multi-tier patterns, a dual damascene structure for one wiring level and one via level can be directly imprinted in a functional dielectric material simultaneously. This UV-NIL based dual damascene processing reduces the total process steps drastically. The possibility of UV-NIL for dual damascene processing and imprintable dielectric materials as interlayer dielectric (ILD) will be discussed.

The use of Through Silicon Via (TSV) extends to different areas of electronics. Besides its utilization for logic and memory chips, a growing attention has been spent to sensor applications in the last years. Each application has its specific requirements which affect the whole processing scheme. Typically TSV's are generated by filling blind holes with copper and thinning the wafer afterwards, or by coating through holes with copper. Here we present an alternative concept which can be applied for biochemical sensors, so that a blind hole is created stopping on a SiO 2 membrane. By this the need for a post wafer thinning is avoided.

In this study Ru-Mn alloys are discussed in terms of some of the major questions that are typically associated with the development of new types of barriers. First, the Cu diffusion barrier performance after annealing at high temperatures and under subsequent bias temperature stress is investigated, on SiO 2 and on low-k dielectrics. Second, the origin of the barrier performance - either a self forming barrier caused by segregation of an alloyed element, or the stuffing of grain boundaries - is investigated, since this is of importance with regard to an electromigration barrier at the bottom of a via. Third, Cu plating and Cu adhesion behavior are addressed, since they are also important with regard to electromigration, specifically along the side walls of trenches. Fourth, the blocking of oxygen diffusion is investigated. Furthermore, down-scaling of the Mn content to a lowest possible level is pursued in order to reduce line and via resistances.

Chemical-mechanical planarization (CMP) is one of the most demanding process steps in interconnect integration. Therefore we systematically investigate the planarization of adjacent line-space structures, which emulate IC layouts, as a function of the conditioning process. The interrelation between conditioning, pad roughness and planarization is evaluated by a novel pad roughness characterization methodology. Using this approach, tribological parameters can be correlated to important CMP properties like global step reduction and blanket removal rate, enabling planarization improvements for patterned dielectrics and metals.

Capacitance-time measurements have been used to determine the transient water absorption of a Benzocyclobute (BCB) film. To derive the absolute amount of water from the capacitance change the Debye equation was applied with the assumption, that the absorbed water can be considered as single molecules without any interactions to each other and to the low-k dielectric. The results have been verified by using a microbalance system which allows a direct determination of the amount of water in the dielectric layer.

Erratum: Investigation of Argon Plasma Damage on Ultra Low-κ Dielectrics [ECS J. Solid State Sci. Technol., 4, N3023 (2015)] C. Kubasch,a T. Olawumi,a H. Ruelke,b U. Mayer,b and J. W. Barthaa aTechnische Universitat Dresden, Fakultat Elektrotechnik und Informationstechnik, Institut fur Halbleiterund Mikrosystemtechnik, 01062 Dresden, Germany bGLOBALFOUNDRIES Dresden Module One, Limited Liability Company & Co. KG, 01109 Dresden, Germany

A force‐sensor technique was developed to determine small forces in‐situ in a scanning electron microscope (SEM), enabling to investigate elastic and plastic deformation modes and corresponding critical strains in single silicon lamellae. Large elastic deformations were obtained, matching with modeling of the Si deformation behavior by finite element analysis. This technique is shown to be applicable also to copper structures obtained after filling of the space between the Si lamellae and subsequent etching. The obtained mechanical properties of the structures on a nanoscale are important for the design of present and next‐generation microprocessors.

In situ investigations of the chemical and mechanical mechanisms during CMP processes require analytical access to the wafer surface while interacting with the slurry and the pad under polishing conditions. In this study me make use of novel, specifically prepared, and self-designed Si wafer called microstructured single reflection elements (mSRE) utilizing the IR transparency of silicon [1]. The mSRE's enable in and ex situ attenuated total reflection (ATR) Fourier transform infrared (FTIR) investigations at the interface between silicon and the ambient with an enhanced usable spectral range. So, a thin silicon oxide layer or the polishing slurry can be investigated in the entire mid and far infrared spectral region. These mSRE wafers were placed at a simple reflection accessory of a FTIR spectrometer and either wet etched by a buffered oxide etch or polished using a CMP equivalent polishing configuration. During CMP the change of typical vibration bands of SiO2 layers and slurry constituents are observed. It was shown that the sensitivity as well as the surface selectivity of the experimental setup enables slurry and thin-film characterisations within the thickness range of monolayers. Surprisingly, the spectral features of the pad have not been observed during the polishing investigations.

In this work, a possible way to enhance the epitaxial growth of metastable, tensile strained SixC1 − x layers by the addition of germanium is demonstrated. During ultra-high vacuum chemical vapor deposition growth, the co-mixing of germane to the SixC1 − x precursors was found to enhance the growth rate by a factor of ~ 3 compared to the growth of pure SixC1 − x. Furthermore, an increase of the amount of substitutional incorporated carbon has been observed. Selective SixGeyC1 − x − y deposition processes utilizing a cyclic deposition were developed to integrate epitaxial tensile strained layers into source and drain areas of n-channel transistors.

A novel internal reflection element (IRE) for attenuated total reflection Fourier transform infrared (ATR-FT-IR) spectral acquisition is introduced and applied for several surface-sensitive measurements. It is based on microstructured double-side-polished (100) silicon wafers with v-shaped grooves of {111} facets on their backside. These facets of the so-called “microstructured single-reflection elements” (mSRE) are formed by a crystal-oriented anisotropic wet etching process within a conventional wafer structuring process. They are used to couple infrared radiation into and out of the IRE. In contrast to the application of the commonly used silicon multiple-reflection elements (MRE), the new elements provide single-reflection ATR measurements at the opposite wafer side by using simple reflection accessories without any special collimation. Due to the short light path, the spectral range covers the entire mid-infrared region with a high optical throughput, including the range of silicon lattice vibrations from 300 to 1500 cm−1. In addition to typical ATR applications, i.e., the measurement of bulk liquids and soft materials, the new reflection elements can be effectively used and customer-specifically designed for in situ and ex situ investigations of aqueous solutions, thin films, and monolayers on Si. Examples presented in this article are in situ etching of native as well as thermal SiO2 and characterization of polydimethylsiloxane (PDMS) films on Si under various measuring conditions.

In this study, the effect of the addition of electrolytes in a given ionic strength to various high-purity silica suspensions was investigated by measurement of the removal rates (RR's) in CMP processes on oxide layers under the same experimental conditions. As so-called slurries the following suspensions were used: i) silica sols produced by the Stöber process, ii) conventional silica sols based on alkali silicate as well as iii) suspensions of fumed silica, with the same SiO2 concentration in each suspension. Ionic strength of the added electrolyte was adjusted to e.g. 0.065 mol/l, with the electrolytes being HCl, NH4Cl, KOH, or binary mixtures of these substances.These investigations revealed significant differences of the polishing behaviour between the different types of silica dispersions as slurries. While for the Stöber sols investigated, the RR's are highest in the acidic range and almost negligible in the alkaline pH range, fumed silica suspensions show an entirely different behaviour: RR is very low for acidic pH-values, and increases with the alkalinity of the slurry. In contrast to these observations, the RR's of slurries based on conventional silica sols are highest around the neutral point, and show a decrease for both more alkaline and acidic pH-values. In comparison to the other two types of material, these suspensions have a high amount of electrolyte background, originating from their manufacturing process.A model is developed to explain these results in a comprehensive manner. It involves effects of the electrolyte type and the ionic strengths as well as influences of the particle size.

Silicon germanium (SiGe) is considered to substitute silicon (Si) as channel material of p-type MOSFET in future CMOS generations due to its higher hole mobility. In this work we investigate SiGe channels with a germanium concentration of 23 at% and 30 at%, even though the mobility is expected to be higher with even more germanium in the alloy. Low pressure chemical vapor deposition was used for SiGe deposition. A state of the art CMOS process including high-k dielectric and metal gate electrode was applied for fabrication of sub 50 nm gate length devices. As expected from the SiGe channel conduction and valence band offset the threshold voltage of the devices is influenced. The gate stack was directly deposited onto the SiGe layer consisting of a chemically grown base oxide, hafnium-based dielectric and titanium nitride gate electrode. C-V and I-V measurements show comparable CET and leakage values for the high-k metal gate stack on Si and SiGe channels. The trap density at the channel dielectric interface was determined using the charge pumping technique. The device characteristics of n- and p-MOSFETs with SiGe channels are compared to conventional Si channel devices. Short channel mobility was extracted with the gM,LIN-Method.

Tantalum carbonitride thin films were deposited by plasma-enhanced atomic layer deposition using the metallorganic precursor tert-butylimido tris (diethylamido) tantalum and hydrogen/argon direct plasma with 600 W radio frequency power. Within the atomic layer deposition temperature window, which ranges from below 200 to 260 degrees C, films grow with similar to 0.35 angstrom/cycle. At a substrate temperature of 250 degrees C, the process yields Ta2CN films with an oxygen impurity content of below 5 atom %. These films have a cubic nanocrystalline structure, a high density of 13-14 g/cm(3), as well as an excellent low resistivity of 160 mu Omega cm. Furthermore, the films show copper diffusion barrier performance comparable to stoichiometric physical vapor deposition TaN and a feasible wetting on multiwall carbon nanotubes. The interface between the tantalum carbonitride film and the silicon substrate was investigated using analytical electron microscopy and shows nitrogen and carbon agglomeration.

The resolution limit in e-beam lithography is dependent on the resist process, the proximity effect, and the e-beam writer itself. However, it is difficult to distinguish these contributions just by comparing critical dimensions (CDs) of isolated and dense lines. Since the calculation of the parameter ? of the point-spread function is usually based on the CD measurement of resist structures, ? should include all mentioned contributions. Therefore, the total blur ?total can be defined as the square root of the squared sums of ?process, ?forward scattering, and ?beam blur. With keeping ?process constant, the authors compared Gaussian beam (GB) and variable shaped beam (VSB) writers via the isofocal-dose method and proved that the isofocal dose is independent of the beam profile. For further comparison, they enhanced the method to the linewidth roughness and the total blur. For the latter, a special frequency modulated pattern was applied, which enables the determination of ?total in dependency on the focus. The analysis of the total blur in best focus and the resolution of dense lines, exposed in a negative chemically amplified resist on GB and VSB writers, indicates their proportionality, which is supported by the same analysis with a nonchemically amplified resist. The resolution of the VSB writer cannot be directly compared to the GB writers' resolution since the beam blur of the former changes with the shot size.

We measure the temperature coefficient of the reflectivity of Si at a red wavelength of 633 nm that is much larger than the Si band gap, and at an infrared wavelength of 1047 nm that is close to the band gap. Our reflectivity measurement is done over a temperature range from room temperature to 200 °C, with an accuracy of better than 1 part in 105. Our results show that the temperature coefficient for the infrared reflection is over three times larger than that for the red reflection over the temperature range studied. Our results and technique can be useful for remote monitoring of temperatures of Si or other materials.

In this work, the epitaxial growth of Si 1− x C x alloys using an Ultra High Vacuum Chemical Vapor Deposition (UHV-CVD) system was studied. Si 1− x C x layers were grown in a temperature range of 550–650 °C and characterized using rocking curve X-ray diffraction (XRD), atomic force microscopy (AFM) as well as Fourier transform infrared spectroscopy (FT-IR). It was found that with increasing carbon precursor flow (Methylsilane) the amount of substitutional carbon rises up to a critical value. After a maximum in substitutional carbon content is reached, a further increase of carbon fraction leads to a reduction of the strain. By FT-IR, the non-substitutional carbon was determined to form 3C-SiC precipitates already during growth. A strong correlation between the increase of Methylsilane flow and the formation of coherent precipitates even at low carbon fractions was observed. A low deposition temperature was found to promote the precipitation of 3C-SiC.

Ta based films are important building blocks for modern microelectronic applications. To meet the requirements of miniaturization, atomic layer deposition appears to be an alternative technology in comparison to PVD and CVD. In the present paper investigations of a thermal TBTDET ALD process will be presented with emphasis to the first ALD reaction cycles on native silicon oxide and HF etched silicon surfaces. The investigations show that the substrate chemistry is a crucial parameter for the film growth and appears to be a key to control the ALD deposition. The investigations were done by XPS without any vacuum break between the deposition and the surface analysis.

Thermal and plasma enhanced atomic layer deposition (ALD) of tantalum nitride (TaN) thin films have been performed using PDMAT and NH3, and TBTDET in combination with hydrogen radicals and argon ions, respectively. The films were grown on SiO2, SiCOH and Cu, to study the influence of diverse kinds of substrates on growth behaviour and properties of ultra thin TaN layers. X-ray reflectometry (XRR), transmission electron microscopy (TEM) and X-ray photoelectron spectroscopy (XPS) were used to characterize these films. Their step coverage in 65 nm technology test structures and Cu diffusion into bare Si- wafers were also investigated. In the case of thermal ALD resulting non-metallic Ta-N-C films show good growth behaviour on SiO2 and Cu, but some difficulties were revealed on SiCOH. Contrary, the use of plasma led to Ta-C-N films on all three substrates. They are rather tantalum carbide in nature and possess resistivities of less than 300 muOmegacm. A 1 nm PEALD barrier proved to be stable against Cu diffusion during a 30 min anneal at 400degC.

The interest in vertical organic transistors as a means to overcome the limitations of conventional organic field-effect transistors (OFETs) has been growing steadily in recent years. Current vertical architectures, however, often suffer from a lack of parameter control, as they are limited to certain materials and processing techniques, making a controlled shift of, e.g., the transistor threshold voltage difficult. In this contribution, we present a vertical OFET (VOFET) operating in the inversion regime. By varying the thickness or doping concentration of a p-doped layer in an otherwise n-type VOFET, we are able to shift the threshold voltage in a controlled manner from 1.61 V (for a normal n-type VOFET) to 4.83 V (for the highest doping concentration of 50 mol. %). Furthermore, it is found that low doping concentrations of 20 mol. % can improve the Off state of the VOFET through reduction of the source-drain leakage current.

The ZnO films have been produced on the monocrystalline sapphite substrates (0001) by the pulsed laser deposition method. The photoluminescence spectra of these films have been obtained. The dependence of ZnO films transmission on the gallium admixture concentration has been determined for the spectral region of 200 to 3200 nm. it has been ascertained that the increase in gallium admixture is responsible for the shift of fundamental absorption band edge to the blue, and for the reduction in ZnO films transparency in the IR region. The dependence of the crystallographic parameters (lattice constant C ) on the gallium admixture concentration and on the deposition parameters has been found.© (2006) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

Deposition steps in CVD and ALD applications usually not only cover the surface of the substrate surface but also the walls of the chamber inside. Regular removal of those residuals has to be done to obtain stable and repeatable deposition results with uniform surfaces at acceptable particle levels. The high requirements to sustain stable processes has lead to more frequent chamber cleans. NF3 has emerged as the main clean gas for remote clean applications. While it meets the above mentioned requirements and is considered to fit easily into the fab gas supply it is relatively expensive. The work presented here investigates argon/nitrogen diluted fluorine (F2) as an alternative clean gas with a significantly reduced environmentally destructive global warming emission (GWP). The cleaning behaviour with respect to different materials (SiON, TaN, TiN, W, SiO2) was studied. It is found that in general argon/nitrogen diluted fluorine achieves etch rates comparable to those obtained by NF3 when the comparison is based on the amount of fluorine transported into the reactor.

Hafnium oxide is a promising candidate for electronic applications. It also offers interesting properties for a wide variety of optical applications as antireflective coatings, dielectric mirrors or protective coatings. Besides favorable optical properties, the mechanical stability and chemical inertness of hafnium oxide offers further advantages. Microelectronics require ultra thin layers in the 3-5nm range for gate dielectrics. For optical applications a wider range is necessary. As optical coatings should be capable to be integrated in a CMOS or MEMS technology, only compatible deposition processes can be used. In this presentation we report on atomic layer deposition (ALD) for thicknesses in the 2-30nm range and r.f. sputtering from 30 to above 150nm. Thus almost every wavelength from EUV to NIR can be covered for λ/4 applications, keeping in mind, that the refractive index is 2.1 at 586nm. Deposition took place on 2x2 cm2 silicon substrates for ALD and on 150mm silicon wafers for sputtering each either HF etched of thermally oxidized. The layers have been analyzed by AFM, XPS, XRD, TEM to gather information about morphology, composition, bonding and structural properties. Optical properties have been evaluated by ellipsometry. The different deposition methods are compared as well as the effects of thermal annealing after deposition. All layers are very smooth and reveal optical properties close to bulk HfO2. As deposited the layers are predominately amorphous, thermal annealing leads to crystallization.

The major aim of CMP is not the removal of excess material but the planarization of the surface. Therefore the determination of the planarization length appears to be more important than the removal rate itself. It has been shown, that the planarization length is not a constant process parameter, but is related to the removal respectively to the polish time in a square root behaviour. Founded on models proposed by Boning, Ouma, et. al. we applied a sequential polish on a single quasi infinite step. The resulting profile could be simulated by a sequential convolution of the surface contour with a Gaussian transfer function.To come closer to the situation on a chip pattern we investigated the planarization behaviour on a specific pattern of the MIT854AZ copper CMP test chip, where a large area of unpatterned surface touches a pattern with a specific constant density.The 200 mm wafer samples consisted of RIE structured oxide films covered with 850 nm ECD copper. The polish was performed on a standard semiconductor manufacturing tool, using a commercial consumables set. The surface profiles were determined by a high resolution profiler within the polishing sequence. The densely patterned areas are removed within a certain polishing time while the transition point between the unpatterned and patterned area appears as a global step. The deposited copper thickness is sufficient to study the contour evolution in both phases, before and after removal of the dense pattern. The paper presents the experimental results on the contour evolution for the patterned fields as well as the global step.

The damage of finger electrodes of surface acoustic wave (SAW) structures due to material transport (acoustomigration) forming voids and hillocks is strongly associated with the SAW stress field, the temperature and properties of the fingers material and their configuration. By application of Cu thin films a significant higher performance of SAW structures with respect to power durability, reliability and lifetime is obtained. In the present paper Cu finger electrodes of a special power SAW test structure were fabricated in trenches of STX quartz substrates using the copper damascene technique. In comparison with conventional finger electrodes located on the substrate surface, such an embedded structure enables some new features regarding their acoustical and acoustomigration behavior. So high power SAW load cannot cause fatal failures by shorts between adjacent fingers. This fact is specially important for SAW devices in the GHz range. The trench structuring into the substrate was carried out by reactive ion (RIE) or ion beam etching (IBE) technique using a metallic hard mask. Etched trenches were filled with a conductive Ta-Si-N / Cu-layer system by magnetron sputtering in a cluster tool, and structured by a chemical-mechanical polishing (CMP) process. Subsequently, after cleaning an insulating Ta-based barrier (system Ta-Si-O / Ta-Si-N) layer was deposited on the wafer surface. This covering layer also acts as a protective coating. Such a metallization system enables sufficient bonding properties using Al-wires. First results of electrical measurements show that travelling SAW could be excited in quartz substrates.

In spite of the fact, that the main purpose of CMP is the planarization of surfaces, most processes are optimized with respect to the removal rate. This might be due to a lack in techniques for the determination of the planarization behavior. The commonly used expression “Planarization Length” implies a maximum lateral extension over which the planarization is obtained and which can not be improved. Several attempts have been made to determine the planarization length by studying the CMP on different test patterns. The general problem in the interpretation of the data is the interaction of neighboring pattern with different pattern densities. This problem does not apply to the most simple pattern possible, which is a single step with an extension of the up and down areas much larger than the planarization length. In this case the spatial derivative of the resulting contour after CMP is directly the demanding transfer function to be used for the convolution. This concept, initially proposed by Boning et. al., was applied to evaluate the polish of copper and silicon oxide. Wafers with concentrically steps in Cu or SiO2 films with an extension of 1 to 5 cm have been prepared. During polish, the initially infinite steep step widens up, yielding the planarization length as a function of the removal respective the polishing time. Significant differences in the evaluation of the planarization length could be quantified depending on the pad, slurry and tool parameters. Our first experiments revealed a decrease in planarization length by the addition of BTA in a copper slurry. We believe that the SPR method enables a unambiguous, pattern independent determination of the planarization capability in CMP.

The IGAM engineering company for applied mechanics Ltd. developed an active piezocontrolled carrier for CMP. It uses several, by means of piezo-stacks individually controllable rings. The carrier is optimized regarding its stiffness and reliability by means of threedimensional finite element calculations. The high stiffness and positioning accuracy of the system allows the exact control of different surface profiles and thus the purposeful attitude of the pressure and removal profile independently of the polishing pressure. Tests show a very homogeneous pressure and removal distribution in the circumference of the wafer. The concept is transferable on further wafer diameters, whereby the width of the individual zones can be widely adapted to the requirements of the desired removal profile. Results of finite element analysis for a 12” prototype are available. The variable concept allows to upgrade existing CMP machines. The aims of current developments are the integration of in-situ-pressure determination to control the process, wireless transfer of energy and data to the carrier and the control of the local removal profile.

Diffusion barrier stacks for the encapsulation of organic electronics made from inorganic nanolaminates of Al2O3 and TiO2 with aluminum alkoxide interlayers have been deposited by atomic layer deposition (ALD) and molecular layer deposition (MLD). As a part of the MLD process development, the deposition of aluminum alkoxide with low a density of about 1.7 g/cm3 was verified. The ALD/MLD diffusion barrier stack is meant to be deposited either on a polymer film, creating a flexible barrier substrate, or on top of a device on glass, creating a thin-film encapsulation. In order to measure the water vapor transmission rate (WVTR) through the barrier, the device is replaced by a calcium layer acting as a water sensor in an electrical calcium test. For the barrier stack applied as thin-film encapsulation on glass substrates, high resolution scanning electron microscopy investigations indicate that the inorganic nanolaminates without MLD interlayers are brittle as they crack easily upon the stress induced by the ...

Graphene based electron field emitter arrays consisting of cone-shaped silicon tips, a thin Al2O3 tunnel barrier, and graphene top electrode are fabricated. Due to the monolayered graphene top electrode, the electrons are able to tunnel through the Al2O3 layer and emit into the vacuum. The temperature behavior of the tunnel leakage current as well as the emission current is characterized.

On irradiation of metallic targets from niobium and tantalum with excimer XeCl laser (308 nm) the spectra of erosion plume were obtained. These spectra were used in studying the plume qualitative composition. The velocities of atom and ion scatter were measured by the time-of-flight method. Plasma electron temperature was found by continuous spectrum of plume radiation. The results obtained were compared with the outcomes of the previously performed probe measurements of electron temperature and ion scatter velocities.

The time-of-flight probe method was used in investigations of erosion plume in ablation of copper with 308 nm radiation of excimer XeCl laser in vacuum. The time-of-flight curves of electron and ion currents at the probe were obtained in the range from 0.2 to 2.2 J/cm -2 of energy densities at the target with probe-to-target separations from 10 to 133 mm. Multimodal distributions of ions by scatter velocities have been revealed. The voltage-current curves of probe current have been constructed in the range of probe potentials +/- 18 V. The electron temperature has been calculated for different plume regions. It has been revealed that the plume electron temperature is nonuniform.

The erosion plume resulting from an ablation of tantalum target in vacuum with excimer laser radiation (308 nm) was studied using Langmuir probe. The spatial and temporal dependencies of electron probe currents were obtained in real time.The electron temperature of different plume regions was determined from a series of I-U characteristics taken at different distances between probe and target. It was established that the plume electron temperature is non-uniform and has a maximum value in front of the plume. The acceleration of ions on plume irradiation with CW CO2 laser recorded. Theincrease in ions energy from 25 to 50 eV was observed.Keywords: acceleration of ions, CW CO2 laser, laser ablation, tantalum, excimer XeC1 laser, electron temperature. 1. INTRODUCTION The process of ablation of solid targets has long been the subject of fundamental research. This is related both to the complexity of involved processes and to the possibility ofwide practical application 1,2 One major application of solid targetablation by laser beam is the process ofthin film deposition with pulsed laser (PLD).The processes of laser-plasma deposition require the information on characteristics of the erosion plume. The energy spectra

Magnetron sputtered polycrystalline Ta and Ta(Si) barriers for copper metallization schemes were modified by nitrogen as well as oxygen high dose ion implantation to improve their thermo-mechanical stability. Ion bombardment changed the initial polycrystalline microstructure to amorphous-like. In contrast to pure Ta, Ta(Si) layers were already amorphous or nanocrystalline after deposition. In this case, the annealing temperature at which formation of a well crystallized structure occurs increased by approximately 100 K as a result of the implantation. In order to demonstrate the improvement in the barrier properties of the implanted Ta films, the intermixing of Ta and Cu at the interface of corresponding layer structures was measured as a function of the annealing temperature by depth profiling using Auger electron spectroscopy (AES). The thermal stability of Ta and Ta(Si) barriers increased from 600 °C/1 h for the non-implanted layers up to 750 °C/1 h after implantation of nitrogen or oxygen.

In order to focus light or x rays, the thickness of a refractive lens is typically varied over its aperture. Here, we present a refractive x-ray lens made of lamellae of constant thickness, the refractive lamellar lens. Refractive power is created by a specific bending of the lamellae rather than by a concave lens profile. This very special design has the technological advantage that materials like sapphire or diamond can be used to make lenses by coating techniques. A first lens prototype focused x rays with a photon energy E = 15.25 keV to a lateral beam size of 164 nm x 296 nm full width at half maximum.

Nanolaminates comprising of TiO2 or HfO2 sublayers within an Al2O3 matrix are grown with atomic layer deposition. These nanolaminates provide an improved silicon surface passivation compared to conventional Al2O3 films. The physical properties of the nanolaminates can be described with a dynamic growth model that considers initial and steady-state growth rates for the involved metal oxides. This model links the cycle ratios of the different atomic layer deposition precursors to the thickness and the material concentrations of the nanolaminate, which are determined by means of spectroscopic ellipsometry. Effective carrier lifetime measurements show that Al2O3-TiO2 nanolaminates achieve values of up to 6.0 ms at a TiO2 concentration of 0.2%. In Al2O3-HfO2 nanolaminates, a maximum effective carrier lifetime of 5.5 ms is reached at 7% HfO2. Electrical measurements show that the TiO2 incorporation causes strong hysteresis effects, which are linked to the trapping of negative charges and result in an enhanced field effect passivation. For the Al2O3-HfO2 nanolaminates, the capacitance data clearly show a very low density of interface traps (below 5·1010 eV−1·cm−2) and a reduction of the fixed charge density with increasing HfO2 concentration. Due to the low number of recombination centers near the surface, the reduced field effect passivation only had a minor impact on the effective carrier lifetime.

The well-controlled formation of large silicon grains on predetermined positions is a key issue in order to produce single-grain thin film transistors on insulating substrates and thus to enable monolithic 3D integration. One way to achieve this is to artificially control the solidification of molten silicon during the flash crystallization of amorphous silicon. In this work, we present such an approach in which we used patterned metal layers below the amorphous silicon. The metal spots act as embedded micro mirrors and consequently introduce a lateral temperature gradient into the silicon film during flash crystallization. As a result, the grain growth from molten silicon is seeded from the predefined regions with the lowest temperature and thus the formation of large crystal silicon islands proceeds in a controlled manner. In the scope of this study, we evaluated a variety of different mirror patterns with respect to their suitability for this approach and observed that patterns of both circular and line-shaped mirrors are the most promising variants. The resulting silicon islands have pillow-like shapes and are located exclusively in regions between neighboring mirrors. They exhibit dimensions of a few tens of micrometers and consist of grains with sizes up to 28 µm. The formation of single-grain silicon pillow-like structures was observed for particular mirror patterns having circular mirrors. On the other hand, the application of mirror patterns with line-shaped mirrors resulted in the formation of elongated silicon grains which we explained in terms of lateral solidification starting from one edge. Furthermore, this approach exhibits grain filter characteristics leading to the controlled growth of large single grains at predetermined positions.

In this work, a process for the thermal activated atomic layer deposition (ALD) of ruthenium from the organometallic heteroleptic precursor [(ethylcyclopentadienyl)(pyrrolyl)ruthenium] with molecular oxygen was developed and characterized. Silicon substrates were precleaned in hydrofluoric acid and preheated to a specific temperature before coating with ruthenium. The corresponding cycle-by-cycle growth was monitored throughout the entire ALD process time, utilizing an in-situ real-time spectroscopic ellipsometer. Transmission electron microscopy and atomic force microscopy were applied at a reference sample to generate an appropriate optical model for the translation of the ellipsometric spectra into Ru film thicknesses. Given a representative set of process parameters the cycle-by-cycle growth was studied in detail, obtaining information about incubation, nucleation, linear growth and delamination. In order to determine the ALD characteristic dependencies, the following process parameters were varied wh...