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In this work we present a flexible pyroelectric sensor composed by a PVDF-TrFE capacitor realized on ultra-thin polyimide film (5 mu m thick), integrated with a n-channel low temperature polysilicon thin film transistor also fabricated on ultra-thin polyimide (8 mu m thick). Exploiting a multi-foil approach, the pyroelectric capacitors and the transistors were attached one over the other reaching a final thickness of about 15 mu m. The bottom contact of the sensor capacitance was connected to the gate of the transistor by a silver ink, while, for bias and load resistances, we used external elements. The active sensor area was defined by a circular capacitor with a diameter of about 2 mm. In order to enhance PVDF-TrFE pyroelectric properties, an external stepwise voltage was applied to the structure up to values of 160 V at a temperature of about 80 degrees C. The devices were then tested, at different working frequencies (up to 800 Hz) under a specific infrared radiation provided by a He-Ne laser, with a wavelength of 632 nm and maximum power of 5 mW. An output signal of tens of millivolt was observed at 10 Hz, exploiting the pre-amplification of polysilicon thin film transistor.

Future system-on-panel applications require further performance improvement of circuits based on polycrystalline silicon thin film transistors (TFTs). The biggest leverage in circuit performance can be obtained by reducing channel length from the typical current values of 3-6 micron to 1 micron, or less. Therefore, short channel effects in scaled down polysilicon TFTs will have to be controlled in order to allow proper operation of the circuits. In this work we review a number of specific aspects of the electrical characteristics of short channel devices (channel lengths down to 0.4 micron) combining electrical characteristics measurements and two-dimensional numerical simulations.

In this paper we present the design and fabrication of a humidity sensor on ultra thin (8 μm) flexible polyimide substrate. The ultra thin flexible substrate can be preserved also when a read-out electronic interface is integrated by using Polycrystalline Silicon Thin Film Transistors technology. The sensor device is a capacitor where a thin layer of [bis(benzo cyclobutene)] is used as a dielectric sensitive material between two metal electrodes. The electrode layout has been designed with the aid of numerical simulations in order to optimize the sensor performances. The fabricated sensor has shown sensitivity to relative humidity of 0.38%/RH% and a linearity of 0.996 in the range of 10–90 RH%. Furthermore, measurements regarding the sensor response time, different bending and bias voltage effects have been performed.

We have fabricated bottom contact pentacene TFTs on flexible polyimide substrate and silicon substrate using different passivation layers in order to reduce the electrical instability of pentacene devices, induced by water diffusion in the film, as evidenced by electrical measurements under different environments. Experimental data show that parylene passivation layer does not introduce appreciable degradation of device characteristics and allows standard lithographic process, but it is not an effective barrier for water diffusion. The encapsulation of pentacene TFTs with an additional acryl layer does not reduce the device sensitivity to the water, whereas devices encapsulated by a parylene/acryl/aluminum triple layer do not show increase of transfer characteristics hysteresis when measured in air.

The electrical instabilities in p-channel polysilicon TFTs induced by negative bias temperature stress (NBTS) and self-heating have been investigated. From NBTS experiments performed at different temperatures and gate bias, we derived an empirical relationship that provides the T and electric field dependence of the interface state generation. To explain the device instability related to self-heating we considered a spatially non uniform interface state distribution, as a non uniform transverse electric field is present during bias stress. The interface state distribution can be deduced using the empirical relationship, determined from NBTS experiments, and considering the spatial distribution of the oxide electric field, obtained from numerical simulations. Using the so determined interface state distribution it was possible to perfectly reproduce not only the transfer characteristics but also the asymmetry observed in the output characteristics, when source/drain contacts are reverted after bias stress.

In this work, we investigated self-heating related instability in polysilicon thin film transistors (poly-Si TFTs) fabricated on polyimide (PI) substrates. Indeed, when Joule heating becomes relevant, the temperature of the active layer can substantially rise, since the devices are fabricated on thermally insulating substrates. As a result, electrical instability is triggered and attributed to the generation of interface states, due to the Si–H bond breaking, and charge trapping into the gate insulator. In addition, by using 3-dimensional numerical simulations, coupling the thermodynamic and transport models, we analyzed the temperature distribution of the device under operating conditions and found that self-heating is more severe for devices fabricated on plastic substrates.

Silicon dioxide films (SiO 2 ), deposited at room temperature by electron cyclotron resonance (ECR) plasma reactor from a gas phase combination of O 2 , SiH 4 and He, present excellent structural and electrical properties. However, when fabricating field effect devices it is also crucial to minimize the defect density at the semiconductor/insulator interface. We show that the interface state density, investigated in Al/SiO 2 /Si MOS capacitors, can be substantially reduced performing post-deposition annealing. In particular we studied the effects of annealing temperature and time in different gas ambient: vacuum, nitrogen and forming gas (5% H 2 + N 2 ). We found that interface state passivation mainly occurs when thermal annealing is performed after Al-contact deposition and that it is quite insensitive to the annealing atmosphere. The present results clearly suggest that the hydrogen passivation mechanism is driven by the H-containing species present in the film and a possible mechanism to explain the results is proposed.

In this work we present a flexible read-out circuit embedded with a POSTFT (Piezoeletric Oxide Semiconductor TFT) tactile sensor for electronic skin application. The circuit has been fabricated using n-mos LTPS (Low Temperature Poly-Silicon) technology, integrated on a flexible substrate of PI (PolyImide). A cascade of two common source amplifiers, engineered to provide enhanced output, composes the schematic. The tactile sensor has been designed adopting an extended gate configuration to provide higher robustness to the mechanical solicitations. The optimization of the piezoelectric properties of the device has been accomplished through a well-established poling procedure, reaching piezoelectric coefficient of 45 pC/N. Once fabricated, the sensor has been detached from the rigid carrier and bonded to a flexible PCB for testing purpose. A mini-shaker has been used to electromechanically stimulate the sensor and verify the performance, obtaining output signal up to 2.5Vp-p for a mechanical stimulus of 1N @200Hz.

Zinc oxide structures with size in the micro and nano-scale range represent key candidates for developing novel, cheap and efficient electronic devices, power generators and sensors based on the cooperative response of a large number of synced structures. The accurate electrical characterization of single ZnO micro/nanostructures is thus critical for assessing and optimizing the device performance and reliability, and requires the use of metallic scanning nano-probes for establishing electrical contact with the nano-structures. We report on the characterization of the contact resistance between AFM conductive tip and a selection of metallic layers to be used as top metallic coating allowing for nano-electrical characterization of FIB machined ZnO micro/nanopillars. Our findings show that the use of an Au film on top of Ti ohmic contact layer is crucial for reliable conductive AFM investigation of single isolated ZnO micro and nano-structures. © 2015 IEEE.

We present a novel method for the extraction of the relevant electrical and physical parameters of Schottky diodes realized on polycrystalline thin films. The proposed approach relies on a limited set of current–voltage characteristics measured at different temperatures and does not require the previous knowledge of any semiconductor parameter. The procedure provides satisfactory results in terms of relative errors even in the case of nonideal characteristics, including a very large series resistance and strong temperature and bias dependence of both barrier and ideality factor. We tested the approach on both simulated devices and real Cr–poly-Si Schottky diodes.

The mechanism by which the neural networks communicate and the understanding of these processes remains the fundamental issue of neuroscience. Long-term brain activity registration and stimulation is the main ally to analyze and interpret data coming from the brain. Several materials and microelectronics techniques have been pursued to obtain reliable and long lasting implantable devices from intracortical electrodes to soft epicortical arrays. Among them, ultra-flexible interfaces result particular appealing for their superior conformability and intimate contact with the brain tissue, especially for epicortical devices, thus achieving higher signals and reducing brain injuries. By other side, also external electronics is important properly to treat the signal, filtering the artifacts and minimizing the noise. In this paper, a novel compact integrated system for both brain stimulation and recording is presented. The device consisted in an ultra-flexible polyimide 32-channel microelectrodes array (8 um thick) connected to a miniaturized PCB able to amplify, filter and digitalize the neural signals. The size of this acquiring board is 60x45 mm and it provides an amplification of 200x with a sampling rate greater than 1 MSamples/s. The system has been successfully tested both in-vivo and in-vitro experiments on Wistar rat demonstrating that it could be a good candidate for a further miniaturization of the measurement equipment.

Today ultra-flexible electronic devices can be successfully embedded in smart clothes, integrated in transparent displays, hidden in tubular structures to increase the numbers of sensors in an urban space or in a specific environment, thus enhancing the interaction of a person and maximizing the shared amount of available information. Coupling this technology with nanostructures based sensing devices is a further step to revolutionize the idea of distributed smart objects. Polysilicon based materials on plastic is a mature technology to fabricate electronic read-out circuits suitable to manage and control the signals coming from sensors of different nature, conceiving new applications and wearable solutions. Moreover, the possibility of directly integrating active devices together with sensors reduces issues related to signal to noise ratio, providing a local preamplification.

In this work, we studied the effects of different thermal annealing on the electrical characteristics of non-self-aligned low-temperature p-channel polycrystalline silicon (polysilicon) thin film transistors. Different thermal treatments were performed after Al-gate formation at different temperature (200 degrees C, 250 degrees C, 350 degrees C and 450 degrees C) and annealing times. We found that optimal conditions were obtained at 350 degrees C, with transfer characteristics showing a subthreshold slope of 0.5 V/dec, field effect mobility > 100 cm(2)/Vs and threshold voltage around -3.5 V. Hot carrier induced degradation was also analyzed performing bias-stress measurements on devices annealed at 350 degrees C and at different bias stress conditions. The experimental data show that a maximum transconductance degradation is obtained for V,(stress) - V-t = -4 V while bias-stress at V-g = V-t and vertical bar V-g(stress)vertical bar >> vertical bar V-ds(stress)vertical bar did not produce appreciable changes in both transfer and output characteristics.

Silicon dioxide films have been deposited at temperatures below 270 degrees C in an electron cyclotron resonance (ECR) plasma reactor from O-2, SiH4, and He gas mixture. Pinhole density analysis as a function of substrate temperature for different microwave powers was carried out. Films deposited at higher microwave power and at room temperature show defect densities (< 7 pinhole/mm(2)), ensuring low-temperature process integration on large area. From Fourier transform infrared analysis and thermal desorption spectrometry we also evaluated very low hydrogen content if compared to conventional rf-plasma-enhanced chemical-vapor-deposited (PECVD) SiO2 deposited at 350 degrees C. Electrical properties have been measured in metal-oxide-semiconductor (MOS) capacitors, depositing SiO2 at RT as gate dielectric; breakdown electric fields > 10 MV/cm and charge trapping at fields > 6 MV/cm have been evaluated. From the study of interface quality in MOS capacitors, we found that even for low annealing temperature (200 degrees C), it is possible to considerably reduce the interface state density down to 5 x 10(11) cm(-2) eV(-1). To fully validate the ECR-PECVD silicon dioxide we fabricated polycrystalline silicon thin-film transistors using RT-deposited SiO2 as gate insulator. Different postdeposition thermal treatments have been studied and good device characteristics were obtained even for annealing temperature as low as 200 degrees C.

Silicon dioxide films have been deposited at temperatures less than 270 °C in an electron cyclotron resonance (ECR) plasma reactor from a gas phase combination of O2, SiH4 and He. The physical characterization of the material was carried out through pinhole density analysis as a function of substrate temperature for different μ-wave power (Ew). Higher Ew at room deposition temperature (RT) shows low defects densities ( 10 MV/cm are observed from ramps I–V. Moreover, from high frequency and quasi-static C–V characteristics we studied interface quality as function of annealing time and annealing temperature in N2. We found that even for low annealing temperature (200 °C) is possible to reduce considerably the interface state density down to 5 × 1011 cm−2 eV−1. These results show that a complete low-temperatures process can be achieved for the integration of SiO2 as gate insulator in polysilicon TFTs on plastic substrates.

In this work we investigate the electromechanical behavior of a flexible piezoelectric sensor, based on Polyvinylidene-fluoride-trifluoroethylene (PVDF-TrFE) capacitor fabricated on ultra-thin polyimide film (5 µm thick). The piezocapacitor has been integrated with a high mobility p-channel organic thin film transistor, made on polyethylene naphthalate (PEN, 125 µm thick), by adopting a multi-foil approach. An extensive study of the effects of the electrical and mechanical stress on the device components has been reported in order to evaluate the sensor's reliability in a real environment. Then the sensor was tested, at different working frequencies and applied forces with the intent of mimicking the human sense of touch. We believe that this device can represent a key element for a high performing electronic skin system to be deployed on humanoid robot.

Electrocorticography (ECoG) is becoming a common tool for clinical applications, such as preparing patients for epilepsy surgery or localizing tumor boundaries, as it successfully balances invasiveness and information quality. Clinical ECoG arrays use millimeter-scale electrodes and centimeter-scale pitch and cannot precisely map neural activity. Higher-resolution electrodes are of interest for both current clinical applications, providing access to more precise neural activity localization and novel applications, such as neural prosthetics, where current information density and spatial resolution is insufficient to suitably decode signals for a chronic brain-machine interface. Developing such electrodes is not trivial because their small contact area increases the electrode impedance, which seriously affects the signal-to-noise ratio, and adhering such an electrode to the brain surface becomes critical. The most straightforward approach requires increasing the array conformability with flexible substrates while improving the electrode performance using materials with superior electrochemical properties. In this paper, we propose an ultra-flexible and conformable polyimide-based micro-ECoG array of submillimeter recording sites electrochemically coated with high surface area conductive polymer-carbon nanotube composites to improve their brain-electrical coupling capabilities. We characterized our devices both electrochemically and by recording from rat somatosensory cortex in vivo. The performance of the coated and uncoated electrodes was directly compared by simultaneously recording the same neuronal activity during multiwhisker deflection stimulation. Finally, we assessed the effect of electrode size on the extraction of somatosensory evoked potentials and found that in contrast to the normal high-impedance microelectrodes, the recording capabilities of our low-impedance microelectrodes improved upon reducing their size from 0.2 to 0.1 mm. 1534-4320

Workers protection in collaborative industrial robotics application represents the predominant aspect of robot safety in production systems. Flexible production systems and multimodal human-robot interactions often encompass cooperative tasks that are performed in fenceless configurations. Collaborative open workspaces enable, in fact, a workflow of continuously interchangeable tasks done by operators or by robot at close distance or using hand-guided modes. Layout and workflow optimization may, in fact, require a co-presence in some shared spaces whose safeguarding (e.g. robot speed limitations, distances) is conservatively restricted by the current standards. In such scenarios, the tracking of operators is mandatory for the overall assessment of the system safety. In this work, a combination of wireless sensing technologies, highly robust wireless protocols and safe computation over a standard ethernet IP (black channel) concur to improve the functional safety of a cooperative robotic system. The system architecture and data framework are in particular discussed with reference to the properties of the communication protocols implementing the safety layer. © 2014 IEEE.

In this work we present an investigation on a conductive thermoplastic nanocomposite used as flexible and stretchable strain gauge to be applied on inflatable structures for both terrestrial and extra-terrestrial applications. In particular we analysed the sensor behaviour by using an one-dimensional expansion system for increasing strain up to 5% and we studied the device changing in temperature. The strain gauge was also tested after several expansion cycles thus analysing the sensor response in time and ageing effects. Finally we tested the sensor on an inflatable naval fender in order to reproduce the sensor behaviour in real conditions.

A fully flexible pH sensor using nanoporous ZnO on extended gate thin film transistor (EGTFT) fabricated on polymeric substrate is demonstrated. The sensor adopts the Low Temperature Polycrystalline Silicon (LTPS) TFT technology for the active device, since it allows excellent electrical characteristics and good stability and opens the way towards the possibility of exploiting CMOS architectures in the future. The nanoporous ZnO sensitive film, consisting of very thin (20 nm) crystalline ZnO walls with a large surface-to-volume ratio, was chemically deposited at 90 °C, allowing simple process integration with conventional TFT micro-fabrication processes compatible with wide range of polymeric substrates. The pH sensor showed a near-ideal Nernstian response (~59 mV/pH), indicating an ideality factor ? ~ 1 according to the conventional site binding model. The present results can pave the way to advanced flexible sensing systems, where sensors and local signal conditioning circuits will be integrated on the same flexible substrate. © 2014 AIP Publishing LLC.

Flexible sensors are gaining increasing interest in a number of applications, including biomedical, food control, domotics and robotics, having very light weight, robustness and low cost. Low temperature polycrystalline silicon (LTPS) technology is particularly attractive for such applications, since LTPS TFTs show excellent electrical characteristics, good stability and offer the possibility to exploit CMOS architectures. Then, as examples of flexible sensing systems, we present a tactile sensor for robotic applications and a pH sensor for biomedical applications. The present results can pave the way to advanced flexible sensing systems, where sensors and local signal conditioning circuits can be integrated on the same flexible substrate.

In this work we report on hydrothermal growth of ZnO nanostructures obtained by using strip-shaped resist templates made by electron beam lithography, with particular focus on: (i) the effects of materials used and processing on the template adhesion and its stability during wet growth; (ii) the influence of the template pattern dimensions on the nanowires morphology. Templates made of patterned films with methylmethacrylate-methacrylic acid copolymer showed greater adhesion and stability with respect to the commonly used poly (methylmethacrylate) electron resist or to the use of thin adhesion-promoter photoresist layers. The growth of nanowires in strip-shaped methyl methacrylate-methacrylic acid copolymer templates has been investigated using typical hydrothermal growth parameters and a marked dependence of nanowires length and diameter has been found on the template size for strips narrower than about 2 ?m. © 2014 Elsevier B.V. All rights reserved.

An electronic sensor card for aerospace applications is presented. The device uses infrared technology to transmit measurements toward a central unit. It has been designed following a low power consumption strategy which allows the use of a mini photovoltaic panel supplier. The card could be efficiently used in structures which ensure the line of sight between the card and a central receiver unit as inflatable structures. The device has been realized and tested.

Self-heating-related instabilities have been studied in p-channel polycrystalline-silicon thin-film transistors. The spatial distribution of the interface-state and fixed-oxide-charge densities generated during self-heating experiments has been analyzed and quantitatively determined by using negative-bias temperature stress experiments and 2-D numerical simulations. In addition, the observed asymmetry in the output characteristics with respect to source/drain contact reversal is also perfectly reproduced, confirming the validity of the proposed model.

Electrocorticography, thanks to its low degree of invasiveness, has received in recent years an increasing attention for chronic brain-machine interface applications. To be up to the task, electrocorticography electrode arrays can benefit from several improvements. Better recording abilities can be obtained through smaller, low impedance and high density electrodes, while conformability can provide superior adhesion to the cortex surface and lower biological impact. In this work we present an ultra-flexible and brain-conformable polyimide-based micro-ECoG array with low-impedance poly(3,4-ethylenedioxythiophene) (PEDOT)-carbon nanotube coated microelectrodes. A first in vivo validation of our device is performed on rat somatosensory cortex.

Flexible sensors are gaining increasing interest in a number of applications, including biomedical, food control, domotics and robotics, having very light weight, robustness and low cost. In order to improve signal-to-noise ratio, integration of readout electronics is crucial and several technologies are available for the fabrication of thin film transistors (TFTs) based circuits on flexible substrates. Among these technologies, the low temperature polycrystalline silicon (LTPS) is particularly attractive, since LTPS TFTs show excellent electrical characteristics, good stability and offer the possibility to exploit CMOS architectures. The different aspects for the direct fabrication of LTPS TFTs on polymer substrates are reviewed and the specific fabrication process adopted on ultrathin polyimide substrates is described in some detail. Then, as examples of flexible sensing systems, we present both chemical and physical sensors integrated with LTPS TFTs frontend electronics. The present results can pave the way to advanced flexible sensing systems, where sensors and local signal conditioning circuits can be integrated on the same flexible substrate.

We found a strong correlation between the layer porosity and electrical properties of a SiO2 layer deposited by inductively coupled plasma chemical vapor deposition. At 50 °C the SiO2 layers have a double structure: a dense layer in contact with the substrate and a porous layer on top of it. The critical thickness at which voids appear depends on the deposition rate. Breakdown voltage and charge trapping performances of SiO2 layers are very good if the thickness is below the critical value and deteriorate significantly in thicker, porous, layers. Layer porosity is absent when the sample is deposited at 250 °C.

In this work we present a flexible pyroelectric capacitive sensor, based on PVDF-TrFE, fabricated on a ultra-thin polyimide film (8 μm thick) connected to a fully printed p-channel organic thin film transistor that is used to amplify the sensor signal. We fabricate a standalone device, exploiting a multi-foil approach, where the pyroelectric capacitor was glued on the organic TFT substrate, that consists of a PEN foil 125 μm thick, previously made in CEA-LITEN labs. The pyroelectric properties of the PVDF-TrFE capacitor were enhanced using a thermal poling procedure before the TFT integration. The sensor behavior was analyzed at different working frequencies (up to 500 Hz) under a specific infrared (IR) radiation provided by a He-Ne laser, with a wavelength of 632 nm and maximum power of 5 mW. An output signal of few millivolts was observed, exploiting the pre-amplification of the fully printed organic transistor.

Electrical characteristics of fully self-aligned gate overlapped lightly doped drain (FSA-GOLDD) polysilicon thin-film transistors (TFTs), fabricated with a spacer technology and providing submicron (0.35 μm) LDD regions, have been analyzed. Device characteristics show negligible series resistance of the LDD region while effective drain field relief has been demonstrated by a reduced kink effect and off-current, if compared to conventional self-aligned (SA) devices. Short channel effects are also mitigated by the LDD region, while substantial reduction in the hot-carrier induced instability is found, when compared with conventional SA devices. Optimum doping dose of the LDD region has been identified to be 9 × 1012 cm2.

Applications of polycrystalline silicon (polysilicon) thin film transistors (TFTs) to active matrix organic light emitting displays require further performance improvement. The biggest leverage in circuit performance can be obtained by reducing channel length from the typical current values of 3-6?m to 1?m, or less. However, short channel effects and hot-carrier induced instability in scaled down conventional self-aligned polysilicon TFTs can substantially degrade the device characteristics. To reduce these effects and allow proper operation of the circuits, drain field relief architectures have to be introduced. In this work we show that a fully self-aligned gate overlapped lightly doped drain (LDD) structure, with submicron LDD regions, can provide an excellent solution, allowing effective short channel effect control and improved electrical stability. ©The Electrochemical Society.

In this paper we present the design and fabrication of a fully flexible sensorial system, composed of three different sensor units implemented on an ultrathin polyimide substrate of 8 μm thick. Each unit is composed by a capacitive chemical sensor integrated with readout electronics. The sensors are parallel plate capacitors with the top electrode properly patterned to allow analytes diffusion into the dielectric that acts as chemical interactive material. Three different polymers, poly(tetrafluoroethene) (PTFE), poly(methyl 2-methylpropenoate) (PMMA) and benzocyclobutene (BCB), were used as dielectrics. A ring oscillator circuit, implemented with polysilicon thin film transistors (PS-nTFT), was used to convert the capacitance variations into frequency shifts. The electronic tests show oscillating frequencies of about 211 ± 2 kHz and negligible frequency shifts under different bending radius conditions. Furthermore, system response to some alcohols concentrations (Methanol, ethanol, 1-butanol, and 1-propanol) is reported and data analysis proves that the system is able to discriminate methanol from ethanol.

Self-heating-related instabilities have been investigated in p-channel polycrystalline-silicon thin-fllm transistor, showing an anomalous transconductance (gm) increase. The gm increase is a fingerprint of edge effects, resulting from a buildup of positive trapped charge in the gate oxide at the channel edges. This was confirmed by the annihilation of such positive charges obtained by sequential hot-carrier bias-stress experiments. From the analysis of the edge effects in devices with different channel lengths, we were able, using 2-D numerical simulations, to deter mine the size of the defected edge regions to be 400 nm.

We present the design and fabrication of a chemoresistive sensor array for the volatile organic compounds and gas detection. Different nanofibrous conductive polymers, produced by electrospinning technique, have been used as chemical interactive materials. Sensor array was integrated with read-out electronic circuits on flexible substrate. In order to obtain high electrical performances maintaining integration capability, on plastic materials, respect to standard c-Si CMOS technology, polycrystalline silicon thin film transistor based circuitry has been used. The performances of the fabricated sensor array have been tested with different concentrations of Methanol, Lactic acid and Ammonia.

In this paper we present the design and fabrication of two flexible sensor devices: humidity sensor and ammonia sensor integrated with electronic circuit interface on thin flexible substrate (8 mum). The transducers layout has been optimized by means of numerical simulations. A thin layer of Bisbenzocyclobytene (BCB) is used as dielectric sensitive material in humidity sensor. Conversely a mixed polymer layer based on polyaniline emeraldine base (PANi-EB) is used as sensing conductive polymer for ammonia.

The formation of polycrystalline Si layers on flexible plastic substrates, through plasma enhanced chemical vapor deposition and excimer laser annealing, is investigated. Combining low-temperature (300 degrees C) annealing with laser dehydrogenation/crystallization produces good-quality polycrystalline silicon with a reduced shot density. By using optimal crystallization conditions it is possible to achieve a superlateral growth crystallization regime, with a grain size up to 1 mu m, and void-free material, as confirmed by the presented structural analysis. The beneficial effect of the low-temperature thermal annealing has been related to the removal of nonbound hydrogen, as supported by the elastic recoil detection analysis and IR analysis of the samples. To validate the process, we fabricated non-self-aligned polysilicon thin-film transistors (TFTs) directly on spin-coated polyimide substrates, with a maximum processing temperature of 300 degrees C and with a relatively low shot density (< 10 shots/point). The TFTs presented good electrical characteristics with an on/off ratio > 10(6), a field-effect mobility up to 65 cm(2)/V s, and a threshold voltage of 7 V. These results confirmed that the developed crystallization process is suitable to fabricate polysilicon TFTs on polymeric substrates, allowing an increased process throughput.

In this work we show a new low-temperature polycrystalline silicon (LTPS) thin film transistor (TFT) fabrication process on polyimide (PI) layers. The PI is spun on Si-wafer used as rigid carrier, thus overcoming difficulties in handling flexible freestanding plastic substrates, eliminating the problem of plastic shrinkage with high temperature processing and allowing the use of standard semiconductor equipment. LTPS TFTs are fabricated according to a conventional non self-aligned process, with source/drain contacts formed by deposition of a highly doped Si-layer and patterned by a selective wet-etching. Laser annealing is performed providing simultaneous dopant activation and crystallization of the active layer. The maximum process temperature is kept below 350 °C. After LTPS TFTs fabrication, the PI layer is mechanically released from the rigid carrier, which can be re-used for a new fabrication process. The devices exhibit good electrical characteristics with field effect mobility up to 50 cm 2 /V s. Analysis of electrical stability and characteristics in presence of mechanical stress is also shown.

The self-heating-related instability was studied in p-channel polysilicon TFTs fabricated on glass, stainless steel (SS) and polyimide (PI) substrates. We found that while the devices fabricated oil glass and PI presented substantial device degradation when operated in the self-heating region, the devices fabricated on SS were very stable when bias stressed under similar conditions. From extensive analysis of the phenomenon through numerical simulations, we found that the device degradation could be reproduced perfectly by interface state generation and uniform positive charge injection into the gate oxide along the channel. Additional defects, located in narrow (100 nm) regions at the gate edges, were also introduced to fully reproduce the apparent field effect mobility enhancement. In order to explain the role of the substrate on the stability, we analyzed three different structures by using 3-dimensional numerical simulations, coupling the thermodynamic and the transport models. The results from the simulations clearly demonstrate that devices fabricated on SS operate at much lower temperatures, thus explaining the observed better stability.

We studied transfer characteristics of pentacene thin film transistors, fabricated by using polymethylmetacrylate (PMMA) buffer layer, in order to evaluate the parasitic series resistance in devices with different active layer thickness (10 - 80 nm) and contact architectures (top and bottom contacts). For bottom contact TFTs, the highest series resistance (1.7 x 10(4) Omega cm) was found for the thinnest pentacene films, probably related to step coverage problems of the thin pentacene film over the gold contacts. In contrast, for the top contact TFTs, the 10 nm pentacene films had the lowest resistance (similar to 1.8 x 10(3) Omega cm) and the resistance increases to similar to 8 x 10(4) Omega cm for the thicker films. The results can be related to the effect of the series resistance induced by the vertical transport through the pentacene film.

In this work we present a new low-temperature poly-silicon (LTPS) TFTs fabrication process, based on excimer laser annealing, on polyimide (PI) substrate. The PI is spun on Si-wafer, used as rigid carrier, thus overcoming difficulties in handling flexible freestanding plastic substrates, eliminating the problem of plastic shrinkage with high temperature processing and allowing the use of standard semiconductor equipments. LTPS TFTs are fabricated according to a conventional non self-aligned process, with source/drain contacts fabricated by deposition of a highly doped Si-layer and patterned by a selective wet-etching. Excimer laser annealing is performed providing simultaneous dopant activation and crystallization of the active layer. The maximum process temperature was kept below 350degC. After LTPS TFTs fabrication, the PI layer is mechanically released from the rigid carrier, which can be re-used for a new fabrication process. The devices exhibit good electrical characteristics with field effect mobility up to 50 cm2/Vs. Analysis of electrical stability and characteristics in presence of mechanical strain will be also shown.

We show that AlN-based piezocapacitors with relatively high piezoelectric coefficient (d(33)) values (3-4 pC/N) can be fabricated on polyimide (PI) substrates at 160 degrees C or even at room temperature by sputtering processes. With respect to PI, a reduction of the piezoelectric performances was observed on polyethylene naphthalate (PEN). With the same approach, a d(33) value as high as 8 pC/N was achieved on rigid substrates (SiO2/Si). In all cases, a thin Al buffer layer was deposited, immediately before AlN, without breaking the vacuum in the deposition chamber, in order to preserve the interface from contaminations that would obstruct the optimal atomic stratification with the desired [0001] growth axis. The piezoelectric behavior was thus correlated to the degree of texturing of the AlN layer through the evaluation of the XRD texturing coefficients and to the morphology by means of AFM analyses. We show that a high level of roughness introduced by the PEN substrate, coupled with the effect of the substrate flexibility on the piezoelectric coefficient, reduces the impact of the AlN texturing on the d(33) values. (C) 2015 AIP Publishing LLC.

In this work, we compared structural and electrical properties of SiO 2 films obtained using three different deposition techniques: electron cycoltron resonance-plasma enhanced chemical vapor deposition (ECR-PECVD), tetraethylorthosilicate-plasma enhanced chemical vapor deposition (TEOS-PECVD) and vapor deposited oxide-atmospheric pressure chemical vapor deposition (Vapox-APCVD). Fourier transform infrared spectroscopies (FTIR) were carried out on the as-deposited SiO 2 films in order to evaluate the structural properties of the dielectrics. From the infrared absorption bands we also evaluated the evolution of hydrogen content evolution with time at a thermal annealing temperature of 450 °C. Electrical characterization was performed on MOS capacitors. In particular, we investigated the interface hydrogen-passivation mechanism at different annealing temperatures and for different annealing times. We also successfully applied the ECR and TEOS oxides as gate insulators on low-temperature polycrystalline silicon thin-film transistors (polysilicon TFTs).

Flexible sensors are gaining increasing interest in a number of applications, including biomedical, food control, domotics and robotics, having very light weight, robustness and low cost. In order to improve signal-to-noise ratio, integration of readout electronics is crucial and several technologies are available for the fabrication of thin film transistor (TFTs) based circuits on flexible substrates. Among these technologies, the low temperature polycrystalline silicon (LTPS) is particularly attractive, since LTPS TFTs show excellent electrical characteristics, good stability and offer the possibility to exploit CMOS architectures. The different aspects for the direct fabrication of LTPS TFTs on polymer substrates are reviewed and the specific fabrication process adopted on ultrathin polyimide (PI) substrates is described in some detail. In particular, LTPS TFTs were fabricated on ultra-thin PI substrates, deposited by spin-coating on a Si wafer, and excimer laser annealing was used to crystallize the Si. Characteristics electrical parameters are: field effect mobility up to 50 cm2/Vs; threshold voltage of 7 V; on/off ratio >105 . Then, as examples of flexible sensors, we present a tactile sensor for robotic applications and a pH sensor for biomedical applications. The tactile sensors were designed according to the Piezoelectric Oxide Semiconductor Field Effect Transistor (POSFET) structure, enabling sensing and signal conditioning at same site. In this way, it is possible to improve signal to noise ratio and hence the force sensitivity. In our LTPS POSFET devices we adopted as piezoelectric film the polyvinyledenedifluoride –trifluoroethylene P(VDF-TrFE) polymer. The piezoelectric polymer generates a charge on application of a mechanical force which influences the gate bias of the transistor. Gate bias variations, in turn, are directly reflected into drain current variations, that can be further processed by electronic circuits. The measured response to applied forces is linear, as reported in Fig 1a, with a piezoelectric coefficient up to 47 pC/N. The frequency response was tested in the range 30 - 1200 Hz and presented a high-pass behavior (see Fig.1b), according to the adopted common-source bias configuration. The pH sensor was fabricated according to the extended gate structure, as this structure offers many advantages over the conventional ISFET, such as the low cost, simple passivation and package, insensitivity of temperature and light, flexibility of shape of the extended-gate structure, and better long-term stability. The sensitive layer of the extended gate is a nanostructured ZnO film selectively deposited on the Al-gate electrode in a chemical bath at low-temperature. The pH-sensitivity was tested by exposing the extended gate to different pH-solutions and using as a reference electrode an Ag/AgCl electrode. In Fig. 2 the transfer characteristics, measured at low Vds and for different pH-solutions, are reported. In the inset of Fig.2, the threshold voltage shift induced by the pH variation is shown, giving a slope of 59 mV/pH for the pH range 1 – 9, close the ideal Nernstian response. The present results can pave the way to advanced flexible sensing systems, where sensors and local signal conditioning circuits can be integrated on the same flexible substrate.

Downscaling of polycrystalline silicon (polysilicon) thin film transistors (TFTs) is currently pursued to improve device speed, and in the present work we analyze the effects of downscaling on the self-heating related instability. Experimental results show improved stability of scaled polysilicon TFTs operating at same power densities. To explain this effect we performed three-dimensional thermo-electric numerical simulations, indicating that channel temperature reduction occurs in the scaled devices due to enhanced lateral thermal dissipation. Therefore, the present results show that downscaling not only provides higher speed devices but also a route for reducing self-heating related instability in polysilicon TFTs. © 2011 American Institute of Physics.

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The threshold voltage (V-T) variations induced by the drain bias (V-ds) are investigated in polycrystalline silicon thin film transistors (TFTs), with channel length ranging from 20 to 0.4 mu m, by combining experimental measurements and two-dimensional (2D) numerical simulations. A careful analysis of the electrical characteristics in both subthreshold and off regime is performed, by taking in account also the effects of the leakage current field enhanced mechanisms on the overall generation-recombination rate. We show that the main causes of V-T variations are the drain induced barrier lowering (DIBL) and floating body effects (FBEs), induced by impact ionization. The relative influence of FBEs and DIBL is analyzed by performing numerical simulations with or without including the impact ionization model. A detailed analysis of the 2D Poisson equation has allowed to identify and evaluate the contributions of DIBL and FBEs to the threshold voltage variation when both are present. It is found that, in short channel TFTs at high drain bias, the V-T variations can't be attributed to DIBL effect alone and there is a noticeable contribution of the FBEs to the threshold voltage reduction. From the numerical simulations, the influence of FBEs and DIBL on the electrostatic barrier at source junction and its reduction for increasing V-ds is analyzed for long and short channel TFTs.