144 results on '"Siriburanon, Teerachot"'
Search Results
102. A Dual-Step-Mixing ILFD using a Direct Injection Technique for High-Order Division Ratios in 60GHz Applications
103. A Divide-by-4 and Divide-by-6 Injection-locked Frequency Divider using Even-Harmonic Direct Injection Method for V-band Applications
104. A 13.2% Locking-Range Divide-by-6, 3.1mW, ILFD Using Even-Harmonic-Enhanced Direct Injection Technique for Millimeter-Wave PLLs
105. A Current-Reuse Class-C VCO using Dynamic Start-up Circuits
106. A Current-Reuse Class-C LC-VCO with an Adaptive Bias Scheme
107. A PVT-tolerant Dual-loop Injection-locked PLL for Clock Generation
108. A 0.022mm2 970µW Injection-Locked PLL with -243dB FOM using Synthesizable All-Digital PVT Calibration Circuits
109. A Dual-Loop Injection-Locked PLL with All-Digital PVT Calibration System
110. A 60GHz PVT-Tolerant Injection-locked Frequency Synthesizer with a Background Calibration Technique
111. A 60GHz Frequency Synthesizer Using a PVT-Tolerant Subharmonic Injection Technique
112. A Sub-harmonic Injection-locked Frequency Synthesizer with Frequency Calibration Scheme for Use in 60GHz TDD Transceivers
113. A Fractional-N Harmonic Injection-locked Frequency Synthesizer with 10MHz-6.6GHz Quadrature Outputs for Software-Defined Radios
114. A 60GHz PVT-tolerant Injection-locked Frequency Synthesizer with a Background Frequency Calibration Technique
115. A 20 GHz Push-Push Voltage-Controlled Oscillator for a 60 GHz Frequency Synthesizer
116. A 20GHz Push-Push Voltage-Controlled Oscillator for a MM-Wave Frequency Synthesizer
117. 'A 58.1-to-65.0GHz Frequency Synthesizer with Background Calibration for Millimeter-wave TDD Transceivers,'
118. A Wide Frequency Range 60GHz Static Frequency Divider Using Shunt-Series Peaking
119. An automatic place-and-routed two-stage fractional-N injection-locked PLL using soft injection
120. 13.6 A 42Gb/s 60GHz CMOS transceiver for IEEE 802.11ay
121. A 28-GHz fractional-N frequency synthesizer with reference and frequency doublers for 5G cellular
122. High-$Q$ Inductors on Locally Semi-Insulated Si Substrate by Helium-3 Bombardment for RF CMOS Integrated Circuits
123. 25.2 A 2.2GHz −242dB-FOM 4.2mW ADC-PLL using digital sub-sampling architecture
124. 14.1 A 0.048mm2 3mW synthesizable fractional-N PLL with a soft injection-locking technique
125. A 58.3-to-65.4 GHz 34.2 mW sub-harmonically injection-locked PLL with a sub-sampling phase detection
126. An HDL-synthesized gated-edge-injection PLL with a current output DAC
127. A 60-GHz sub-sampling frequency synthesizer using sub-harmonic injection-locked quadrature oscillators
128. 15.1 A 0.0066mm2 780μW fully synthesizable PLL with a current-output DAC and an interpolative phase-coupled oscillator using edge-injection technique
129. A Compact, Low-Power and Low-Jitter Dual-Loop Injection Locked PLL Using All-Digital PVT Calibration
130. A dual-loop injection-locked PLL with all-digital background calibration system for on-chip clock generation
131. A swing-enhanced current-reuse class-C VCO with dynamic bias control circuits
132. A 13.2% locking-range divide-by-6, 3.1mW, ILFD using even-harmonic-enhanced direct injection technique for millimeter-wave PLLs
133. A current-reuse Class-C LC-VCO with an adaptive bias scheme
134. A 2.2 GHz -242\;\textdB-FOM 4.2 mW ADC-PLL Using Digital Sub-Sampling Architecture.
135. A 20 GHz push-push voltage-controlled oscillator for a 60 GHz frequency synthesizer
136. A 58.1-to-65.0GHz frequency synthesizer with background calibration for millimeter-wave TDD transceivers
137. Compound structures of six new chaotic attractors in a solely-single-coefficient jerk model with arctangent nonlinearity
138. High-Q Inductors on Locally Semi-Insulated Si Substrate by Helium-3 Bombardment for RF CMOS Integrated Circuits.
139. A constant-current-controlled class-C VCO using a self-adjusting replica biasing scheme.
140. A Sub-Harmonic Injection-Locked Quadrature Frequency Synthesizer With Frequency Calibration Scheme for Millimeter-Wave TDD Transceivers.
141. 60-GHz sub-sampling PLL using a dual-step-mixing ILFD.
142. High-Q inductors on locally semi-insulated Si substrate by helium-3 bombardment for RF CMOS integrated circuits.
143. A sub-harmonic injection-locked frequency synthesizer with frequency calibration scheme for use in 60GHz TDD transceivers.
144. A 0.022mm2 970µW dual-loop injection-locked PLL with −243dB FOM using synthesizable all-digital PVT calibration circuits.
Catalog
Books, media, physical & digital resources
Discovery Service for Jio Institute Digital Library
For full access to our library's resources, please sign in.