Search

The operation of parallel inverters in microgrids is an important way to expand system capacity, but there are problems of circulating current fluctuations and power sharing errors in parallel inverters' operation. In this paper, a parallel operation strategy for inverters based on improved adaptive droop control and Equivalent Input Disturbance (EID) is proposed. Firstly, the model and control topology of parallel inverters are presented. Secondly, in order to solve the power sharing error caused by impedance difference and the voltage drop caused by virtual impedance, a reference voltage generator based on improved adaptive droop control is proposed. Then, considering the circulating current fluctuation as a disturbance, a voltage controller based on an equivalent input disturbance approach is proposed to reduce the disturbance. Finally, simulation in MATLAB/Simulink is carried out to verify the effectiveness of the parallel operation strategy. [ABSTRACT FROM AUTHOR]

The solar photovoltaic (PV) energy generation technology has grown rapidly. Herein, a novel continuous‐time Lyapunov‐based model reference adaptive control (LB‐MRAC) technique is suggested for determining the duty cycle of boost converter to maintain maximum power point (MPP) of the solar PV panel. For ensuring the fast‐tracking speed, the reference voltage of, respectively, MPP is calculated using perturb and observe (PO) and input to the MRAC technique. Using MATLAB/Simulink, the performances of the LB‐MRAC maximum power point tracking are comparatively analyzed with PO, incremental conductance, and adaptive neuro‐fuzzy inference system under diverse testing modes such as stand‐alone, partial shading, grid integrated, and real time. The proposed technique tracks MPP in just 3.7 ms having tracking efficacy between 99.15% and 99.59% under highly fluctuating irradiance and temperature with load uncertainties. In partial shading mode, four patterns (3 × 1 PV string) are devised and determined where that the suggested approach monitors the global MPP in merely 0.04 s with the highest power tracked and the least amount of shading loss. Next, the efficacy is checked in a three‐phase 50 kW grid‐integrated mode under realistic weather. Finally, the performance of the suggested continuous‐time LB‐MRAC technique is experimentally corroborated employing OPAL‐RT(OP4510) in the real‐time mode. [ABSTRACT FROM AUTHOR]

In this article, the structure of the normalized error-based proportional-integral (PI) controller is presented and its application to the DC–DC buck converter is discussed. The main motivation is to overcome the drawbacks of saturation and the limited range of controller gains offered by the traditional PI controller. Initially, the theoretical structure and advantages of an improved PI controller are shown. Next, the problem of regulation of the step-down DC–DC converter is addressed using the proposed controller. The objective is to keep the load voltage constant even when the converter parameters vary. The averaged state-space model of the converter is presented and a detailed stability analysis based on the Lypunov indirect method is carried out. The results show an improved range of controller parameters when the proposed controller is employed. Finally, some simulation results are shown to illustrate the effect of controller parameter variations on the output response. These results also verify the ability of the proposed controller to handle the changes in the load, input voltage, and reference voltage of the converter. Moreover, a comparative simulation study validates the superior transient response of the proposed normalized error-based PI controller over the traditional PI controller. [ABSTRACT FROM AUTHOR]

Series-cascaded microgrids (SCMGs) indeed provide control flexibility and high-voltage synthesis capabilities. However, the power distribution in SCMGs based on distributed generation (DG) sources stays understudied. This paper proposes an SCMG topology using non-dispatchable DG sources and battery energy storage, with an integrated power-routing control. The objective is to address power distribution limitations and stabilize SCMG output voltages under varying conditions. A case study validates the control methodology, considering zero irradiation levels for photovoltaic (PV) and maximum power sharing. The battery modules play a crucial role by providing power, voltage support, and maintaining capacitor voltage at a reference value of a PV-integrated module. This is achieved through a third harmonic current injection in the fundamental frequency current, coupled with proportional power distribution using a third harmonic power signal. The effectiveness of the proposed SCMG topology and control is demonstrated through MATLAB/Simulink and hardware-in-loop analyses (Typhoon HIL). The results present an extended power distribution between series-cascaded DG sources-based units while ensuring stable SCMG output voltages, even in adverse conditions like PV module intermittency. Future work aims to extend the proposed topology to a ring/delta-connection SCMG, where third harmonic current aids power distribution among SCMG legs and between series-cascaded DG sources-based units. [ABSTRACT FROM AUTHOR]

Power Quality (PQ) explore the issues resulting from current and voltage deviations. Due to an extraordinary rise in nonlinear loads, such as power electronic-based loads, the issues with power quality in distribution systems have become severe. Non-sinusoidal current is drawn from the electric grid by the nonlinear loads. These non-sinusoidal currents contain harmonics and reactive power that lower the system's overall PQ. Unified Power Quality Conditioner (UPQC) was emerged as a promising compensator to provide a solution for all PQ issues. UPQC generally had two Voltage Source Converters (VSC), one was Shunt, and the second was a Series that act as a current controller and voltage controller, respectively. Yet the controlling strategy of this compensator was still complex to design. Here, an optimization based Fractional Order Proportional Integral Derivative (FOPID) was developed to manage UPQC for improving PQ in a hybrid Renewable Energy System (RES). The optimal problem of the FOPID controller was solved through the use of a novel optimization approach. The pulse signal of UPQC was done using the optimal controller, which analyzes the error value of reference voltage and actual load voltage to generate pulses. The proposed optimal controller based UPQC performance was validated under various conditions such as interruption, swell, harmonics, and sag. The optimal controller offered THD value in sag, swell, and interruption period at current have 10.19%, 9.77%, and 10.09%, at voltage have 0.09%, 0.07%, and 0.30%. Moreover, the issues mitigation performance was compared to another present approaches. The validated outcome demonstrates the proposed model provides a well mitigation performance in all PQ issues conditions, so it was well fit for real-time implementation. [ABSTRACT FROM AUTHOR]

The authors propose a current fluctuation reduction strategy based on optimal three‐space‐vector pulse‐width modulation (TSVPWM), which is used to improve the service‐life of the dc‐link electrolytic capacitors in two‐level three‐phase voltage‐source inverter (VSI) system. Differing from the typical SVPWM‐based method that employs two adjacent active voltage vectors and zero voltage vectors to synthesise the reference voltage, the proposed strategy selects the required voltage vectors based on the minimum dc‐link electrolytic capacitor current fluctuation. With the proposed strategy, an objective function for the root‐mean‐square value of dc‐link electrolytic capacitor current is first constructed under the constraint of eight permissible voltage vectors. And then, by solving the minimum of the objective function through the piecewise linear programming, the optimal three voltage vectors under the different modulation ratios and load power factors are obtained accordingly, so as to achieve the minimum dc‐link electrolytic capacitor current fluctuations during each switching period. Meanwhile, a PWM implementation scheme based on positive–negative double carrier signals is presented, which not only simplifies the implementation process but also effectively reduces the switching losses of power devices. Finally, the experimental results demonstrate that the proposed strategy can minimise the dc‐link electrolytic capacitor current fluctuation under different working conditions. [ABSTRACT FROM AUTHOR]

Recently, Modular Multilevel Converters (MMC) are considered to be extensively used in medium‐voltage AC drives A two‐stage deadbeat‐based strategy is developed by the authors to make the implementation of Predictive Torque Control (PTC) technique for an induction motor that is fed by a three‐phase MMC possible. Despite various benefits of PTC strategy, it has not been widely employed for multilevel topologies due to the huge number of switching states of these converters, and the complex internal dynamics of topologies such as MMC. The proposed control scheme results in significant reduction of the computational burden, using an initial reference voltage that is determined at the first stage of the strategy by the deadbeat technique. Next, the predictive evaluation process is conducted at the second stage to simultaneously control the stator flux, electromagnetic torque and circulating current. The number of admissible vectors that should be evaluated in the cost function is effectively limited by only considering some adjacent vectors of the reference voltage in the first stage. Moreover, the circulating current control capability, which is necessary for effective operation of MMC, is also considered in the developed scheme. Finally, the satisfactory performance of the proposed strategy is validated through various experimental tests. [ABSTRACT FROM AUTHOR]

Purpose: Reference voltage or current generators are an important requirement for an analog or digital circuit design. Bandgap reference circuits (BGR) are most common way of generating the reference voltage. This paper aims to provide a detailed insight of design of a folded cascode operational amplifier (FC op amp) and a BGR circuit. The complete study flow from design to layout of the circuits on 180 nm semiconductor laboratory (SCL) process leading to bonding diagram for possible tape-out is discussed. This study work has been supported by MeitY, Govt. of India, through Special Manpower Development Project Chip to System Design. Design/methodology/approach: This paper provides a detailed insight in design of a FC op amp and a BGR circuit. The complete study flow from design to layout of the two circuits on 180 nm SCL process leading to bonding diagram for possible tape-out is discussed. Section 2 shows the design of FC op amp, beta-multiplier circuit and their simulation results. Section 3 describes the comparison of design of conventional BGR and the proposed BGR with other state-of-art BGR circuits. Section 4 gives the comparison of their performance. The conclusion is given in Section 5. Findings: The post-layout simulation of FC op amp show an open-loop gain of 64.5 dB, 3-dB frequency of 5.5 KHz, unity-gain bandwidth of 8.7 MHz, slew rate of 8.4 V/µs, CMRR of 111 dB and power of 25.5µW. Among the two BGR designs, the conventional BGR generated 693 mV of reference voltage with a temperature coefficient of 16 ppm/°C the other BGR, with curvature correction generated 1.3 V of reference voltage with a temperate coefficient of 6.3 ppm/°C , both results in temperature ranging from −40°C to 125°C. The chip layout of the circuits designed on 180 nm SCL process ensures design rule check (DRC), Antenna and layout versus schematic (LVS) clean with metal fill. Research limitations/implications: Slew rate, stability analysis, power are important parameters which should be taken care while designing an op amp for a BGR. Direct current gain should be kept higher to reduce offset errors. Input common mode range is decided by the operating temperature range. A higher power supply rejection ratio will reduce BGR sensitivity to supply voltage variations. Input offset should be kept low to reduce BGR error in reference voltage. However, this paper emphasis on the flow from schematic to layout using simulation tools. As part of the study, the bonding diagram for tape-out of BGR and FC design in the given SCL frame size with seal ring is also explored, for possible tape-out. Practical implications: Reference voltage or current generators are an important requirement for an analog or digital circuit design. BGR are most common way of generating the reference voltage. This paper provides a detailed insight in design of a FC op amp and a BGR circuit. The complete study flow from design to layout of the circuits on 180 nm SCL process leading to bonding diagram for possible tape-out is discussed. The chip layout of the circuits was designed on 180 nm SCL process ensuring DRC, antenna and LVS clean with metal fill using Cadence virtuoso and Mentor Graphics Calibre simulation tools. Social implications: BGR are most common way of generating the reference voltage. This paper gives a detailed insight of a BGR design using a folded-cascode operational amplifier. The FC op amp is biased using a beta multiplier circuit and high-swing cascode current mirror circuit. The paper discuss FC circuit design flow from schematic to layout. Originality/value: FC op amp is biased using a beta multiplier circuit and high-swing cascode current mirror. The paper discusses FC design flow from schematic to layout. The circuits were designed on 180 nm SCL technology with 1.8 V of power supply. The post-layout simulation show an open-loop gain of 64.5 dB, 3 dB frequency of 5.5 KHz, unity-gain bandwidth of 8.7 MHz, slew rate of 8.4 V/µs, CMRR of 111 dB and power of 25.5 µW. BGR were designed using FC op amp. The proposed BGR generated 1.3 V of reference voltage with a temperature coefficient of 6.3 ppm/°C in the range from −40°C to 125°C in schematic simulation. [ABSTRACT FROM AUTHOR]

In the present paper, Dynamic Voltage Restorer (DVR) controller using the Least Mean Fourth (LMF) algorithm is presented. The proposed DVR is used for protecting various voltage-sensitive loads from voltage-related power quality issues (i.e. balanced voltage sag, unbalanced voltage sag and voltage harmonic distortion, balanced and unbalanced swell, etc.) in a distribution system. The active and reactive power components of distorted source voltage are extracted using an adaptive LMF-based control algorithm for the calculation of reference load voltage for the voltage source converter (VSC) of DVR. The control algorithm doesn't require a phase-locked loop (PLL) and thus is less complex, robust and easy to implement. The adopted control algorithm for DVR is verified in MATLAB by simulation studies. The adaptive LMF-controlled DVR produces excellent dynamics response as compared to conventional adaptive Least Mean Square (LMS) and Synchronous reference frame theory (SRFT)-controlled DVR. The convergence rate of the source voltage fundamental active weight component is higher for the proposed adaptive LMF-controlled DVR. Various power quality issues such as balanced sag, unbalanced sag, balanced and unbalanced swell and a combination of these power quality issues are mitigated with the help of the LMF-controlled DVR. The simulation results are verified through real-time experimentation using an OPAL-RT under an RT lab environment. [ABSTRACT FROM AUTHOR]

The direct drive Permanent Magnet Linear Generator (PMLG)-based Ocean Wave Energy Converters (OWECs) produce variable A.C. voltage. In this article, the variable A.C. voltage is converted into a variable D.C. voltage by a standard rectifier. After that, a buck–boost inverter is used to produce constant amplitude A.C. voltage at the load end. The buck–boost inverter, implemented here, operates in three modes: buck, boost, and buck–boost. Furthermore, a switching algorithm is developed to generate reference A.C. voltage. Systematic design of power converter, small-signal analysis, and PWM control strategy are discussed. The simulation results and results from a laboratory prototype are presented to support the theoretical concepts. [ABSTRACT FROM AUTHOR]

[Objective] Working at the maximum power point of photovoltaic cells can improve energy utilization efficiency and ensure sufficient power supply. However, most distributed photovoltaic power generation systems are located in natural environments, and the nonlinear changes in the environment in which photovoltaic panels operate make it very difficult to maintain their maximum power point. Traditional maximum power point tracking methods, such as perturbation observation, conductance increment, and particle swarm optimization, yield unsatisfactory results because of their different shortcomings. [Methods] To address the problem of maximum power point tracking in photovoltaics, this paper proposes a maximum power point tracking (MPPT) method for photovoltaics through research on neural network technology and is based on an extreme learning machine (ELM) neural network controller optimized using the sparrow search algorithm (SSA). Herein, a training database is established by analyzing and collecting data on the maximum power curve of photovoltaic cells at different temperatures and light intensities. The proposed neural network controller is trained to form a two-input and one-output controller. The voltage value corresponding to the maximum power point is calculated in real time based on the collected temperature and light intensity data and transmitted to the subsequent boost converter circuit controller. Further, a modulated wave is generated through PWM modulation, which controls the output voltage of the boost converter circuit to track the maximum power point voltage and builds a simulation experimental platform using MATLAB/Simulink. [Results] The simulation results show the following: 1 the proposed method has a high calculation speed and can rapidly track the reference voltage value, making the voltage value accurate. 2 The proposed method directly controls the voltage changes without oscillation or overshoot, resulting in a stable system. 3 The proposed method shows good search accuracy, convergence speed, and stability. The performance of the other three aforementioned mainstream tracking methods and the output voltage of the proposed method under sudden increase or decrease in light intensity are analyzed. [Conclusions] The results indicate that the proposed method can rapidly achieve maximum power point tracking without oscillation and overshoot issues. Compared with the traditional methods, the proposed method performs better in terms of search accuracy, convergence speed, and stability. [ABSTRACT FROM AUTHOR]

Introduction. When the working point of the indirect vector control is constant, the conventional speed and current controllers operate effectively. The operating point, however, is always shifting. In a closed-system situation, the inverter measured reference voltages show higher harmonics. As a result, the provided pulse is uneven and contains more harmonics, which enables the inverter to create an output voltage that is higher. Aim. A space vector modulation (SVM) technique is presented in this paper for type-2 neuro fuzzy systems. The inverter’s performance is compared to that of a neuro fuzzy type-1 system, a neuro fuzzy type-2 system, and classical SVM using MATLAB simulation and experimental validation. Methodology. It trains the input-output data pattern using a hybrid-learning algorithm that combines back-propagation and least squares techniques. Input and output data for the proposed technique include information on the rotation angle and change of rotation angle as input and output of produced duty ratios. A neuro fuzzy-controlled induction motor drive’s dynamic and steady-state performance is compared to that of the conventional SVM when using neuro fuzzy type-2 SVM the induction motor, performance metrics for current, torque, and speed are compared to those of neuro fuzzy type-1 and conventional SVM. Practical value. The performance of an induction motor created by simulation results are examined using the experimental validation of a dSPACE DS-1104. For various switching frequencies, the total harmonic distortion of line-line voltage using neuro fuzzy type-2, neuro fuzzy type-1, and conventional based SVMs are provided. The 3 hp induction motor in the lab is taken into consideration in the experimental validations. References 22, tables 3, figures 15. [ABSTRACT FROM AUTHOR]

This paper proposes a transient event-capturing circuit and adaptive PI control to monitor and improve the transient response of a superbuck converter. The transient event-capturing circuit is composed of coupling and capturing circuits. The coupling circuit converts the output voltage to the sensed voltage, whereas the DC and ripple components are eliminated. By counting the up-crossing and down-crossing numbers of the sensed voltage, the capturing circuit classifies the output voltage response into different transient events according to oscillation cycles. The transient events carry the stability information that can be used to adjust the bandwidth and phase margin. Finally, an adaptive PI controller is implemented with the proposed transient event-capturing circuit to improve the stability and transient response. Experimental results of the 100 W superbuck converter verify the effectiveness of the adaptive PI controller for improving the transient response and stability. The adaptive PI controller eliminates the oscillations due to deviated parameters and operating conditions. The maximum oscillation amplitude is reduced from 2 V to 400 mV at the reference voltage change. [ABSTRACT FROM AUTHOR]

A hybrid energy-efficient, area-efficient, low-complexity switching scheme in SAR ADC for biosensor applications is proposed. This scheme is a combination of the monotonic technique, the MSB capacitor-splitting technique, and a new switching method. The MSB capacitor-splitting technique, as well as the reference voltage Vaq allow for more options for reference voltage conversion, resulting in higher area savings and higher energy efficiency. In a capacitor array, the circuit performs unilateral switching during all comparisons except for the second and last two comparisons, reducing the difficulty in designing the drive circuit. The proposed switching scheme saves 98.4% of the switching energy and reduces the number of unit capacitors by 87.5% compared to a conventional scheme. Furthermore, the SAR ADC employs low-noise and low-power dynamic comparators utilizing multi-clock control, low-sampling error-sampling switches based on the bootstrap technique, and dynamic SAR logic. The simulation results demonstrated that the proposed SAR ADC achieves 61.51 dB SNDR, 79.21 dB SFDR and consumes 0.278 μW of power in a 180 nm process with a 1 V power supply, a full swing input signal frequency of 23.33 kHz, and a sampling rate of 100 kS/s. [ABSTRACT FROM AUTHOR]

In order to harness a greater share of wind energy resources, offshore wind energy projects are venturing into deep-sea locations. In this progression, the issue of grid integration control becomes increasingly challenging. Traditional Model Predictive Control (MPC) has been introduced in offshore wind energy grid integration control due to its merits, such as not requiring modulators, dispensing with decoupling, incorporating constraint handling, and facilitating online optimization. However, it heavily relies on a model and consequently experiences a substantial loss of control effectiveness in the face of system parameter variations. In light of this, this study presents an active-disturbance-rejection-based three-vector sequence model predictive control approach. This method effectively mitigates the influence caused by changes in system parameters, endowing the system with self-disturbance rejection capabilities and enhancing its fault recovery abilities. The method employs self-disturbance control to track voltage reference values and employs the concept of sequence control to eliminate weighting factors in the cost function. Furthermore, it employs three-vector control to achieve error-free operation. The simulation results confirmed that the proposed method effectively minimizes voltage and power transients. It demonstrated superior control effectiveness and shorter response times, enabling the system to rapidly restore to a stable operational state following disturbances. [ABSTRACT FROM AUTHOR]

The major power quality issues in grid are voltage fluctuations and harmonics. For better power quality of the power system during disturbances on the grid, the UPQC device is utilized to maintain voltage magnitude and reduced harmonics. At the DC link of UPQC along with the capacitor, a renewable PV source is connected which contributes in voltage compensation by the series VSC and harmonics compensation by the shunt VSC. For stable DC voltage generation from PV source a modified P&O MPPT with DC reference is included controlling the boost converter connected to PV source. The controllers of VSCs are operated by feedback loop synchronized schematics with voltage reference generation in series VSC control and current reference generation in shunt VSC control. The shunt control is updated with hybrid Fuzzy-PI controller replacing the traditional PI controller further improving the power quality of the grid. The hybrid Fuzzy-PI varies the Kp and Ki gains as per the error generated by the DC voltage comparison concerning 25 rule-base for each gain. A comparative performance analysis is done with both the controllers in the shunt converter and the results are generated using MATLAB Simulink software. [ABSTRACT FROM AUTHOR]

A voltage reference is indispensable in Integrated Circuits. To improve the limited linear output voltage range and energy efficiency of a voltage reference, we innovatively propose a switched-capacitor-based programmable voltage reference scheme employing inverter-based OTAs to reduce the power consumption, simultaneously using a novel Correlated Level Shifting (CLS) technique (without active overhead) to enhance the OTA's DC gain and integral gain. Experimented with SMIC 180 nm CMOS technology, a scheme-based voltage reference realizes a programable output voltage range from 266 to 995 mV at −30 to 120 °C, and the corresponding temperature coefficient (TC) ranges from 82.4 to 99.5 ppm/°C. The power consumption is 976 nW. Furthermore, comparative experiments and evaluations with other schemes have unequivocally verified the superiority of our proposed scheme, characterized by its high energy efficiency and wide output voltage range. The scheme can be suitably deployed in a multitude of novel edge-data processing systems. [ABSTRACT FROM AUTHOR]

This study investigates the performance of a wind-solar generator (WSG) in the Hail region of Kingdom of Saudi Arabia (KSA) with a fractional order PI controller (FOPI) applied to the grid connection line. The proposed hybrid generator consists of a wind turbine with a PMSM machine and a PV panel connected to a secondary distribution grid by a DC link, three-phase inverter, and an RL filter. The line currents injected into the grid and/or loads are controlled by calculating the output reference voltage of an inverter and by the reference active and reactive requested powers. For this purpose, control loops around the RL filter were developed with fractional-order proportional-integral (FOPI) controllers, and a comparison with classic PI controllers was made. The system was simulated using the MATLAB/Simulink software. The results showed that the generator satisfied the power demand under the climatic conditions of the Hail region. They also demonstrated the good performance of the proposed controllers, which had good tracking accuracy and robustness to variations in wind speed and power demanded by loads in a very short time. The FOPI controller exhibited faster dynamic response and less overshoot than the classic PI controller. [ABSTRACT FROM AUTHOR]

Three-level NPC inverters have been widely used in grid-connected systems due to their superior performance compared with two-level inverters, but more switches lead to high fault probability. Meanwhile, the neutral point potential (NPP) fluctuation of the DC link is an inherent problem of three-level NPC inverters. To keep the three-level NPC inverter running stably after single-arm failure, a fault-tolerant control strategy based on an optimised space vector pulse width modulation (SVPWM) is proposed in this paper. Firstly, the common-mode voltage (CMV) of the postfault three-level NPC inverter is analysed and then the preliminary synthesis principles of the reference voltage vector are determined. Then, in order to ensure the NPP balance and the quality of the grid-connected currents, the reference voltage vector synthesis rules are optimised, a low-pass filter (LPF) and a hysteresis comparator are designed, respectively, to ensure the quality of grid-connected currents and effectively decrease the DC link NPP deviation. Finally, the simulation results show that the proposed fault-tolerant control strategy can realize the stable and reliable operation of the grid-connected three-level NPC inverter after single-arm failure, and the CMV can be reduced significantly, the quality of grid-connected currents is also improved. The proposed fault-tolerant strategy also shows good performance when the grid-connected currents change. [ABSTRACT FROM AUTHOR]

The coordinated control system is an emerging topic in the electrical field for generating the required power. The coordinated system control includes Rotor Side Converter (RSC) and Grid Side Converter control. It is applicable to the Doubly Fed Induction Generator (DFIG) to generate the needed power outcome. However, the traditional current controller method has recorded a high oscillation torque signal, reducing the power generation percentage. Hence, this research mainly intends to control the oscillation torque signal and offer a better stability range. Hence, a novel Buffalo-based Hysteresis Control system to control the gird current and the Voltage is regulated by the Proportional-Integral controller. In addition, the 15 kW wind power system is designed in MATLAB/SIMULINK environment. Hence, the managed RSC can quickly track the DC link reference voltage. Using the proposed controller, the Voltage of the DFIG coordinated system is varied up to 500 V. Also, the minimum Integral Square Error reported in the proposed model is 1.2 for 1 s time series, which verified the stability of the proposed DFIG system. Also, its processing time is 5 min, which is quite better than the compared models. [ABSTRACT FROM AUTHOR]

The existing active-type voltage arc suppression methods do not consider the influence of line voltage drop, which leads to the existence of large fault residual current at the fault point for low-resistance grounding fault occurring in the distribution network and affects the reliable extinguishing of the fault arc. In this paper, an active inverter is used to inject a compensating current to the neutral point of the system before and after the fault, and the distance between the fault point and the bus is calculated, then the reference value of the neutral point voltage which controls the fault point voltage to zero can be obtained. A double closed-loop control strategy of current inner loop and voltage outer loop is used to track the voltage reference value. The simulation results show that the proposed method is independent of the exact zero-sequence admittance value, and not only has a good arc suppression effect under different fault conditions, but also can effectively suppress the harmonic components of the fault current. [ABSTRACT FROM AUTHOR]

Summary: In a PV array, the power‐voltage characteristic (P‐V) and output power are completely dependent on atmospheric conditions. Consequently, the P‐V curve's maximum power point (MPP) likewise changes significantly. This abrupt oscillation in the MPP may be caused by the PV panel being uniformly or partially shaded by trees, buildings, raindrops, and clouds. However, in both circumstances, the maximum power point tracking (MPPT) turns into a highly nonlinear issue with a time‐bounded solution. The unpredictable weather circumstances change P‐V characteristics after every short time interval. Therefore, this research presents a hybrid two‐stage adaptive MPPT to overcome the environmental uncertainties. The first stage is MPPT control block for determining reference voltage for each MPP and the second stage is modified model reference adaptive controller (MMRAC) block fine‐tunes converter duty cycle to maintain MPP of PV panel. The probabilistic evaluation is executed through four distinct levels of uncertainty, including stand‐alone, partially‐shaded, grid integration, and OPAL‐RT to examine the system robustness in diverse scenario. The possibility of the tracking failure caused by dynamic irradiance change is also verified. Moreover, efficiency, tracking ability, power loss, ripple, and error rate are compared with the state‐of‐the‐art strategies, that is, ANFIS, INC, P&O, and VSPO. The satisfactory performances of the new strategy under simultaneously varying irradiance, temperature, and load; partially shaded and grid integration shows the supremacy. [ABSTRACT FROM AUTHOR]

Hybrid AC--DC microgrid provides highly distributed generation receiving capacity by reducing multiple power conversions in individual AC or DC microgrids. Thus, the control of grid variables in a hybrid AC--DC microgrid is complicated due to erroneous frequency transients and the impact of negative sequence components. Hence, a novel Synchronous Reference Frame Phase-Locked Loop (SRF-PLL) with Self-curing decoupling network is introduced in which this network provides synchronization and distinguishes positive and negative sequences in discrete blocks. To eliminate fluctuation of grid variables in ac and dc sides, a novel Switched Tuned Arm Filter (STAF) and Variable Voltage Stabilization Compensator (VVSC) Multi-loop controller including central Deep Belief Network (DBN) with Fuzzy controller is presented. In which STAF Multi-loop controller use tuned circuits to suppress higher-order harmonics. Also, a central DBN with a fuzzy controller provides a control signal to an ac/dc converter to regulate power transmission. Additionally, in order to stabilize the dynamic voltage and compare the DC bus voltage with the reference value, the VVSC Multiloop controller uses a PWM to compare the DC bus voltage. Then the proposed techniques are simulated in Simulink platform and the results achieved stabilized voltage, low RMSE, and low delay. [ABSTRACT FROM AUTHOR]

A low-power SAR ADC with capacitor-splitting energy-efficient switching scheme is proposed for wearable biosensor applications. Based on capacitor-splitting, additional reference voltage Vcm, and common-mode techniques, the proposed switching scheme achieves 93.76% less switching energy compared to the conventional scheme with common-mode voltage shift in one LSB. With the switching scheme, the proposed SAR ADC can lower the dependency on the accuracy of Vcm and the complexity of digital control logic and DAC driver circuits. Furthermore, the SAR ADC employs low-noise and low-power dynamic comparators utilizing multi-clock control, low sampling error sampling switches based on the bootstrap technique, and dynamic SAR logic. The simulation results demonstrate that the ADC achieves a 61.77 dB SNDR and a 78.06 dB SFDR and consumes 4.45 μW of power in a 180 nm process with a 1 V power supply, a full-swing input signal frequency of 93.33 kHz, and a sampling rate of 200 kS/s. [ABSTRACT FROM AUTHOR]

This paper presents an energy‐efficient digital‐to‐analog converter (DAC) switching method with low common‐mode variations for high‐resolution successive approximation register (SAR) analog‐to‐digital converters (ADCs), while enabling to implement resolutions such as 14‐bit as compared to the typical 10‐bit. The proposed switching method enables high resolution by having a nearly constant common‐mode voltage and employing input‐swapping to use the reference voltage (Vref) only in the sampling phase. This method eliminates the need for the third reference voltage during the entire DAC switching steps, which reduces the required number of switches at the bottom plates of the capacitors. The use of lower number of switches not only lowers the DAC control logic complexity, but also results in a faster operation, lower power, and smaller area. When compared to conventional 10‐bit SAR ADCs, the proposed switching method in a 10‐bit implementation reduces the average energy and area by 96.09% and 75%, respectively, while offering high‐resolution implementation options such as 14 bits. [ABSTRACT FROM AUTHOR]

In a grid-connected photovoltaic system, the quality of energy injected by the photovoltaic system into the grid is directly linked to the topology of the inverter used and to the efficiency of its control technique. This paper addresses this problem for a two-level grid-connected photovoltaic inverter operating under low irradiance conditions. The aim is to reduce the harmonic distortion on the electrical network and therefore improve its power quality. To achieve this goal, a control strategy was set up considering the nonlinearity of the dynamic system, and the high dimension of the system model. Thus, a nonlinear controller designed using the backstepping technique is proposed. The effectiveness of this control strategy was evaluated by simulation in MATLAB/Simulink. Results show that the proposed control technique significantly improves the power quality of the grid-connected photovoltaic system by minimizing the current harmonic distortion rates in low irradiance conditions. The current harmonic distortion rates obtained for solar irradiance of 1000 W/m2, 750 W/m2, 500 W/m2, and 250 W/m2 are 0.48%, 0.78%, 1.22%, and 2.16%, respectively. The power factor is 0.988, and the DC bus voltage is maintained at its reference voltage of 600 V with a very low response time during the transient phases. A comparison of our simulation results with those found in the literature on other control techniques such as proportional-integral-derivative (PID) and synergetic controls shows the efficiency, superiority, and satisfactory performance of the proposed control scheme to minimize harmonic distortion under low irradiance conditions. The robustness and better dynamic performance of the proposed backstepping controller under varying irradiance conditions have also been shown. [ABSTRACT FROM AUTHOR]

This paper proposes a self-supplied power management system to efficiently rectify and regulate the AC voltage received from wireless power transmission techniques to power or recharge biomedical devices. The proposed power management system comprises three integrated functional units, namely, a fully cross-coupled rectifier, a self-biased reference voltage, and a capacitor-less low-dropout regulator (LDO). To reduce the current complexity of designing capacitor-less LDOs, a new architecture based on a pair of diode-connected transistors at the load of the LDO is devised which alleviates the need for a large load capacitor. The proposed power management system is implemented in a 65-nm CMOS process with an active chip area of 0.0810 mm2. Experimental results indicate that this system is capable of rectifying an AC signal up to 5 V at a frequency of 6.78 MHz. This rectified signal is then regulated to a fixed DC voltage of 1.75 V, while the load current can vary between 0 and 75 mA, with a maximum voltage dropout of 170 mV. Advantageously, the proposed power management system is significantly robust to temperature, as a 55 °C change in ambient temperature leads to only a 9% degradation in its overall performance. Furthermore, the ability of the power management system to drive low-power consumer electronics is demonstrated, and its superiority is evidenced by a performance comparison with the latest integrated power management systems presented in the literature. [ABSTRACT FROM AUTHOR]

Unified power quality conditioner is chiefly employed to offer power quality improvement, especially in grid connected mode of operation in microgrid applications. This article proposes an artificial ecosystem optimized neural network for control of photovoltaic system and battery powered UPQC for microgrid applications. The intelligent routine implemented by the proposed controller helps tune parameters such as the error between load voltage references and measured load voltage signals so that the optimal performance of the system can be reached as its exploratory and exploitation capabilities are leveraged in controller design. A prototype of a three-phase system with a dually powered conditioner is tested and validated in MATLAB-Simulink environment in a variety of dynamic scenarios that are commonly present in a contemporary distribution network, such as grid voltage changes, grid inaccessibility, variation in photovoltaic power output, and nonlinear load. It is shown that the proposed controller, being aware of the instantaneous values of grid voltages, was able to adequately compensate in magnitude and phase under all dynamic scenarios to maintain the load voltage constant at the nominal value and sinusoidal. When the system switches automatically from grid-connected mode to islanded mode due to a grid fault, it was observed that the controller prioritizes delivering uninterrupted power to critical loads and enables fast discharge from the battery. The total harmonic distortion percentages of grid currents and load voltages are found to be within the limits as per IEEE-519 standards. [ABSTRACT FROM AUTHOR]

This paper presents a resistor-less high-order curvature compensation bandgap voltage reference. A high-order curvature compensation is based on generating successive VGS voltages with different temperature characteristics, which are used to cancel thermal nonlinearity the first- and higher-order terms of the transistor voltage VEB. At the same time, a piecewise-linear curvature compensation circuit is used to broaden the temperature range of the whole circuit and achieve low-temperature coefficient. The proposed bandgap reference was designed using standard CSMC 0.18-μm CMOS technology. Simulation results indicate that the proposed bandgap reference achieves the best temperature coefficient of 2.37 ppm/°C from − 40 to 125 °C with a supply voltage of 5 V. The BGR output is about 1.1881 V and a − 60.7-dB PSRR at 10 kHz while only consuming 200 μW. [ABSTRACT FROM AUTHOR]

Summary: This paper proposes a power factor correction (PFC) method in a single‐phase AC/DC converter using a predictive control algorithm (PCA) through a boost DC/DC converter. The minimum value of the DC‐link capacitor has been evaluated on the DC distribution side for stable operation of the converter. The proposed technique can be applied to the cascade connection of the converters, that is, the uncontrolled rectifier with boost converter and load. The value of the minimum capacitance is obtained as a function of the reference voltage of the DC‐link capacitor, the frequency of the supply, the input power, and the maximum DC‐link voltage. The proposed design is applied to control the boost converter for PFC applications using PCA at the minimum DC‐link capacitor value. The calculated value of DC‐link capacitance has been reduced to a greater extent as compared to the conventional calculation of DC‐link capacitance. The converter operation with the designed value of DC‐link capacitance has been verified through the MATLAB and Typhoon Simulink environment, and an experimental prototype model is used for the validation by using the FPGA based Typhoon HIL‐402 kit. [ABSTRACT FROM AUTHOR]

Recently, synchronous reluctance motors have had a resurgence of benefit for many applications in the industry because of their simple framework, high effectiveness, low manufacturing cost, and high robustness. This research presents two inverter neutral-point-clamped topologies to improve the vector-controlled SynRM; these topologies offer interesting characteristics compared to the conventional structure-based two-level inverter. To get an inverter smooth switch command sequence, pulse width modulation has been modified to be adapted to the new topologies. The goal is to produce an output voltage vector which approaches the reference voltage vector as closely as possible. As a result, and contrary to the two-level inverter, that can only supply eight voltage vectors, the seven-level inverter can produce one 127 voltage vectors, and the nine-level inverter can produce 255 voltage vectors. Besides, an anti-windup structure is used in the speed loop regulation to ensure robust control with less static error. A comparison is done between the proposed techniques-based multilevel inverters and the conventional technique-based two-level inverter. Satisfactory results have been got by numerical simulation using MATLAB/Simulink. [ABSTRACT FROM AUTHOR]

A hybrid advanced bus clamping space vector PWM (ABCSVPWM)-based hysteresis current-controlled (HCC) voltage-sourced two-level inverter (VSI)-fed induction motor (IM) drive with a nearly constant switching frequency for improved peak-to-peak ripple torque is proposed in this paper. Online computation of the current error boundary from the sampled magnitudes of the reference phase voltages reduces the complexity and merges the advantages of current-controlled and voltage-controlled drives. The hybrid SVPWM applies advanced bus clamping sequences along with the conventional one and improves the torque ripple reduction capability, which enhances the performance. The phase voltage harmonic spectrum of the proposed drive is similar to that of voltage-controlled drives. An extensive analysis of the proposed drive is performed using MATLAB-Simulink for the transient and steady state responses of the drive. The peak-to-peak torque ripple is significantly improved. The proposed controller is examined physically on a 2.2 kW, 3 φ, 415 V induction motor (IM) using the dSPACE platform. [ABSTRACT FROM AUTHOR]

Photovoltaic sources have recently become economical electrical generation resources with high potential power generation systems. The increasing rate of PV system penetration and grid integration has raised serious concerns about the stability and reliability of energy networks. The grid-connected inverter and its operations are taken into consideration in the architecture to provide grid failure robustness. As a result, the capacity of the Low Voltage Ride-Through photovoltaic grid-connected power production system to inject more reactive power into the grid when the voltage disturbance is large has become the most critical issue correlated to the grid. The proposed IPBC controller circuit automatically adjusts the duty cycle value, a desired constant output voltage value, and the load output. To achieve this objective, a suitable feedback controller is necessary to regulate the output voltage to a reference value by automatically controlling the system's duty cycle, quick response and output load, minimum overshoot zero steady-state error. The effectiveness and reliability of the proposed IPBC controller-based grid-connected solar power generation are developed and verified MATLAB 2017 b software environment. Several simulation programs are based on the operation and performance under different operating conditions evaluated for each of different parameters like steady-state error, THD, and system efficiency. [ABSTRACT FROM AUTHOR]

This research intends to establish a robust vector control (VC) of a 3-ϕ induction motor (IM). The classical 2-level inverter is displaced by a 5-level neutral-pointclamped (NPC) inverter. The 2-level inverter may only supply 8 voltage vectors, while the 5-level NPC inverter can furnish 125 voltage vectors. The objective is to bring about a command voltage vector that converges to the reference voltage vector as closely as possible; hence, guaranteeing a quick response on one hand and improving the dynamic performance on the other hand. A robust sliding mode controller (SMC) structure is used in all regulation loops. Satisfactory results are obtained for various speed zones. The quality and robustness of the global system are tested under resistive torque disturbance, reversal, high, and low-speed ranges in order to prove system stability. All the simulations have been performed under MATLAB/Simulink. [ABSTRACT FROM AUTHOR]

Due to the application of only one voltage vector in a control period, conventional model predictive torque control (MPTC) suffers from relatively large steady‐state ripples. The‐state‐of‐the‐art double‐vector‐based MPTC (DVMPTC) was proposed to improve steady‐state performance. However, its duty cycle optimization method significantly affects the control performances. Thus, MPTC with hybrid mode duty cycle optimization is proposed, which realizes better performance than the universal DVMPTC, and obtains the appropriate average switching frequency, especially at high‐speed domain. The proposed method utilises the universal DVMPTC method, while it equips duty cycle optimization with discrete space vector modulation (DSVM) scheme as the additional constraint for further reducing the reference voltage tracking error that exists in DVMPTC. What's more, rotation module and pre‐selection strategies are involved in simplifying the design of vector selection methods. Comparative simulations and experiments verify the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

In the analog and mixed-signal integrated circuits, voltage references that are independent of various factors such as temperature drift, noise, supply voltage, etc., and efficient in terms of power as well as area, are highly in demand to improve the efficiency of the overall circuits. Voltage references are one of those circuits that have applications in both high-power systems and low-power system-on-chip (SoC) designs for wireless connectivity like the internet of the things (IoT) or the internet of the medical things (IoMT). They are responsible for providing a stable bias or reference voltage. Thus, voltage reference influences directly or indirectly the performance of these systems. A comparative study between the techniques used in bandgap voltage references and CMOS voltage references, in terms of performance parameters such as line sensitivity, output noise, PSRR, temperature coefficient, etc., is presented in this paper so that we can choose the voltage references as per the applications and environment. [ABSTRACT FROM AUTHOR]

In the literature, different approaches that are employed in designing automatic voltage regulators (AVRs) usually model the AVR as a single-input-single-output system, where the input is the generator reference voltage, and the output is the generator voltage. Alternately, it could be thought of as a double-input, single-output system, with the excitation voltage change serving as the additional input. In this paper, unlike in the existing literature, we designed the AVR system as a sextuple-input single-output (6ISO) system. The inputs in the model include the generator reference voltage, regulator signal change, exciter signal change, amplifier signal change, generator output signal change, and the sensor signal change. We also compared the generator voltage responses for various structural configurations and regulator parameter choices reported in the literature. The effectiveness of numerous controllers is investigated; the proportional, integral and differential (PID) controller, the PID with second-order derivative (PIDD2) controller, and the fractional order PID (FOPID) controller are the most prevalent types of controllers. The findings reveal that the regulator signal change and the generator output signal change significantly impact the generator voltage. Based on these findings, we propose a new approach to design the regulator parameter to enhance the response to generator reference voltage changes. This approach takes into consideration changes in the generator reference voltage as well as the regulator signal. We calculate the regulator settings using a cutting-edge hybrid technique called the Particle Swarm Optimization African Vultures Optimization algorithm (PSO–AVOA). The effectiveness of the regulator design technique and the proposed optimization algorithm are demonstrated. [ABSTRACT FROM AUTHOR]

In this article, a novel Euclidean distance mapping (EDM) technique for space vector pulse width modulated (SVPWM) voltage source inverter (VSI) is presented. The EDM technique processes space vector diagram (SVD) as an image, which simplifies execution of SVPWM. In the proposed technique, Euclidean distance calculation between all eight switching vectors and the tip of the revolving reference voltage vector for every subcycle is carried out. The identification of nearest three voltage vectors (NTV) and switching sequence designs are done on the basis of these Euclidean distances. The EDM-SVPWM technique achieves improvement in the inverter performance in the context of the factors like stator flux ripple over a subcycle, distortion factor (DF), total harmonics distortion (THD) of line voltage, and line current ripple of the inverter. The performance of EDM-SVPWM technique is verified analytically and confirmed experimentally by hardware implementation over the wide range of fundamental frequencies and modulation indices. [ABSTRACT FROM AUTHOR]

This study reports on the results of an experimental investigation into a multi-objective nonlinear oscillator-based frequency-locked loop with an advanced pre-filter in a three-phase photovoltaic grid interface employing direct and quadrature hysteresis control for a distribution system. A reference voltage generation approach is also used to obtain the most power out of the solar array. In various case studies, including reactive and real power balance between load, grid, and photovoltaic systems under uncertain and varying solar power conditions, the proposed nonlinear second-order generalized integrator-based frequency-locked loop with an advanced filter performance is compared to a second-order generalized integrator-based frequency-locked loop. The proposed control enabled more stable operation and appropriate synchronization when grid voltages were distorted by the combined action of dc offset and harmonics. According to experiments, the suggested control achieves grid synchronization more correctly under abrupt changes in grid conditions and disturbances. The findings of an experimental laboratory prototype are confirmed using power quality indices for harmonic distortion assessment of source currents, as defined by the IEEE-519 guidelines. [ABSTRACT FROM AUTHOR]

The paper presents a honey badger algorithm (HB) based on a modified backwardforward sweep power flow method to determine the optimal placement of droop-controlled dispatchable distributed generations (DDG) corresponding to their sizes in an autonomous microgrid (AMG). The objectives are to minimise active power loss while considering the reduction of reactive power loss and total bus voltage deviation, and the maximisation of the voltage stability index. The proposed HB algorithm has been tested on a modified IEEE 33-bus AMG under four scenarios of the load profile at 40%, 60%, 80%, and 100% of the rated load. The analysis of the results indicates that Scenario 4, where the HB algorithm is used to optimise droop gains, the positioning of DDGs, and their reference voltage magnitudes within a permissible range, is more effective in mitigating transmission line losses than the other scenarios. Specifically, the active and reactive power losses in Scenario 4 with the HB algorithm are only 0.184% and 0.271% of the total investigated load demands, respectively. Compared to the base scenario (rated load), Scenario 4 using the HB algorithm also reduces active and reactive power losses by 41.86% and 31.54%, respectively. Furthermore, the proposed HB algorithm outperforms the differential evolution algorithm when comparing power losses for scenarios at the total investigated load and the rated load. The results obtained demonstrate that the proposed algorithm is effective in reducing power losses for the problem of optimal placement and size of DDGs in the AMG. [ABSTRACT FROM AUTHOR]

Cascaded H-bridge (CHB) converters have been used to integrate multiple DC sources into grids with only a single-stage power conversion. However, power sharing among parallel DG units and power sharing among power cells of a CHB converter must be satisfied when they are used in an islanded microgrid system. This work presents a comprehensive power sharing scheme. First, the power sharing between parallel DG units is realized using the well-understood droop control. Power allocation among the CHB converter three-phase legs is also obtained with injection of zero-sequence voltage. In contrast with the conventional open-loop zero-sequence voltage injection approaches, where the reference zero-sequence voltage is obtained via an open-loop interphase power adjustment manner that is typically calculated based on the assumption of a well-balanced three-phase converter current, the proposed approach obtains zero steady-state interphase power control errors via a simple closed-loop interphase power controller. This approach can be used in the case of a CHB system with significant imbalanced current presented. Finally, a power sharing approach among the series-connected H-bridge modules within a converter leg is also developed via the re-distribution of series-connected module voltages. Each power cell can actively participate in the power sharing according to the back-stage battery state of charges using the aforementioned approach, but without any interference from the abovementioned triple-layer power control architecture. [ABSTRACT FROM AUTHOR]

Battery energy storage systems (BESSs) are generally used as a buffer stage for photovoltaic (PV) power generation to tolerate the output power unpredictability in DC microgrids, in which the State-of-Charge (SoC) balance is a necessary and urgent issue to be solved. To this end, an integral feedforward sliding mode controller (SMC) is adopted to replace the traditionally proportional integral (PI) controller such that the voltage response speed of the converter in each BESS can be significantly enhanced. Further, a novel adaptive droop control strategy for SoC balance with three different working modes is proposed, in which all batteries can be cooperated through three different stages corresponding to their different SoC degrees. Compared with most existing SoC balancing approaches, the proposed SoC strategy can improve the transient performance for the BESSs and their robustness against the volatility of PV output powers. The effectiveness of the proposed SoC balancing strategy is verified through a simulation in a DC microgrid network consisting of several PV generators, batteries, and loads utilizing Simulink/SimPower Systems. • The proposed adaptive droop control strategy can adjust all converters' switching frequencies initially as the reference voltage changes, which can improve the robustness of the BESSs against the unpredictable power fluctuations of PVs. • The proposed novel SoC balancing strategy is designed with three different operation modes, aiming to reducing/accelerating the charging/discharging speed as batteries are in overcharge/undercharge states. • Both the system transient performance and the battery operation safety can be significantly improved. [ABSTRACT FROM AUTHOR]

Copyright of Journal of Engineering (17264073) is the property of Republic of Iraq Ministry of Higher Education & Scientific Research (MOHESR) and its content may not be copied or emailed to multiple sites or posted to a listserv without the copyright holder's express written permission. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)

In the field-weakening region, the traditional field-weakening method for induction motor drives based on model predictive control (MPC) is to take a no-load operation as the premise and adjust the flux reference in the cost function proportional to the inverse of the rotor speed, which leads to poor torque output. This paper presents a novel field-weakening method for IM drives based on MPC. Considering the induction motor field-weakening limiting conditions and according to the speed adaptive field-weakening strategy with a voltage closed-loop, the speed adaptive field-weakening controllers were designed to optimize the references of the excitation current and torque current. In the rotor field-orientation d–q coordinate system, the stator flux amplitude and torque reference values were optimized by the optimal distribution current. Then, according to the dead-beat control principle, they were converted into an equivalent stator flux vector reference. Moreover, the stator voltage vector reference can be obtained. For an induction motor fed by a three-level neutral point clamped (3L-NPC) inverter, the cost function was constructed by combining all the constraints, including the voltage vector, the neutral potential balance, and the switching frequency. In this way, the high-performance field-weakening operation for the induction motor based on a model predictive control can be realized. The simulation and experiment results show that the proposed method can increase the torque output by 22% in the field-weakening region; at the same time, the steady characteristics and the dynamic response performance can be maintained well. [ABSTRACT FROM AUTHOR]

This paper proposes a concept of battery-assisted battery charger with maximum power point tracking for DC energy transducer such as thermoelectric generator and photo voltaic generator, and shows experimental results to prove the concept. The DC energy transducer is connected in series with a battery to increase the voltage. The plus terminal for the DC energy transducer is connected with the input terminal of a DC-DC buck converter, whereas the battery is connected with the output terminal of the converter. Thus, the current is boosted from the input to the output. When the net current to the battery is positive, the system works as a battery charger. To extract the as much power from the DC energy transducer as possible for high charging efficiency, maximum power point tracking is introduced. The converter was designed in 180 nm 3V CMOS with a silicon area of 1.05 mm2. The concept was experimentally proven by varying the reference voltages to control the input voltage. An all-solid-state battery was charged up from 2.2 V to 2.3 V in two hours by the converter with a flexible thermoelectric generator which had an open-circuit voltage of 0.6 V. [ABSTRACT FROM AUTHOR]

This article examines the impact of a power factor on the behavior of partial DC link voltages in three-phase three-level AC/DC (or DC/AC) converters operating without additional balancing hardware. We consider the case in which the controller utilizes a bandwidth-restricted (DC in steady state) zero-sequence component to achieve average partial DC link voltage equalization since the injection of high-order zero-sequence components is impossible or forbidden. An assessment of partial split DC-link capacitor voltage behavior (particularly that of ripple magnitudes and phases) is necessary for, e.g., minimizing the values of DC link capacitances and selecting reference voltage values. Previous studies assessed the abovementioned behavior analytically for operation under a unity power factor based on third-harmonic-dominated split partial voltages' ripple nature. However, it is shown here that deviation from the unity power factor introduces additional (to the third harmonic) non-negligible harmonic content, increasing partial voltage ripple magnitudes and shifting their phase (relative to the mains voltages). As a result, the third-harmonic-only assumption is no longer valid, and it is then nearly impossible to derive corresponding analytical expressions. Consequently, a numerical approach is used in this work to derive a generalized expression of normalized ripple energy as a function of the power factor, which can then easily be utilized for assessments of split DC link voltage behaviors for certain DC link capacitances and reference voltages. Simulations and experimental results validate the proposed methodology applied to a 10 kVA T-type converter prototype. [ABSTRACT FROM AUTHOR]

Aiming at the problems of complex equations, low accuracy, and the strict measurement point layout requirements of the existing electric field integration method, a non-contact measurement method based on the inversion voltage of the near electric field is proposed. Firstly, the field source relationship is clarified, the connection between the spatial electric field and the voltage is derived, and a near-end electric field inversion method is proposed. Secondly, a three-dimensional simulation model of an overhead line is established using COMSOL finite element software, the three-dimensional spatial potential distribution of the overhead line is obtained, and the voltage is inverted and calculated. Finally, an overhead line simulation test platform was built, and MEMS electric field sensors were used for testing and verification. The results show that the maximum error of the three-phase voltage inversion of the proximal electric field measurement is 6.8%, and the error between the voltage obtained by the experimental inversion measurement and the reference voltage is less than 7.2%. The simulation and experimental results also verify the accuracy and feasibility of the inversion voltage of the proximal electric field. The results of this paper can lay a foundation for the practical application of small and miniaturized electric field sensors, and help in the construction and development of smart grids. [ABSTRACT FROM AUTHOR]

Design and implementation of a Chaotic Artificial Bee Colony (ChABC) algorithm based Fractional Order Proportional Integral Derivative (FOPID) controller for Power Factor Correction (PFC) in Switched Mode Power Supply (SMPS) using DC-DC Zeta converter is proposed in this article. The dc-dc zeta converter has the advantages of high efficiency over a wide range of input and output voltages, an enormous power factor, low line current harmonics, and can convert voltages both up and down. Operating the converter in discontinuous conduction mode (DCM) achieves power factor correction and simplifies the control circuit. This article describes the design characteristics, operating principles, and controller design of the proposed converter. The design, analysis, modeling and advancement of the ChABC algorithm based FOPID controller in SMPS offers the better power quality and faster convergence of regulated output voltage. Simulation and experimental results are presented to verify power factor, % Total Harmonic Distortion (THD), output voltage regulation, stability, and robustness for various load, line, and reference voltages. [ABSTRACT FROM AUTHOR]