101. UWB Low-Voltage High-Linearity CMOS Mixer in Zero-IF Receiver
- Author
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Bin Shu, Rong-Xi Xuan, Huiyong Hu, Shuai Lei, Qiankun Liu, JianJun Song, and He-Ming Zhang
- Subjects
Materials science ,CMOS ,Intermediate frequency ,business.industry ,Electrical engineering ,Inverter ,Linearity ,Biasing ,Inductor ,business ,Low voltage ,Voltage - Abstract
This paper presents and designs a UWB, low voltage, high linearity, folded CMOS direct down-conversion mixer in zero-IF receiver. The proposed mixer uses inverter, self-biasing and constant Gm biasing circuit. Also, inductor in LC resonating network is used to get rid of the negative effect of parasitic capacitor in this paper. Consequently, all performances of the mixer are effectively improved. This design is based on 0.18μm CMOS technology of SMIC (Semiconductor Manufacturing International Corporation), the simulation results show the conversion gain of 7dB, the NF of 13.8dB (the IF frequency is 20MHz), the IIP3 of 13.4dBm. The circuit operates at the supply voltage of 1.8V and dissipates 11mW. The dynamic range of total receiver can be effectively improved because of high linearity of the mixer.
- Published
- 2011
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