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Impact of heavy-ion irradiation on the TaOx-based resistive random-access memory (RRAM) is investigated in this work. After Br ion irradiation, the set voltage of TaOx-based RRAM shows slight change, and negative shift of the forming voltage is observed. For the resistance change of TaOx-based RRAM devices induced by irradiation, the resistance of the low resistance state (LRS) illustrates acceptable change, while the resistance of the high resistance state (HRS) is quite sensitive to heavy ion irradation. Some irradiated devices even change from the HRS into the LRS, which results in disappeared memory window and may be attributed to the displacement damage in the dielectric layer. These results indicate that TaOx-based RRAM devices need to be carefully designed for future space applications. [ABSTRACT FROM PUBLISHER]

In this brief, the total ionizing dose (TID) effects of \gamma rays generated from a ^60\Co source on the \TaOx-based resistive switching memory (resistive random-access memory, RRAM) is investigated. The low-resistance state (LRS) of the RRAM is immune to TID effects, whereas the sensitivity of the high-resistance state (HRS) of RRAM to TID effects depends on the dimensions of the device, including the thickness of the oxide film and the area of the device. The HRS of the device with large area and thick oxide layer is vulnerable to TID effects and has a high probability to change into the LRS. Further investigation found that the lower the high resistance, the higher the failure rate of the RRAM device under TID impact, which indicates that the multilevel cell of RRAM should be carefully designed for space system applications considering the radiation effects. The failure of the HRS under TID is explained by defect generation in the oxide film. [ABSTRACT FROM PUBLISHER]

Abstract: In this paper, high-k LaAlO3 is proposed as tunnel dielectric for p-channel flash memory device application. The program/erase (P/E) injection current characteristic of p-channel flash memory cells with LaAlO3 tunnel dielectric is investigated compared to the cells with SiO2 tunnel dielectric by two-dimensional (2-D) device simulation, which shows that the bit line bias can be lowered from −5V to −3V during both P/E operations of flash memory cells with LaAlO3 tunnel dielectric, meanwhile retains the fast P/E speed and high injection efficiency. Our work also shows that drain disturb, one of the main issues for p-channel flash memory, is alleviated dramatically due to the lower P/E voltage. [Copyright &y& Elsevier]

Resistive random-access memory (RRAM) with the ability to store and process information has been considered to be one of the most promising emerging devices to emulate synaptic behavior and accelerate the computation of intelligent algorithms. However, variation and limited resistance levels impede RRAM as a synapse for weight storage in neural network mapping. In this work, we investigate a TaOx-based RRAM with Al ion local doping. Compared with a device without doping, the device with locally doped Al ion exhibits excellent uniformity and analog characteristics. The operating voltage and resistance states show tighter distributions. Over 150 adjustable resistance states can be achieved through tuning compliance current (CC) and reset stop voltage. Moreover, incremental resistance switching is available under optimized identical pulses. The improved uniformity and analog characteristics can be attributed to the collective effects of reduced oxygen vacancy (Vo) formation energy and weak conductive filaments induced by the local Al ion dopants. [ABSTRACT FROM AUTHOR]

The field of neuromorphic computing systems has been through enormous progress in recent years, whereas some issues are still remaining to be solved. One of the biggest challenges in neuromorphic circuit designing is the lack of a robust device with functions comparable to or even better than the metal-oxide-semiconductor field-effect transistor (MOSFET) used in traditional integrated circuits. In this work, we demonstrated a MoS 2 neuristor using a dual-gate transistor structure. An ionic top gate is designed to control the migration of ions, while an electronic back gate is used to control electronic migration. By applying different driving signals, the MoS 2 neuristor can be programmed as a neuron, a synapse, or an n-type MOSFET, which can be seen as a fundamental building block in the neuromorphic circuit design. The MoS 2 neuristor provides viable solutions for future reconfigurable neuromorphic systems and can be a promising candidate for future neuromorphic computing.

A resistive switching device with inherent nonlinear characteristics through a delicately engineered interfacial layer is an ideal component to be integrated into passive crossbar arrays for the suppression of sneaking current, especially in ultra-dense 3D integration. In this paper, we demonstrated a TaO x -based bipolar resistive switching device with a nearly symmetrical bi-directional nonlinear feature through interface engineering. This was accomplished by introducing an ultra-thin interfacial layer (SiO 2-x ) with unique features, including a large band gap and a certain level of negative heat of oxide formation between the top electrode (TiN) and resistive layer (TaO x ). The devices exhibit excellent nonlinear property under both positive and negative bias. Modulation of the inherent nonlinearity as well as the resistive switching mechanism are comprehensively studied by scrutinizing the results of the experimental control groups and the extensive characterizations including detailed compositional analysis, which suggests that the underlying mechanism of the nonlinear behavior is associatively governed by the serially connected metallic conductive filament and Flower-Nordheim tunneling barrier formed by the SiO 2-x interface layer. The proposed device in this work has great potential to be implemented in future massive storage memory applications of high-density selector-free crossbar structure.

Brain-inspired neuromorphic computing is expected to revolutionize the architecture of conventional digital computers and lead to a new generation of powerful computing paradigms, where memristors with analog resistive switching are considered to be potential solutions for synapses. Here we propose and demonstrate a novel approach to engineering the analog switching linearity in TaOx based memristors, that is, by homogenizing the filament growth/dissolution rate via the introduction of an ion diffusion limiting layer (DLL) at the TiN/TaOx interface. This has effectively mitigated the commonly observed two-regime conductance modulation behavior and led to more uniform filament growth (dissolution) dynamics with time, therefore significantly improving the conductance modulation linearity that is desirable in neuromorphic systems. In addition, the introduction of the DLL also served to reduce the power consumption of the memristor, and important synaptic learning rules in biological brains such as spike timing dependent plasticity were successfully implemented using these optimized devices. This study could provide general implications for continued optimizations of memristor performance for neuromorphic applications, by carefully tuning the dynamics involved in filament growth and dissolution.