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Your search keyword '"Xia, Yidong"' showing total 419 results
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419 results on '"Xia, Yidong"'

164. Synthesis of Easily Transferred 2D Layered BiI3Nanoplates for Flexible Visible-Light Photodetectors

Author

Wei, Qi, Chen, Jinhui, Ding, Ping, Shen, Bo, Yin, Jiang, Xu, Fei, Xia, Yidong, and Liu, Zhiguo

Abstract

Bismuth triiodide, BiI3, is one of the promising 2D layered materials from the family of metal halides. The unique electronic structure and properties make it an attractive material for the room-temperature gamma/X-ray detectors, high-efficiency photovoltaic absorbers, and Bi-based organic–inorganic hybrid perovskites. Other possibilities including optoelectronic devices and optical circuits are envisioned but rarely experimentally confirmed yet. Here, we report the synthesis of vertical 2D BiI3nanoplates using the physical vapor deposition mechanism. The obtained products were found easy to be separated and transferred to other substrates. Photodetectors employing such 2D nanoplates on polyethylene terephthalate substrate are demonstrated to be quite sensitive to red light (635 nm) with good responsivity (2.8 A W–1), fast stable photoresponse (3/9 ms for raise/decay times), and remarkable specific detectivity (1.2 × 1012jones), which attest to high comparability of the assembled components with many latest 2D nanostructured light sensors. In addition, such photodetectors exhibit outstanding mechanical stability and durability under different bending strains within the theoretically affordable levels, suggesting a variety of potential applications of 2D BiI3for flexible devices.

Published
2018
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176. The effect of the thickness of tunneling layer on the memory properties of high- k composite charge-trapping memory devices.

Author

Liu, Jinqiu, Lu, Jianxin, Yin, Jiang, Xu, Bo, Xia, Yidong, and Liu, Zhiguo

Subjects
QUANTUM tunneling, COMPUTER storage devices, THICKNESS measurement, METALLIC oxides, MAGNETRON sputtering
Abstract

The charge-trapping memory devices namely Pt/Al2O3/(Al2O(Cu2O)/SiO2/-Si with 2, 3 and 4 nm SiO2 tunneling layers were fabricated by using RF magnetron sputtering and atomic layer deposition techniques. At an applied voltage of ±11 V, the memory windows in the C- V curves of the memory devices with 2, 3 and 4 nm SiO2 tunneling layers were about 4.18, 9.91 and 11.33 V, respectively. The anomaly in memory properties among the three memory devices was ascribed to the different back tunneling probabilities of trapped electrons in the charge-trapping dielectric (Al2O(Cu2O) due to the different thicknesses of SiO2 tunneling layer. [ABSTRACT FROM AUTHOR]

Published
2016
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191. A TiAl2O5 nanocrystal charge trap memory device

Author

Zhou, Yue, primary, Yin, Jiang, additional, Xu, Hanni, additional, Xia, Yidong, additional, Liu, Zhiguo, additional, Li, Aidong, additional, Gong, Youpin, additional, Pu, Lin, additional, Yan, Feng, additional, and Shi, Yi, additional

Published
2010
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