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This paper presents a micro power light energy harvesting system for indoor environments. Light energy is collected by amorphous silicon photovoltaic (a-Si:H PV) cells, processed by a switched capacitor (SC) voltage doubler circuit with maximum power point tracking (MPPT), and finally stored in a large capacitor. The MPPT fractional open circuit voltage (V) technique is implemented by an asynchronous state machine (ASM) that creates and dynamically adjusts the clock frequency of the step-up SC circuit, matching the input impedance of the SC circuit to the maximum power point condition of the PV cells. The ASM has a separate local power supply to make it robust against load variations. In order to reduce the area occupied by the SC circuit, while maintaining an acceptable efficiency value, the SC circuit uses MOSFET capacitors with a charge sharing scheme for the bottom plate parasitic capacitors. The circuit occupies an area of 0.31 mm in a 130 nm CMOS technology. The system was designed in order to work under realistic indoor light intensities. Experimental results show that the proposed system, using PV cells with an area of 14 cm, is capable of starting-up from a 0 V condition, with an irradiance of only 0.32 W/m. After starting-up, the system requires an irradiance of only 0.18 W/m (18 μW/cm) to remain operating. The ASM circuit can operate correctly using a local power supply voltage of 453 mV, dissipating only 0.085 μW. These values are, to the best of the authors' knowledge, the lowest reported in the literature. The maximum efficiency of the SC converter is 70.3 % for an input power of 48 μW, which is comparable with reported values from circuits operating at similar power levels. [ABSTRACT FROM AUTHOR]

This paper presents a novel approach to accelerate program execution by mapping repetitive traces of executed instructions, called Megablocks, to a runtime reconfigurable array of functional units. An offline tool suite extracts Megablocks from microprocessor instruction traces and generates a Reconfigurable Processing Unit (RPU) tailored for the execution of those Megablocks. The system is able to transparently movebcomputations from the microprocessor to the RPU at runtime. A prototype implementation of the system using a cacheless MicroBlaze microprocessor running code located in external memory reaches speedups from 2.2\times to 18.2 \times for a set of 14 benchmark kernels. For a system setup which maximizes microprocessor performance by having the application code located in internal block RAMs, speedups from 1.4 \times to 2.8 \times were estimated. [ABSTRACT FROM PUBLISHER]

This paper describes the design and experimental evaluation of a multibit Sigma-Delta (\Sigma \Delta) modulator (\Sigma \Delta M) with enhanced dynamic range (DR) through the use of nonlinear digital-to-analog converters (DACs) in the feedback paths. This nonlinearity imposes a trade-off between DR and distortion, which is well suited to the intended hearing aid application. The modulator proposed here uses a fully-differential self-biased amplifier and a 4-bit quantizer based on fully dynamic comparators employing MOS parametric pre-amplification to improve both energy and area efficiencies. A test chip was fabricated in a 130 nm digital CMOS technology, which includes the proposed modulator with nonlinear DACs and a modulator with conventional linear DACs, for comparison purposes. The measured results show that the \Sigma \Delta M using nonlinear DACs achieves an enhancement of the DR around 8.4 dB (to 91.4 dB). Power dissipation and silicon area are about the same for the two cases. The performance achieved is comparable to that of the best reported multibit \Sigma \Delta ADCs, with the advantage of occupying less silicon area (7.5 times lower area when compared with the most energy efficient \Sigma \Delta M). [ABSTRACT FROM PUBLISHER]

Abstract-This paper describes a solution to the problem of bottom-following for autonomous underwater vehicles (AUVs) that relies on the evaluation of the terrain characteristics ahead of the vehicle using echo sounders. The methodology used poses the problem as a discrete time path following control problem where a conveniently defined error state space model of the plant is augmented with bathymetric (i.e., depth) preview data. A piecewise affine parameter-dependent model representation is adopted that describes the AUV linearized error dynamics for a predefined set of operating regions. For each region, a state feedback H2 control problem for affine parameter-dependent systems is posed and solved using linear matrix inequalities (LMIs). The resulting nonlinear controller is implemented as a gain-scheduled controller using the D-methodology. Simulation results obtained with a nonlinear dynamic model of the INFANTE AUV in the vertical plane are presented and discussed. [ABSTRACT FROM AUTHOR]