576 results on '"Sudeep Pasricha"'
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202. Guest Editors' Introduction: Emerging Networks-on-Chip Designs, Technologies, and Applications.
203. Characterization and Optimization of Coherent MZI-Based Nanophotonic Neural Networks Under Fabrication Non-Uniformity
204. AI for Cybersecurity in Distributed Automotive IoT Systems
205. Crosstalk Mitigation for High-Radix and Low-Diameter Photonic NoC Architectures.
206. 3-D WiRED: A Novel WIDE I/O DRAM With Energy-Efficient 3-D Bank Organization.
207. Soft and Hard Reliability-Aware Scheduling for Multicore Embedded Systems with Energy Harvesting.
208. 3D-ProWiz: An Energy-Efficient and Optically-Interfaced 3D DRAM Architecture with Reduced Data Access Overhead.
209. Run-Time Management for Multicore Embedded Systems With Energy Harvesting.
210. Makespan and Energy Robust Stochastic Static Resource Allocation of a Bag-of-Tasks to a Heterogeneous Computing System.
211. Power and Thermal-Aware Workload Allocation in Heterogeneous Data Centers.
212. Utility maximizing dynamic resource management in an oversubscribed energy-constrained heterogeneous computing system.
213. A middleware framework for application-aware and user-specific energy optimization in smart mobile devices.
214. Harvesting-aware energy management for multicore platforms with hybrid energy storage.
215. Reliability-aware and energy-efficient synthesis of NoC based MPSoCs.
216. A co-synthesis methodology for power delivery and data interconnection networks in 3D ICs.
217. VERVE: A framework for variation-aware energy efficient synthesis of NoC-based MPSoCs with voltage islands.
218. Thermal-aware semi-dynamic power management for multicore systems with energy harvesting.
219. Energy and Deadline Constrained Robust Stochastic Static Resource Allocation.
220. Thermal-Aware Performance Optimization in Power Constrained Heterogenous Data Centers.
221. The roce-bush router: a case for routing-centric dimensional decomposition for low-latency 3D noC routers.
222. A Power Delivery Network Aware Framework for Synthesis of 3D Networks-on-Chip with Multiple Voltage Islands.
223. A Framework for TSV Serialization-aware Synthesis of Application Specific 3D Networks-on-Chip.
224. A Particle Swarm Optimization approach for synthesizing application-specific hybrid photonic networks-on-chip.
225. Exploiting spatiotemporal and device contexts for energy-efficient mobile embedded systems.
226. VISION: a framework for voltage island aware synthesis of interconnection networks-on-chip.
227. AURA: An application and user interaction aware middleware framework for energy optimization in mobile devices.
228. Stochastically robust static resource allocation for energy minimization with a makespan constraint in a heterogeneous computing environment.
229. Energy-Constrained Dynamic Resource Allocation in a Heterogeneous Computing Environment.
230. OPAL: A multi-layer hybrid photonic NoC for 3D ICs.
231. NS-FTR: A fault tolerant routing scheme for networks on chip with permanent and runtime intermittent faults.
232. POSEIDON: A framework for application-specific Network-on-Chip synthesis for heterogeneous chip multiprocessors.
233. A low overhead fault tolerant routing scheme for 3D Networks-on-Chip.
234. Message from the HCW Program Committee Chair.
235. Introduction to HCW 2018.
236. Special session on overcoming reliability and energy-efficiency challenges with silicon photonics for future manycore computing.
237. OE+IOE: a novel turn model based fault tolerant routing scheme for networks-on-chip.
238. UC-PHOTON: A novel hybrid photonic network-on-chip for multiple use-case applications.
239. A Methodology for Power-aware Pipelining via High-Level Performance Model Evaluations.
240. Exploring hybrid photonic networks-on-chip foremerging chip multiprocessors.
241. Inter-kernel data reuse and pipelining on chip-multiprocessors for multimedia applications.
242. Exploring Carbon Nanotube Bundle Global Interconnects for Chip Multiprocessor Applications.
243. Dynamically reconfigurable on-chip communication architectures for multi use-case chip multiprocessor applications.
244. Exploring serial vertical interconnects for 3D ICs.
245. Silicon Nanophotonics for Future Multicore Architectures: Opportunities and Challenges.
246. METEOR: Hybrid photonic ring-mesh network-on-chip for multicore architectures.
247. Context-Aware Energy Enhancements for Smart Mobile Devices.
248. Guest Editorial: Special Issue on Low-Power Dependable Computing.
249. Improving performance and reducing energy-delay with adaptive resource resizing for out-of-order embedded processors.
250. Compiler driven data layout optimization for regular/irregular array access patterns.
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