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TITLE: MACINTOUCH Mac apps that ease the graphics-format babble As Mac formats standardize, special translators still are needed to interpret other computers' hieroglyphics. Ric Ford Products Swapping pix. As computer […]

The truth about 'true color' It's time to give the industry a swift kick in an appropriate body part on the subject of color and color monitors. I've been reading […]

Third-party products support MIDI Manager By Jamie Krutz Anaheim, Calif. -- While Apple had no booth at this month's National Association of Music Merchants show here, it did its best […]

Systems with digital signal processing (DSP) microprocessors can be enhanced to handle touchtone dialing and decoding to allow the use of a touchtone telephone as a data entry terminal. The specific DSP microprocessor used in such an application is the TMS32010. The algorithm used for tone generation initializes the processor. The decoder, which continually processes signal samples, can test decoder tapes of test tones. CAPTION: (Tone generation and tone decoding programs.)

This is Part II of a two-part series. Part I described how to build a simple system as a way of learning more about the operation of digital signal processing (DSP) chips in industrial-control applications. Part II describes the breadboard system that links these and other components. The initial breadboard system is laid out openly in an diagram, supported by descriptive text. The board that interfaces the host to the backplane of the breadboard system is explained and illustrated. A block diagram details the system's memory board, described in the text. A circuit diagram shows that the DSP board carries the 32010 muP and only a few other components. A 2-port RAM unites the 320 DSP chip and the host muP. The free space will be used in future experimentation by the author.

The duty cycle of a digital signal can be monitored with a circuit that displays the signal. The circuit can select either a 250 hertz to 2.5 kilohertz range with plus or minus one percent accuracy or a two kilohertz to fifty kilohertz range with plus or minus ten percent accuracy. A circuit diagram of the hardware monitor is included.

Part one of a two-part beginner's guide explains the use of simulators and test vectors. To determine logic array designs correctly, accurate input vectors are required to drive logic simulators. The simulator uses the net list of the logic array and the input vectors. The input vectors can be in waveform format or tabular format. The purpose of simulation vectors is to validate a logic function. Operating conditions can increase propagation delays. Propagation delays for data paths are produced by a timing verification simulation. A simulation at full speed under worst case operating conditions can determine if a part will perform as designed. A circuit diagram of an example circuit; diagrams of a waveform format, vector development, data lines, circuit delays, timing, and data bus contention and a table of the tabular format are included.

Some simple circuitry and a dual universal asynchronous receiver-transmitter (UART) can be used to design a network with local buffering. The network consists of a bus using a multidrop mode of operation with electrical signal conforming to RS422 and RS232C standards. The MC68681 dual UART has two independent UART sections capable of operating at 1M bytes per second. The hardware uses a serial interface with arbitration. The message protocol has a means of detecting collisions. It operates at 125,000 bps, but file transfer times will increase with the number of users. A circuit diagram of a serial interface, a block diagram of an UART, and diagrams of terminal configurations, network topology, and network control are included.

Digital signal processing within TV receivers has been in existence for about two years. This process ultimately leads to longer-term stability within the equipment as well as greater stability in the setup and alignment. Computer control of the sets is as extensive as the digital portions of the equipment. Completely digitized sets must also implement computer control, and which several chips are on the market to handle these functions. For instance, ITT Intermetall is marketing the Digit 2000 IC set that allows construction of a computer-controlled single- or multistandard TV reveiver that's easily manufactured and aligned. A block diagram of one such TV is included.

STC Components has released its DSP128 cascadable digital signal processor. Optimized for voice-band applications, the unit features a nomial 16- x 16-bit multiply-add instruction time of 320 nsec. The unit also incorporates a double-precision accumulator, a 16-bit logic unit, and two 256 x 16-bit RAMs. A photograph of the processor board is included. The unit is priced at sixty-six pounds sterling

Semiconductor suppliers will carry a variety of low-cost digital-signal-processing (DSP) devices in the next few years. These devices will enable the user to implement high-speed signal-processing applications at low cost. The advanced capbilities and high performance of these third-generation DSP chips will allow even less-experienced engineers to design them into their products. Possible future suppliers of single-chip DSPs are listed. The DSP industry is moving toward faster instruction cycles and future enhancement of on-chip DSP features. Continuation of the 'Harvard style' of DSP chips, with the pogram side separate from the data side, is expected. Photographs of various chips, a table of manufacturers, a diagrammatic model of the architecture of the DSP-128 from STC Components, and a chart presenting the horizontal lifeline of various chips indicating progress in the state-of-the-art are included. An inset describes present and future DSP devices.