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A new type of transistor is presented. It is realised by using a metalloprotein; namely, azurin. Thanks to their natural functional characteristics, which involve inter- and intramolecular electron transfer, metalloproteins are good candidates for biomolecular nanoelectronics. The implementation of a prototype of protein transistor operating in air and in the solid state based on self-organised films of azurins is reported. Experimental current–voltage characteristics are shown. The new device presents an ambipolar behaviour as the gate bias voltage is changed. Exploiting this peculiar characteristic, a fully integrated logic gate which can be a good starting point for a new class of nanoelectronics devices has been realised.

A fully balanced variable gain amplifier (VGA) in 0.13 /spl mu/m CMOS technology to be used in a multistandard receivers (WLAN, UMTS, GSM, and Bluetooth) is reported. The overall architecture where the VGA is embedded presents considerable different requirements (bandwidth, dc-gain, and common mode input voltage) for the four telecom standards to be processed. The VGA features 4 gain steps with a IIP3 better than 30dBm and an input-referred noise voltage lower than 5nV//spl radic/Hz at 0dB dc-gain.

An analog CMOS low-pass Active-Gm-RC biquadratic cell is presented. The cell combines the advantage of GM-C filters (no parasitic poles) with the advantages of Active-RC filter (large linear range). Two additional digital-based circuits allow to control the pole frequency and to reduce the effects of the non-dominant poles. A 4th order low-pass Butterworth filter with a 2.11 MHz cut-off frequency and a DC-gain of 32 dB for UMTS receiver has been designed in a 0.18 mu m CMOS technology with 1.8 V supply voltage. The filter exhibits a -93 dBV input-referred noise with a power consumption of 2.16 mW while the linearity performances corresponds to an in-band IIP3 of 4 dBm and an out-of-band IIP3 of 35 dBm. An Active Gm-RC band-pass cell is presented as possible alternative application

In this paper we present the design trade-offs for dimensioning the baseband blocks (DAC and reconstruction filter) of a direct conversion transmitter for the UMTS standard. A Matlab model performs a time domain analysis to evaluate the impact of each baseband block non-ideality on the overall transmitter performance. The proposed approach has been used to design a 0.13 mu m CMOS test-chip implementing the DAC + filter blocks.

A DAC+filter is realized in a 0.13/spl mu/m CMOS technology to operate in a multistandard (WLAN/UMTS) transmitter. The 0.8mm device allows programming the 8 bit DAC sampling frequency (100MHz/50MHz) and the 4th-order low-pass filter bandwidth (11 MHz/2.11MHz) to satisfy the 8 bit WLAN/9bit UMTS standards, consuming 11mW/8.4mW from a single 1.2V supply. For both standards the OIP3 is larger than 29dBm and the SFDR is 54dB for WLAN, 61dB for UMTS.

Was the Italian economic crisis of the seventeenth century an irreversible decline or a readjustment of the socio-economic structures? Did the prosperous Italian cities lose forever their economic role or were they able to adapt to the changing demands of the international markets? This article examines the main phases of the historiographical debate on these issues from its beginning in the 1950s to the most recent developments.

A low-power reconfigurable analog baseband block for UMTS/WLAN transmitters is presented. The low-power performance is guaranteed by the innovative architecture that allows to directly connect the output DAC current with the reconstruction analog filter. The DAC and the baseband filter, have been designed in a 0.13 mu m CMOS technology with a power supply limited to 1.2V The current consumption, has been optimized for the selected UMTS or WLAN standard and it equal to 7.9mA and 10mA, respectively

Molecules are attractive to develop nano-electronic devices. In this paper a new type of transistor is realized by using self-organized films of the Guanosine molecule, a modified DNA base. With its 40 nm channel length the transistor is a good starting point for a new class of nano-electronics devices. Experimental current-voltage characteristics are shown. A circuital model is also proposed.

In this work, a field effect transistor based on deoxyguanosine derivatives (a DNA basis) is demonstrated by means of systematic transport experiments. Our nanodevices were fabricated starting from a deoxyguanosine derivative (dG(C-10)(2)) layer interconnecting planar nano-electrodes, with separation in the 20-40nm range. The three terminal devices exhibit a maximum voltage gain of 0.76. Though the quick aging and the reproducibility of the devices have to be improved, the realization of a transistor-like device represents a starting point towards the development of planar solid-state bio-molecular electronic devices.

In traditional historiography, Milan, like other Italian cities, began to decline in the seventeenth century as its merchants were no longer able to compete with their English, Dutch, and French counterparts. Urban manufacturers virtually collapsed and only the countryside showed signs of vitality. The A. reconsiders this conventional picture of seventeenth-century Lombardy, highlighting new evidence that portrays Milan as surprisingly resilient, particularly because of its role as a commercial center and its power of attraction on the region's migratory flows. Certainly the plague of 1630 and the recurrence of military operations on Lombard soil until 1659 brought hardship and dislocation in their wake; nonetheless, as an industrial and trade center, Milan held its own, and, after the middle of the century, was able to supply capital, market networks, and skilled labor for recovering rural industries.

A low-power analog filter able to be reconfigured in order to be used in UMTS and WLAN applications is reported. The 4th order low-pass continuous-time filter is going to be included in the receiver path of a reconfigurable terminal. The filter is made up by the cascade of two Active-Gm-RC low-pass biquadratic cells. The unity-gain-bandwidth of the opamps embedded in the Active-Gm-RC cells is comparable to the filter cut-off frequency. Thus, the power consumption of the opamp can be strongly reduced. In addition, the filter can be programmed in order to process UMTS and WLAN signals, while a little area overhead is required since the filter can share capacitors as well as opamps in both operations modes. The cut-off frequency deviation due to the technological spread, aging and temperature variation is adjusted by using a tuning circuit.The full device in a 0.13 μm CMOS technology occupies a 2.8 mm2area. © 2005 Springer Science + Business Media, Inc.

The 4th generation of wireless systems needs low-power integrated transceivers that can be reconfigured in order to satisfy different standard requirements. Standard analog blocks are often not suitable for this step towards the future because of their lack of flexibility. We defined a novel approach to make Active-Gm-RC biquadratic cells completely reconfigurable. The biquad provides digitally programmable bandwidth and hence power consumption with a fully customizable cut-off frequencies range. Besides, the noise level can be conveniently modified leading to a further power saving. We exemplified the use of this basic building block in the design of a flexible low-pass filter for a zero-IF transceiver. A 2nd/4th /6th order Butterworth filter was implemented with a continuous cut-off frequency tuning between 330 KHz and 24.6 MHz and with a current consumption range between 0.6mA to 26mA. © 2006 IEEE.

In this paper an approach for the design of low-voltage analog Active-RC filers is presented. This technique is based on the use of different common mode levels at the opamp inputs and the filter inputs and outputs. A design example of a 600mV supply voltage 4th order low-pass analog filter for UMTS receivers is reported. The filter is designed in a 0.13μm CMOS technology with a 600mV supply voltage. The filter features a wide swing performance (THD=40dB@800mVpp,differential output signal amplitude), and high dynamic range (47 dB). © 2006 IEEE.

A baseband filter synthesizer that takes a behavioural description of the design and produces an efficient transistor level implementation is presented. The tool optimizes the filter at the cascade level, providing the best trade-off between power consumption and dynamic range, and at the cell level, selecting minimum power solutions, through accurate analytical models and an efficient biquad topology. Differently from past cascade design techniques based on dynamic range optimization through linear programming [ 2], we focus on power minimization while guaranteeing minimum performance levels, given the increasing importance of power savings in hand-held devices. A synthesized filter has been realized in silicon demonstrating the effectiveness of our approach.

A Butterworth 2 nd -order programmable filter for telecommunication applications is presented. In order to operate with signals in a programmable bandwidth, the block exhibits two cut-off frequencies (in the 2MHz-to-20MHz range). A programmable gain (in the -15dB-to-9dB range) is required in order to optimize the channel performances in terms of signal-to-noise ratio. Power reduction is achieved embedding the output stage in the filter and operating the filter with two supply-voltages for the input stage (1.5V) and for the output stage (3.3V). An input common-mode feedback circuit compensates the difference between the input and output commode mode voltages. The power consumption varies from 29mW to 38mW (when the filter dc gain is -15dB), because for dc gains lower than one the input CMFB circuit is needed and his contribution in terms of power consumption has to be considered. The filter is designed in a 0.13 mum CMOS technology, and performs a THD of -80dBc for a 3V pp,diff output signal with a load of 500Omega and 10pF in parallel. The maximum output referred noise is -142dBm for a 100Omega reference-load and a 9dB dc-gain