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We report scaled, graded-channel AlGaN/GaN HEMTs with an extrinsic fT and fMAX of 170 GHz and 363 GHz, which is the highest in emerging graded-channel GaN HEMTs. At 50-nm gate length, the fT*Lg of 8.5 GHz $\ast \mu \text{m}$ is comparable to that of conventional scaled AlGaN/GaN HEMTs fabricated together. At low DC power, the scaled graded-channel AlGaN/GaN HEMTs show a higher fMAX than the scaled AlGaN/GaN HEMT with the same gate length. The devices also exhibit a 2 dB improvement in gain at low DC bias, and the measured minimum noise figure was as low as 0.5 dB at 30 GHz. This is comparable to state-of-the-art device noise figure from a 20-nm gate length AlGaN/GaN HEMT. The combination of improved fT, fMAX, and minimum noise figure at low DC power for the graded-channel AlGaN/GaN HEMTs shows great promise for ultra-low-power, low-noise amplifiers.

The authors report on highly scaled 60 nm gate length graded-channel AlGaN/GaN high electron mobility transistors (HEMTs) with a record power added efficiency (PAE) of 75% at 2.1 W/mm power density at Vdd = 10 V and the PAE of 65% at 3.0 W/mm power density at 30 GHz at Vdd = 14 V. Under two-tone power measurement, the graded-channel AlGaN/GaN HEMTs demonstrated similar power performance with peak PAE >70% at 30 GHz. This novel channel design shows great promise for high-efficiency millimetre-wave (mmW) power amplifiers up to 3 W/mm RF power density operation.

We report high-speed graded-channel GaN HEMTs with 10 dB OIP3 improvement over current conventional AlGaN/GaN HEMTs at the same DC power. Thus, the graded-channel GaN HEMTs demonstrated a record OIP3/Pdc of 17 - 20 dB at 30 GHz. Also, these graded-channel GaN HEMTs demonstrated PAE of 75 % at 1.2 W/mm output power density. The measured PAE and output power density show great improvement over reported PAE of other mm-wave T-gated AlGaN/GaN HEMT devices.

To achieve the first demonstration of non-polar a-plane gallium nitride (GaN) epitaxy on (0 1 0) gallium oxide substrates by metal organic chemical vapor deposition (MOCVD), a low temperature AlGaN nucleation layer was engineered. Specific low temperature AlGaN growth parameters were necessary because the gallium oxide substrate begins to decompose at ∼600 °C in the ambient of H2. To achieve a smooth GaN epitaxial surface, low V/III molar ratio, and low pressure were required. To characterize the GaN film, AFM along with an orientation-dependent crystal tilt mosaic study by X-ray diffraction was performed. We effectively reduced threading dislocation density by applying in situ SiN interlayers grown by MOCVD. The oxygen contamination in the GaN film was found to originate from the substrate decomposition during GaN growth and can be reduced more than 10 times by using GaN buffer layer grown under N2 ambient.

We report the first demonstration of graded-channel GaN HEMTs operating in the millimeter-wave frequency range. At 30 GHz, these graded-channel GaN HEMTs demonstrated excellent PAE of 72% at associated power density of 2 W/mm. The measured PAE and output power density shows great improvement over other mm-wave T-gated AlGaN/GaN HEMT devices. Under two-tone linearity characterization at 30 GHz, PAE of about 50% was demonstrated with C/IM3 of 30 dBc, which is very promising for mm-wave linear and efficient amplifiers without digital pre-distortion.

We report the first demonstration of graded-channel GaN HEMTs operating in the millimeter-wave frequency range. At 30 GHz, these graded-channel GaN HEMTs demonstrated excellent PAE of 65% at an associated power density of 3 W/mm. The measured PAE and output power density show great improvement over other mm-wave T-gated AlGaN/GaN HEMT devices. Under two-tone linearity characterization at 30 GHz, PAE of about 50% was demonstrated with C/IM3 of 30 dBc, which is very promising for mm-wave linear and efficient amplifiers without digital pre-distortion.

RF communications with spectral efficiency utilizes complex modulation schemes that require amplifier linearity [1]. As amplifier operating frequency moves into the millimeter wave (mm-wave) range, the power added efficiency becomes also important to save the system prime power. As for 5G applications, high efficiency and linearity of amplifiers are required to support complex waveforms with high peak-to-average ratio (PAPR) and large instantaneous bandwidth. We report the first demonstration of graded-channel GaN HEMTs operating in the millimeter-wave frequency range. At 30 GHz, these graded-channel GaN HEMTs demonstrated excellent PAE of 65% at associated power density of 3 W/mm. The measured PAE and output power density shows great improvement over other mm-wave T-gated AlGaN/GaN HEMT devices. Under two-tone linearity characterization at 30 GHz, PAE of about 50% was demonstrated with C/IM3 of 30 dBc, which is very promising for mmwave linear and efficient amplifiers without digital pre-distortion. This material is based upon work supported by the DARPA under contract number FA8650-18-C-7802. The views expressed are those of the author and do not reflect the official policy or position of the DARPA or the U.S. Government. Any opinions, findings and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the U.S. Government.

This letter reports record RF performance of deeply scaled depletion-mode GaN-high-electron-mobility transistors (GaN-HEMTs). Based on double heterojunction AlN/GaN/AlGaN epitaxial structure, fully passivated devices were fabricated by self-aligned-gate technology featuring recessed $n^{+}$ -GaN ohmic contact regrown by molecular beam epitaxy. Record-high $f_{T}$ of 454 GHz and simultaneous $f_{{\rm {max}}}$ of 444 GHz were achieved on a 20-nm gate HEMT with 50-nm-wide gate-source and gate-drain separation. With an OFF-state breakdown voltage of 10 V, the Johnson figure of merit of this device reaches 4.5 THz-V, representing the state-of-the-art performance of GaN transistor technology to-date. Compared with previous E-mode GaN-HEMTs of similar device structure, significantly reduced extrinsic gate capacitance and enhanced average electron velocity are the key reasons for improved frequency characteristic.

In this paper, we report state-of-the-art high frequency performance of GaN-based high electron mobility transistors (HEMTs) and Schottky diodes achieved through innovative device scaling technologies such as vertically scaled enhancement and depletion mode (E/D mode) AlN/GaN/AlGaN double-heterojunction HEMT epitaxial structures, a low-resistance n+-GaN/2DEG ohmic contact regrown by MBE, a manufacturable 20-nm symmetric and asymmetric self-aligned-gate process, and a lateral metal/2DEG Schottky contact. As a result of proportional scaling of intrinsic and parasitic delays, an ultrahigh fT exceeding 450 GHz (with a simultaneous fmax of 440 GHz) and a fmax close to 600 GHz (with a simultaneous fT of 310 GHz) are obtained in deeply scaled GaN HEMTs while maintaining superior Johnson figure of merit. Because of their extremely low on-resistance and high gain at low drain voltages, the devices exhibited excellent noise performance at low power. 501-stage direct-coupled field-effect transistor logic ring oscillator circuits are successfully fabricated with high yield and high uniformity, demonstrating the feasibility of GaN-based E/D-mode integrated circuits with transistors. Furthermore, self-aligned GaN Schottky diodes with a lateral metal/2DEG Schottky contact and a 2DEG/ n+-GaN ohmic contact exhibited RC-limited cutoff frequencies of up to 2.0 THz.

We have achieved the monolithic integration of two Ill-nitride device structures through the use of etching and re growth by molecular beam epitaxy (MBE). Using this regrowth technique, we integrated enhancement-mode (E-mode) and depletion-mode (D-mode) AIN/GaN/AlGaN double-heterojunction field-effect transistors (DHFETs) on a single SiC substrate, wherein the E-mode devices had a 2-nm-thick AlN barrier layer and the D-mode devices had a 3.5-nm-thick AlN barrier layer. The direct-current and radio-frequency (RF) performance of the resulting DHFETs was equivalent to devices fabricated using our baseline process with a normal MBE growth. D-mode devices with a gate length of 150 nm had a threshold voltage Vth of -0.10 V, a peak transconductance gm value of 640 mS/mm, and current gain and power-gain cutoff frequencies fT and fmax of 82 and 210 GHz, respectively. E-mode devices on the same wafer with the same dimensions had a Vth value of +0.24 V, a peak gm value of 525 mS/mm, and fT and fmax values of 50 and 150 GHz, respectively. The application of this regrowth technique is not, in any way, limited to the integration of E- and D-mode devices, and this method greatly expands the design possibilities of RF and power switching circuits in the nitride material system.

Selective etching of gallium nitride (GaN) over aluminum gallium nitride (AlxGa1-xN) with inductively coupled plasma and reactive ion etching (RIE) was examined using only chlorine and oxygen gasses. Etch selectivity was heavily influenced by the amount of oxygen present during etching and was slightly influenced by RIE power. Surface roughness was also influenced heavily by the oxygen flow and RIE power which is important for local and across-wafer uniformity. Etch rates were intentionally minimized for use for highly controlled etching of very thin GaN and Al0.25Ga0.75N epitaxial layers. Maximum tested etch rates for GaN and Al0.25Ga0.75N were 200 and 15 A/min, respectively, and maximum selectivity between GaN and Al0.25Ga0.75N achieved was at least 68.5 to 1. Above a certain oxygen flow, the etch rate of both GaN and Al0.25Ga0.75N drop so drastically that it was impractical to obtain the etch rate and selectivity in a timely manner. Optimum selectivity was obtained with a low oxygen flow to inhibit Al0...

We present the fabrication and experimental characterization of wafer-level-packaged GaN power HEMTs incorporating embedded copper thermal heat spreader and microfabricated interconnects for GaN-based RF front-ends. The packaging fabrication technology mainly relies on silicon micromachining, metal electroplating, and thermocompression bonding. The presented packaging approach simultaneously addresses thermal management, electrical interconnects, performance, and has size and cost advantages over conventional assembly approaches. Silicon-packaged GaN-on-SiC power switches with slanted field plate technology demonstrated comparable DC IV characteristics with on-wafer measurements (threshold voltage = 0.3 V, static on-resistance = 2 Ω.mm measured at gate bias voltage of 1.5V, and drain and gate leakage current < 10−6 A/mm at gate bias voltage of −2 V). The performance results of Si-packaged GaN devices were consistent with on-wafer measurements, indicating compatibility of the packaging technology with GaN power HEMTs.

We report a novel GaN heterojunction field-effect transistor device that incorporates vertically scaled epilayers, a nanoscale gate with integrated staircase-shaped field plates, and regrown ohmic contacts. This device technology has an unprecedented combination of high breakdown (176 V), low ON-resistance (1.2 Ωmm), enhancement-mode operation (VTH=+0.35 V), and excellent high-frequency performance (fT/fmax=50/120 GHz), which enables new applications as a high-frequency power switch or a microwave power amplifier. The gate design manages the electric field at the drain edge of the gate, which mitigates dynamic ON-resistance degradation.

Direct-coupled field-effect transistor (FET) logic inverters and 501-stage ring oscillators (ROs) are fabricated using highly scaled GaN heterojunction FET with gate lengths of 20 and 40 nm. A 40-nm gate-length E/D inverter has logic-low and logic-high noise margins of 0.465 and 1.59 V, respectively, and a logic voltage swing of 2.38 V measured at Vdd = 2.5 V. The corresponding 40-nm 501-stage RO frequency and stage delay are 0.067 GHz and 15 ps, whereas the frequency and stage delay of a 20-nm RO are 0.133 GHz and 7.5 ps. The yield of the 20-nm 501-stage RO circuits is 52% across a 3-in diameter wafer. With 1006 transistors, the 501-stage ROs represent the highest level of transistor integration to date for a GaN circuit, whereas the stage delay is the shortest reported for a GaN digital circuit.

In this letter, we report the first experimental observation of electron velocity enhancement by aggressive lateral scaling of GaN HEMTs. Through reduction of the source-drain distance down to 170 nm using n+-GaN ohmic regrowth, 45-nm gate AlN/GaN/Al0.08Ga0.92N HEMTs exhibited an extremely small on resistance of 0.44 Ω·mm , a high maximum drain current density of 2.3 A/mm, a high peak extrinsic transconductance of 905 mS/mm, and a record fT/fmax of 260/394 GHz. Delay time analysis showed that the outstanding fT was mainly due to significantly reduced electron transit time at higher drain-source voltages resulting from suppressed drain delay and enhanced electron velocity in the laterally scaled GaN HEMTs.

This letter reports high-voltage GaN field-effect transistors fabricated on Si substrates. A halide-based plasma treatment was performed to enable normally off operation. Atomic layer deposition of Al2O3 gate insulator was adopted to reduce the gate leakage current. Incorporation of multiple field plates, with one field plate connected to the gate electrode and two field plates connected to the source electrode successfully enabled a high breakdown voltage of 1200 V and low dynamic on-resistance at high-voltage operation.

We report a new wafer-level, low-cost, scalable RF front-end packaging approach that enables heterogeneous integration of GaN integrated circuits (IC) with other ICs (Si, SiGe, InP, GaAs etc) and RF passives in a 3D package that includes RF/DC interconnects and thermal management. This is achieved by forming a composite substrate utilizing double-side polished alumina wafers with embedded electroformed heat spreaders and through substrate vias. We call this composite substrate Integrated Thermal Array Plate (ITAP). Compared to conventionally mounted GaN power amplifier (PA) using AuSn and silver epoxy the ITAP pckaged X-band PA demonstrated 1.42x and 2x improvement in output power respectively (36.4 dBm, with 57% associated power added efficiency). By using a junction temperature (T j ) evaluation circuit we demonstrated that the ITAP reduces the T j by 40° when the dissipated power is 2W/mm or increases the power handling by 1.45x when the T j is held at 150°C. Using the same approach we are also reporting wafer-level packaged GaN power switches as well as thermal cycling and thermal shock test data that show no performance degradation.

An enhancement-mode (E-mode) AlN/GaN/AlGaN double-heterojunction field-effect transistor (DHFET) with record high-frequency performance is reported. E-mode operation was achieved through vertical scaling of the AlN barrier layer. Parasitic resistances were reduced through ohmic contact recess etching followed by regrowth of n+ GaN by molecular-beam epitaxy and SiN deposition to increase the sheet charge density in the access regions of the device, resulting in an extremely low on-resistance of 1.06 Ω · mm. A DHFET with an 80-nm gate length had a threshold voltage of 0.21 V, an extrinsic transconductance (gm) of 0.70 S/mm, a current-gain cutoff frequency (fT) of 112 GHz, and a maximum oscillation frequency (fmax) of 215 GHz. To our knowledge, these are the highest gm , fT, and fmax values reported to date for an E-mode GaN HFET.

In this paper, we report state-of-the-art high-frequency performance of GaN-based HEMTs achieved through innovative device scaling technologies such as vertically-scaled AlN/GaN/AlGaN double-heterojunction (DH) HEMT epitaxial structure, low-resistance n+-GaN ohmic contacts regrown by MBE, and manufacturable 20-nm self-aligned sidewall gate process. Engineering top barrier layer structure enabled both enhancement- and depletion-mode (E/D) device operations with record cutoff frequencies while maintaining Johnson figure of merit (JFoM) breakdown performance. Furthermore, E/D-mode devices were monolithically integrated using a full epitaxial regrowth technique with a successful demonstration of DCFL ring oscillator circuits. Deeply-scaled E/D-mode GaN-HEMTs with an unprecedented combination of high-frequency and high-breakdown characteristics offer practical advantages in circuit applications such as sub-millimeter-wave power amplifiers, ultra-linear mixers, and increased output power digital-to-analog converters.

Two critical processes within the gate module of GaN-based MOS-HEMT with significant impact on device robustness and performance were identified and are presented in this paper. Specifically, data highlighting the impact of the number of cycles of the atomic layer etching of the AlGaN barrier to recess the gate region and the sequence of the gate dielectric anneal step on device performance are discussed. The optimization of these two critical steps enabled the implementation of a 50A/600V with an off-state leakage current of 455 μA at 600V and on-state resistance of 41mΩ at V GS =2.5V.

We report record DC and RF performance in deeply-scaled self-aligned gate (SAG) GaN-HEMTs operating in both depletion-mode (D-mode) and enhancement-mode (E-mode). Through aggressive lateral scaling of the gate length (L g ) and the source-drain distance (L sd ) using a novel self-aligned gate technology and engineering of a thin top barrier layer, 20-nm gate AlN/GaN/AlGaN double-heterojunction (DH) HEMTs operating in D-mode (and E-mode) exhibited record DC and RF characteristics with high yield and uniformity; R on = 0.29 (0.33) Ω·mm, I dmax = 2.7 (2.6) A/mm, a peak extrinsic g m = 1.04 (1.63) S/mm, threshold voltage uniformity σ (V th ) = 44 (63) mV over a 3-inch wafer area, and a simultaneous f T /f max = 310/364 (343/236) GHz. Delay time analysis clarified that an unique dependence of f T on V ds resulted from suppressed drain delay and enhanced electron velocity due to the lateral source-drain (S-D) scaling.

GaN-based HFETs offer a combination of high breakdown field, high current densities, and low on-resistance, making them well-suited for power-switching applications. Normally-off FETs are preferred in power switching applications for circuit simplicity and safety. Recently, a new type of normally-off GaN device has been reported: the hybrid metal-oxide-semiconductor (MOS)- or metal-insulator-semiconductor (MIS)-HFET, consisting of an MOS-type structure under the gate for normally-off operation and an HFET-like structure in the access regions for low on-resistance [1–6]. Optimization of the insulator-epi interface and insulator quality is critical for this type of device, since the electrons under gate electrode are in direct contact with the gate insulator. Previous reports of hybrid MOS-HFETs used SiO 2 or SiN gate dielectrics deposited by plasma-enhanced chemical vapor deposition (PECVD). However, alternative deposition methods such as atomic layer deposition (ALD) have been shown to result in superior thickness control, uniformity, conformality, and film quality, while ALD high-k gate dielectrics such as Al 2 O 3 have generated significant interest for GaN HFETs due to excellent GaN interface quality. In this work, we fabricated normally-off AlGaN/GaN hybrid MOS-HFETs on (111) Si substrates using gate recess etching combined with an ALD Al 2 O 3 gate dielectric for low gate leakage, low on-resistance, and high breakdown voltage. The gate fabrication process was optimized to reduce the trap density associated with the dielectric and eliminate threshold voltage hysteresis, which can result from slow traps in the dielectric or at the dielectric-epi interface [7]. A three-terminal breakdown voltage (V B ) of 1370V was measured at a gate bias of 0 V on a device with a 20 mm gate periphery and a low specific on-resistance (R on ) of 9.0 mΩ-cm2. The resulting V B 2/R on figure of merit of 208 MW/cm2 is among the highest values reported to-date for normally-off GaN-on-Si HFETs.

The high frequency performance of GaN-based HEMTs has been significantly improved through innovative device scaling technologies such as AlGaN [1] or InGaN back barriers [2], thin AlN top barriers [3], lattice-matched InAlN barriers [4], ultra-short gates [5], and self-aligned gates [6]. In this paper, we review our scaling technologies for ultra-high-speed operation of GaN-HEMTs [7–10], which provide not only high yield and uniformity but also a large-scale integration of E/D-mode HEMTs for future RF and mixed-signal applications.

We report record RF performance in 40nm-gate GaN-HEMT technology. Through vertical scaling in an AlN/GaN/AlGaN double heterojunction (DH) HEMT structure and reduction of access resistance using MBE re-growth of n+-GaN ohmic contacts, fully-passivated 40-nm devices exhibited excellent DC characteristics, such as an R on of 0.81Ω·mm, an I dmax of 1.61A/mm, a BV off of 42V, and a peak extrinsic g m of 723mS/mm, resulting in a peak f T of 220GHz and a peak f max of 400GHz. The measured f T and f max are the highest ever reported in a GaN-HEMT technology. Small signal model and delay time analysis showed that the parasitic charging time was only 10% of total delay time and the gate transit time scaled with the gate length (L g ) down to 40nm, demonstrating high scalability of the new technology.

GaN based HEMT device performance has been steadily improving, offering a combination of high electron velocity and high breakdown field. This makes them a prime candidate for high performance millimeter-wave solid-state power amplifiers (PAs). Further improving high frequency performance requires not only laterally scaling the gate length but also vertically scaling the barrier thickness. Scaling the device, however, must not come at the expense of increased access resistance. The GaN/AlN material system is suitable for vertical device scaling since it provides a high electron density in the channel while reducing the barrier thickness. However, due to AlN's large band gap, a low contact resistance between electrodes and the channel is difficult to achieve. In fact, a high on-resistance (R on ) of >2.0Ω·mm has been reported for GaN/AlN HEMTs using conventional alloyed ohmic contacts [1]

We report W-band GaN MMIC's that produce 96% more power at a frequency of 88 GHz in continuous wave (CW) operation than the highest power reported in this frequency band for the best competing solid state technology[1], the InP HEMT. W-band power module containing a single three stage GaN MMIC chip with 600 µm wide output stage produced over 842 mW of output power in CW-mode, with associated PAE of 14.7% and associated power gain of 9.3 dB. This performance was measured at MMIC drain bias of 14 V.

GaN-based HEMTs offer a unique combination of high electron velocity and high breakdown field making them t he prime candidate for the highest performance millimeter-wave solid-state power am plifiers (PAs). Recently, we have demonstrated GaN MMIC PAs with an output power of 500 mW at W-band frequency range [1]. The device high frequency performance has been significantly im proved during the past y ears through vertical epitaxial scaling with double-hetero (DH) HEMT structures using an AlGaN back barrier [2] and reduction of gate length (L g ) down to 30 nm [3]. One of technical challenges for further device scaling is reduction of parasitic resistances. Various approaches including alloyed contact to an n+-GaN cap layer, ion implantation, and a multi-channel structure were attempted. However, a resulting on- resistance (R on ) is typically larger than 1.6 Ω·mm.

A multilayer, low-parasitic interconnection scheme for highly scaled GaN high electron mobility transistors is reported. The fabrication process offers three Au interconnects embedded in benzocyclobutene (BCB) dielectric, with an integrated air-box in the active area in order to minimise the gate parasitic capacitances. With the addition of the air-box, it is demonstrated that the performance of the BCB encapsulated device is similar to that of a non-encapsulated device. Furthermore, by utilising the multilayer interconnection scheme a low-loss (0.75 dB) 3 dB tandem coupler operating from 140 to 220 GHz is demonstrated.

c-plane GaN films were grown by ammonia molecular beam epitaxy on metal-organic chemical vapor deposition templates for a wide range of NH3:Ga flux ratios and growth temperatures, and the resulting films were characterized using atomic force microscopy, reflection high-energy electron diffraction, and transmission electron microscopy. Three distinct nitrogen-rich growth regimes—unstable layer-by-layer, quasi-stable step flow, and dislocation-mediated pitting—were identified based on the growth mode and film properties. In addition, step flow growth was observed under conditions of gallium droplet accumulation. The results indicate the existence of two regimes for step-flow growth of GaN by ammonia MBE—both gallium-rich and nitrogen-rich. Growth mode instabilities and mound formation were observed and are discussed in the context of a step-edge energy barrier to adatom diffusion over a terrace.

The incorporation of deep level defects in n-type GaN grown by ammonia-based molecular beam epitaxy (MBE) is studied via systematic adjustment of the NH3/Ga flux ratio. Deep level optical and transient spectroscopies, which together enable deep level detection throughout the GaN bandgap, reveal defect states whose individual concentrations vary with the NH3/Ga flux ratio. A general trend of lower concentration for deep levels at EC−3.28, EC−1.28, EC−0.62, and EC−0.25 eV with higher NH3/Ga flux ratio was observed, with the strongest reduction at the EC−0.25 eV level, consistent with expectations for a VN-related defect. The known CN impurity state at EC−3.28 eV and suspected CI-related state at EC−1.28 eV also showed a moderate decrease in concentration at the higher NH3/Ga flux ratio. In contrast, the VGa-related defect at EC−2.62 eV was insensitive to the NH3/Ga flux ratio over the range studied here. Taken together, ammonia-MBE GaN has deep level defects with different sensitivities in flux ratios suggestive of independent physical sources. However, the total trap concentrations were significantly reduced for higher NH3/Ga flux ratios in n-type GaN grown by ammonia-MBE under the range of growth conditions used in this study, suggesting that higher NH3/Ga flux ratios will generate higher electronic quality GaN material when using ammonia-based MBE for device applications.

The impact of growth conditions on the surface morphology and structural properties of ammonia molecular beam epitaxy GaN buffers layers on SiC substrates was investigated. The threading dislocation (TD) density was found to decrease with decreasing NH3:Ga flux ratio, which corresponded to an increase in surface roughness and reduction in residual compressive lattice mismatch stress. Furthermore, the dislocation density and compressive stress decreased for increasing buffer thickness. TD inclination was proposed to account for these observations. Optimized surface morphologies were realized at high NH3:Ga flux ratios and were characterized by monolayer-high steps, spiral hillocks, and pyramidal mounds, with rms roughness of ∼1.0 nm over 2×2 μm2 atomic force microscopy images. Smooth surface morphologies were realized over a large range of growth temperatures and fluxes, and growth rates of up to 1 μm/h were achieved. TD densities in the buffers as low as 3×109 cm−2 were demonstrated. These buffers were hi...

Deep level defects in p-type GaN:Mg grown by molecular beam epitaxy were characterized using steady-state photocapacitance and deep level optical spectroscopy (DLOS). Low frequency capacitance measurements were used to alleviate dispersion effects stemming from the deep Mg acceptor. Use of DLOS enabled a quantitative survey of both deep acceptor and deep donor levels, the latter being particularly important due to the limited understanding of minority carrier states for p-type GaN. Simultaneous electron and hole photoemissions resulted in a convoluted deep level spectrum that was decoupled by emphasizing either majority or minority carrier optical emission through control of the thermal filling time conditions. In this manner, DLOS was able to resolve and quantify the properties of deep levels residing near both the conduction and valence bandedges in the same sample. Bandgap states through hole photoemission were observed at Ev+3.05eV, Ev+3.22eV and Ev+3.26eV. Additionally, DLOS revealed levels at Ec−3.2...