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347 results on '"Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC)"'

1. A DSEL for high throughput and low latency software‐defined radio on multicore CPUs

Author

Cassagne, Adrien, Tajan, Romain, Aumage, Olivier, Leroux, Camille, Barthou, Denis, Jégo, Christophe, Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Laboratoire de l'intégration, du matériau au système (IMS), Université Sciences et Technologies - Bordeaux 1 (UB)-Institut Polytechnique de Bordeaux-Centre National de la Recherche Scientifique (CNRS), STatic Optimizations, Runtime Methods (STORM), Laboratoire Bordelais de Recherche en Informatique (LaBRI), Université de Bordeaux (UB)-École Nationale Supérieure d'Électronique, Informatique et Radiocommunications de Bordeaux (ENSEIRB)-Centre National de la Recherche Scientifique (CNRS)-Université de Bordeaux (UB)-École Nationale Supérieure d'Électronique, Informatique et Radiocommunications de Bordeaux (ENSEIRB)-Centre National de la Recherche Scientifique (CNRS)-Inria Bordeaux - Sud-Ouest, and Institut National de Recherche en Informatique et en Automatique (Inria)-Institut National de Recherche en Informatique et en Automatique (Inria)

Subjects
[INFO.INFO-PL]Computer Science [cs]/Programming Languages [cs.PL], Real-time system, Pipeline, DVB-S2 transceiver, Multicore CPUs, [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], SDR, DSEL
Abstract

International audience; This article presents a new Domain Specific Embedded Language (DSEL) dedicated to Software-Defined Radio (SDR). From a set of carefully designed components, it enables to build efficient software digital communication systems, able to take advantage of the parallelism of modern processor architectures, in a straightforward and safe manner for the programmer. In particular, proposed DSEL enables the combination of pipelining and sequence duplication techniques to extract both temporal and spatial parallelism from digital communication systems. We leverage the DSEL capabilities on a real use case: a fully digital transceiver for the widely used DVB-S2 standard designed entirely in software. Through evaluation, we show how proposed software DVB-S2 transceiver is able to get the most from modern, high-end multicore CPU targets.

Published
2023

2. Exploiting Large Memory using 32-bit Energy-Efficient Manycore Architectures

Author

Franck Wajsburt, Pierre-Yves Péneau, Alain Greiner, Quentin L. Meunier, Mohamed Lamine Karaoui, Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), Laboratoire d'Informatique de Paris 6 (LIP6), Université Pierre et Marie Curie - Paris 6 (UPMC)-Centre National de la Recherche Scientifique (CNRS)-Université Pierre et Marie Curie - Paris 6 (UPMC)-Centre National de la Recherche Scientifique (CNRS), Conception et Test de Systèmes MICroélectroniques (SysMIC), Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier (LIRMM), Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM)-Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM), ANR-13-INSE-0002,TSUNAMY,Gestion logicielle et matérielle de la sécurité des données pour des plateformes manycore(2013), European Project: SHARP, Architecture et Logiciels pour Systèmes Embarqués sur Puce ( ALSOC ), Laboratoire d'Informatique de Paris 6 ( LIP6 ), Université Pierre et Marie Curie - Paris 6 ( UPMC ) -Centre National de la Recherche Scientifique ( CNRS ) -Université Pierre et Marie Curie - Paris 6 ( UPMC ) -Centre National de la Recherche Scientifique ( CNRS ), Conception et Test de Systèmes MICroélectroniques ( SysMIC ), Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier ( LIRMM ), Université de Montpellier ( UM ) -Centre National de la Recherche Scientifique ( CNRS ) -Université de Montpellier ( UM ) -Centre National de la Recherche Scientifique ( CNRS ), IEEE Computer Society, ANR-13-INSE-0002,TSUNAMY,Gestion logicielle et matérielle de la sécurité des données pour des plateformes manycore ( 2013 ), European Project : SHARP, and Université de Montpellier (UM)-Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM)-Centre National de la Recherche Scientifique (CNRS)

Subjects
010302 applied physics, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], 020203 distributed computing, Computer science, 02 engineering and technology, Kernel virtual address space, 32-bit, 01 natural sciences, Physical address, Computer architecture, 0103 physical sciences, Virtual memory, Scalability, [ INFO.INFO-OS ] Computer Science [cs]/Operating Systems [cs.OS], 0202 electrical engineering, electronic engineering, information engineering, User space, [ INFO.INFO-AR ] Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-OS]Computer Science [cs]/Operating Systems [cs.OS], Performance per watt, Memory protection
Abstract

International audience; Recent advances in processor manufacturing has led to integrating tens of cores in a single chip and promise to integrate many more with the so-called manycore architectures. Manycore architectures usually integrate many small power efficient cores, which can be 32-bit cores in order to maximize the performance per Watt ratio. Providing large physical memory (e.g. 1 TB) to such architectures thus requires extending the physical address space (e.g. to 40 bits). This extended physical space has early been identified as a problem for 32-bit operating systems as they can normally support at maximum 4 GB of physical space, and up to 64 GB with memory extension techniques. This paper presents a scalable solution which efficiently manages large physical memory. The proposed solution decomposes the kernel into multiple units, each running in its own space, without the virtual memory mechanism (directly in physical mode). User applications, however, continue to run in the virtual mode. This solution allows the kernel to manage a large physical memory, while allowing user space applications to access nearly 4 GB of virtual space. It has been successfully implemented in ALMOS, a UNIX-like operating system, running on the TSAR manycore architecture, which is a 32-bit virtual 40-bit physical manycore architecture. Moreover, the first results show that this approach improves both the scalability and the performance of the system.

Published
2016

3. MAFIA: Protecting the microarchitecture of embedded systems against fault injection attacks

Author

Thomas Chamelot, Damien Couroussé, Karine Heydemann, Laboratoire Fonctions Innovantes pour circuits Mixtes (LFIM), Université Grenoble Alpes (UGA)-Département Systèmes et Circuits Intégrés Numériques (DSCIN), Laboratoire d'Intégration des Systèmes et des Technologies (LIST (CEA)), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Laboratoire d'Intégration des Systèmes et des Technologies (LIST (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), and ANR-18-CE39-0003,COFFI,Intégrité du flot d'exécution: du logiciel à la micro-architecture(2018)

Subjects
Pipelines, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], counter-measures, Circuit faults, control logic, control-signal integrity, Computer Graphics and Computer-Aided Design, Codes, [INFO.INFO-CR]Computer Science [cs]/Cryptography and Security [cs.CR], Hardware, control-flow integrity, code integrity, code authenticity, Security, fault injection attacks, Process control, Electrical and Electronic Engineering, Microarchitecture, Software
Abstract

International audience; Fault injection attacks represent an effective threatto embedded systems. Recently, Laurent et al. have reported thatfault injection attacks can leverage faults inside the microarchi-tecture. However, state-of-the-art counter-measures, hardware-only or with hardware support, do not consider the integrityof microarchitecture control signals that are the target of thesefaults.We present MAFIA, a microarchitecture protection againstfault injection attacks. MAFIA ensures integrity of pipelinecontrol signals through a signature-based mechanism, and en-sures fine-grained control-flow integrity with a complete indirectbranch support and code authenticity. We analyse the securityproperties of two different implementations with different secu-rity/overhead trade-offs: one with a CBC-MAC/Prince signaturefunction, and another one with a CRC32. We present ourimplementation of MAFIA in a RISC-V processor, supportedby a dedicated compiler toolchain based on LLVM/Clang. Wereport a hardware area overhead of 23.8 % and 6.5 % for theCBC-MAC/Prince and CRC32 respectively. The average code sizeand execution time overheads are 29.4 % and 18.4 % respectivelyfor the CRC32 implementation and are 50 % and 39 % for theCBC-MAC/Prince.

Published
2023

4. Optimisation d'un système d'autopartage avec contraintes de relocalisation de véhicules

Author

Carlier, Aurélien, Munier-Kordon, Alix, Klaudel, Witold, IRT SystemX (IRT SystemX), Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), Laboratoire d'Informatique de Paris 6 (LIP6), Université Pierre et Marie Curie - Paris 6 (UPMC)-Centre National de la Recherche Scientifique (CNRS)-Université Pierre et Marie Curie - Paris 6 (UPMC)-Centre National de la Recherche Scientifique (CNRS), RENAULT, IRT SystemX ( IRT SystemX ), Architecture et Logiciels pour Systèmes Embarqués sur Puce ( ALSOC ), Laboratoire d'Informatique de Paris 6 ( LIP6 ), Université Pierre et Marie Curie - Paris 6 ( UPMC ) -Centre National de la Recherche Scientifique ( CNRS ) -Université Pierre et Marie Curie - Paris 6 ( UPMC ) -Centre National de la Recherche Scientifique ( CNRS ), and IRT SystemX

Subjects
programmation linéaire multi-objectifs, autopartage, optimisation des transports, [INFO.INFO-RO]Computer Science [cs]/Operations Research [cs.RO], ComputingMilieux_MISCELLANEOUS, [ INFO.INFO-RO ] Computer Science [cs]/Operations Research [cs.RO]
Abstract

International audience

Published
2015

5. A 2022 τ-Herculid meteor cluster from an airborne experiment: automated detection, characterization, and consequences for meteoroids

Author

Vaubaillon, J., Loir, C., Ciocan, C., Kandeepan, M., Millet, M., Cassagne, A., Lacassagne, L., Da Fonseca, P., Zander, F., Buttsworth, D., Loehle, S., Toth, J., Gray, S., Moingeon, A., Rambaux, N., Institut de Mécanique Céleste et de Calcul des Ephémérides (IMCCE), Institut national des sciences de l'Univers (INSU - CNRS)-Observatoire de Paris, Université Paris sciences et lettres (PSL)-Université Paris sciences et lettres (PSL)-Université de Lille-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Laboratoire Epitech de Recherche en Informatique Appliquée (LERIA Epitech), Epitech Technology, University of Southern Queensland (USQ), Institut für Raumfahrtsysteme (IRS), Universität Stuttgart [Stuttgart], Comenius University in Bratislava, and Rocket Technologies International

Subjects
Earth and Planetary Astrophysics (astro-ph.EP), Comets: general, Space and Planetary Science, [PHYS.ASTR.EP]Physics [physics]/Astrophysics [astro-ph]/Earth and Planetary Astrophysics [astro-ph.EP], FOS: Physical sciences, method: data analysis, [INFO.INFO-CV]Computer Science [cs]/Computer Vision and Pattern Recognition [cs.CV], Astronomy and Astrophysics, [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, meteoroids, Astrophysics - Earth and Planetary Astrophysics
Abstract

Context. The existence of meteor clusters has long since been a subject of speculation and so far only seven events have been reported, among which two involve less than five meteors, and three were seen during the Leonid storms. Aims. The 1995 outburst of Comet 73P/Schwassmann-Wachmann was predicted to result in a meteor shower in May 2022. We detected the shower, proved this to be the result of this outburst, and detected another meteor cluster during the same observation mission. Methods. The {\tau}-Herculids meteor shower outburst on 31 May 2022 was continuously monitored for 4 hours during an airborne campaign. The video data were analyzed using a recently developed computer-vision processing chain for meteor real-time detection. Results. We report and characterize the detection of a meteor cluster involving 38 fragments, detected at 06:48 UT for a total duration of 11.3 s. The derived cumulative size frequency distribution index is relatively shallow: s = 3.1. Our open-source computer-vision processing chain (named FMDT) detects 100% of the meteors that a human eye is able to detect in the video. Classical automated motion detection assuming a static camera was not suitable for the stabilized camera setup because of residual motion. Conclusions. From all reported meteor clusters, we crudely estimate their occurrence to be less than one per million observed meteors. Low heliocentric distance enhances the probability of such meteoroid self-disruption in the interplanetary space., Comment: 6 pqges, 5 figures

Published
2023

6. Scheduling coupled tasks with time windows: a parameterized complexity analysis

Author

Mallem, Maher, Hanen, Claire, Munier-Kordon, Alix, Recherche Opérationnelle (RO), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Université Paris Nanterre - Département de Mathématiques et Informatique, Université Paris Nanterre (UPN), and Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC)

Subjects
[INFO.INFO-CC]Computer Science [cs]/Computational Complexity [cs.CC], [INFO.INFO-RO]Computer Science [cs]/Operations Research [cs.RO]
Published
2022

7. A 2022 τ-Herculids meteor cluster

Author

Vaubaillon, Jeremie, Loir, Charlotte, Millet, Maxime, Ciocan, Clara, Kandeepan, Mathuran, Cassagne, Adrien, Lacassagne, Lionel, da Fonseca, Pedro, Zander, Fabian, Buttsworth, David, Loehle, Stefan, Tóth, Juraj, Gray-Owen, Scott, Moingeon, Audrey, Rambaux, Nicolas, Institut de Mécanique Céleste et de Calcul des Ephémérides (IMCCE), Institut national des sciences de l'Univers (INSU - CNRS)-Observatoire de Paris, Université Paris sciences et lettres (PSL)-Université Paris sciences et lettres (PSL)-Université de Lille-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Laboratoire Epitech de Recherche en Informatique Appliquée (LERIA Epitech), Epitech Technology, University of Southern Queensland (USQ), Institut für Raumfahrtsysteme (IRS), Universität Stuttgart [Stuttgart], Department of Biochemistry, Faculty of Natural Sciences, Comenius University in Bratislava, Comenius University in Bratislava, Department of Molecular Genetics [Toronto], University of Toronto, Auteur indépendant, Research Centre for Astronomy and Earth Sciences (CSFK), and Konkoly Thege Astronomical Institut

Subjects
[INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-AO]Computer Science [cs]/Computer Arithmetic, [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS], Meteor tracking, [INFO.INFO-CV]Computer Science [cs]/Computer Vision and Pattern Recognition [cs.CV], Meteor shower, [INFO.INFO-SE]Computer Science [cs]/Software Engineering [cs.SE], [INFO.INFO-DM]Computer Science [cs]/Discrete Mathematics [cs.DM], Realtime image processing, [SPI.AUTO]Engineering Sciences [physics]/Automatic, [INFO.INFO-TS]Computer Science [cs]/Signal and Image Processing, [INFO.INFO-TI]Computer Science [cs]/Image Processing [eess.IV], [INFO.INFO-RB]Computer Science [cs]/Robotics [cs.RO], Computer vision, [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], [SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processing
Abstract

International audience; Airborne observation (see J. Toth’s talk)Mobile cameras from the MoMet device (see Da Fonseca’s talk, IMC2021)2 stabilized cameras + RBpi + RMS software2 unstabilized cameras + continuous recording on MacBasler acA1920-155um + 6mm f/1.4 or 12mm f/1.6 lens ; 20 fps

Published
2022

8. Exploration of fault effects on formal RISC-V microarchitecture models

Author

Simon Tollec, Mihail Asavoae, Damien Courousse, Karine Heydemann, Mathieu Jan, Laboratoire Environnement de Conception & Architecture (LECA), Université Paris-Saclay-Département Systèmes et Circuits Intégrés Numériques (DSCIN), Laboratoire d'Intégration des Systèmes et des Technologies (LIST (CEA)), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Laboratoire d'Intégration des Systèmes et des Technologies (LIST (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Département Systèmes et Circuits Intégrés Numériques (DSCIN), Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, and Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)

Subjects
[INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-CR]Computer Science [cs]/Cryptography and Security [cs.CR], Secure Embedded Systems, [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, Microarchitecture, Formal Verification, Fault Attack
Abstract

International audience; This paper introduces a formal workflow for modeling software/hardware systems in order to explore the effects of fault injections and evaluate the robustness to fault injection attacks. We illustrate this workflow on four versions of a PIN authentication code, embedding different software countermeasures. The code is symbolically evaluated on two implementations of the RISC-V CV32E40P core: the original implementation from the OpenHW group and an implementation that integrates protection of the pipeline control signals. On the original, unprotected core, our formal workflow exposes various vulnerabilities, including previously unknown ones, whereas, on the protected core, it confirms the effectiveness of the proposed countermeasures.

Published
2022

9. Un formalisme commun aux attaques par canaux auxiliaires et par injection de fautes

Author

Le Bouder, Hélène, Moro, Nicolas, Robisson, Bruno, Encrenaz, Emmanuelle, Tria, Assia, Département Systèmes et Architectures Sécurisés ( SAS-ENSMSE ), École des Mines de Saint-Étienne ( Mines Saint-Étienne MSE ), Institut Mines-Télécom [Paris]-Institut Mines-Télécom [Paris]-CMP-GC, Laboratoire d'Electronique et des Technologies de l'Information ( CEA-LETI ), Commissariat à l'énergie atomique et aux énergies alternatives ( CEA ) -Université Grenoble Alpes [Saint Martin d'Hères], Architecture et Logiciels pour Systèmes Embarqués sur Puce ( ALSOC ), Laboratoire d'Informatique de Paris 6 ( LIP6 ), Université Pierre et Marie Curie - Paris 6 ( UPMC ) -Centre National de la Recherche Scientifique ( CNRS ) -Université Pierre et Marie Curie - Paris 6 ( UPMC ) -Centre National de la Recherche Scientifique ( CNRS ), Le Bouder, Hélène, Département Systèmes et Architectures Sécurisés (SAS-ENSMSE), École des Mines de Saint-Étienne (Mines Saint-Étienne MSE), Institut Mines-Télécom [Paris] (IMT)-Institut Mines-Télécom [Paris] (IMT)-CMP-GC, Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), Laboratoire d'Informatique de Paris 6 (LIP6), and Université Pierre et Marie Curie - Paris 6 (UPMC)-Centre National de la Recherche Scientifique (CNRS)-Université Pierre et Marie Curie - Paris 6 (UPMC)-Centre National de la Recherche Scientifique (CNRS)

Subjects
[INFO.INFO-CR]Computer Science [cs]/Cryptography and Security [cs.CR], attaques physiques, [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, [ INFO.INFO-CR ] Computer Science [cs]/Cryptography and Security [cs.CR], [ SPI.NANO ] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, formalisme, ComputingMilieux_MISCELLANEOUS, poster, [INFO.INFO-CR] Computer Science [cs]/Cryptography and Security [cs.CR]
Abstract

National audience

Published
2012

10. A DSEL for High Throughput and Low Latency Software-Defined Radio on Multicore CPUs

Author

Cassagne, Adrien, Tajan, Romain, Aumage, Olivier, Leroux, Camille, Barthou, Denis, Jégo, Christophe, Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Laboratoire de l'intégration, du matériau au système (IMS), Université Sciences et Technologies - Bordeaux 1 (UB)-Institut Polytechnique de Bordeaux-Centre National de la Recherche Scientifique (CNRS), Institut Polytechnique de Bordeaux (Bordeaux INP), STatic Optimizations, Runtime Methods (STORM), Laboratoire Bordelais de Recherche en Informatique (LaBRI), Université de Bordeaux (UB)-École Nationale Supérieure d'Électronique, Informatique et Radiocommunications de Bordeaux (ENSEIRB)-Centre National de la Recherche Scientifique (CNRS)-Université de Bordeaux (UB)-École Nationale Supérieure d'Électronique, Informatique et Radiocommunications de Bordeaux (ENSEIRB)-Centre National de la Recherche Scientifique (CNRS)-Inria Bordeaux - Sud-Ouest, and Institut National de Recherche en Informatique et en Automatique (Inria)-Institut National de Recherche en Informatique et en Automatique (Inria)

Subjects
Signal Processing (eess.SP), FOS: Computer and information sciences, Computer Science - Computation and Language, DVB-S2 transceiver, Multicore CPUs, DSEL, [INFO.INFO-CL]Computer Science [cs]/Computation and Language [cs.CL], Computer Science - Distributed, Parallel, and Cluster Computing, [INFO.INFO-TS]Computer Science [cs]/Signal and Image Processing, Pipeline, Realtime system, FOS: Electrical engineering, electronic engineering, information engineering, Distributed, Parallel, and Cluster Computing (cs.DC), Electrical Engineering and Systems Science - Signal Processing, [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], SDR, Computation and Language (cs.CL)
Abstract

This article presents a new Domain Specific Embedded Language (DSEL) dedicated to Software-Defined Radio (SDR). From a set of carefully designed components, it enables to build efficient software digital communication systems, able to take advantage of the parallelism of modern processor architectures, in a straightforward and safe manner for the programmer. In particular, proposed DSEL enables the combination of pipelining and sequence duplication techniques to extract both temporal and spatial parallelism from digital communication systems. We leverage the DSEL capabilities on a real use case: a fully digital transceiver for the widely used DVB-S2 standard designed entirely in software. Through evaluation, we show how proposed software DVB-S2 transceiver is able to get the most from modern, high-end multicore CPU targets.

Published
2022

11. Meteorix: High performance computer vision application for Meteor detection from a CubeSat

Author

Millet, Maxime, Rambaux, Nicolas, Cassagne, Adrien, Bouyer, Manuel, Petreto, Andrea, Lacassagne, Lionel, Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Institut de Mécanique Céleste et de Calcul des Ephémérides (IMCCE), Institut national des sciences de l'Univers (INSU - CNRS)-Observatoire de Paris, Université Paris sciences et lettres (PSL)-Université Paris sciences et lettres (PSL)-Université de Lille-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), and Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)

Subjects
[INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-TS]Computer Science [cs]/Signal and Image Processing, [INFO.INFO-TI]Computer Science [cs]/Image Processing [eess.IV], [INFO.INFO-AO]Computer Science [cs]/Computer Arithmetic, [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS], [SDU.ASTR.EP]Sciences of the Universe [physics]/Astrophysics [astro-ph]/Earth and Planetary Astrophysics [astro-ph.EP], [INFO.INFO-CV]Computer Science [cs]/Computer Vision and Pattern Recognition [cs.CV], [INFO.INFO-RB]Computer Science [cs]/Robotics [cs.RO], [INFO.INFO-SE]Computer Science [cs]/Software Engineering [cs.SE], [INFO.INFO-DM]Computer Science [cs]/Discrete Mathematics [cs.DM], [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], [SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processing, [SPI.AUTO]Engineering Sciences [physics]/Automatic
Abstract

International audience

Published
2022

12. LSL3D : Etiquetage en Composantes Connexe par segments pour volumes 3D

Author

Maurice, Nathan, Lemaitre, Florian, Sopena, Julien, Lacassagne, Lionel, Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), DistributEd aLgorithms and sYStems (DELYS), Inria de Paris, Institut National de Recherche en Informatique et en Automatique (Inria)-Institut National de Recherche en Informatique et en Automatique (Inria)-LIP6, and Lacassagne, Lionel

Subjects
[INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-AR] Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-TS] Computer Science [cs]/Signal and Image Processing, [INFO.INFO-AO]Computer Science [cs]/Computer Arithmetic, [INFO.INFO-RB] Computer Science [cs]/Robotics [cs.RO], [INFO.INFO-SE] Computer Science [cs]/Software Engineering [cs.SE], [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS], [INFO.INFO-CV]Computer Science [cs]/Computer Vision and Pattern Recognition [cs.CV], [INFO.INFO-DS] Computer Science [cs]/Data Structures and Algorithms [cs.DS], [INFO.INFO-SE]Computer Science [cs]/Software Engineering [cs.SE], [INFO.INFO-DM]Computer Science [cs]/Discrete Mathematics [cs.DM], [SPI.AUTO]Engineering Sciences [physics]/Automatic, [INFO.INFO-DM] Computer Science [cs]/Discrete Mathematics [cs.DM], [SPI.AUTO] Engineering Sciences [physics]/Automatic, [INFO.INFO-CV] Computer Science [cs]/Computer Vision and Pattern Recognition [cs.CV], [INFO.INFO-TI] Computer Science [cs]/Image Processing [eess.IV], [INFO.INFO-TS]Computer Science [cs]/Signal and Image Processing, [INFO.INFO-TI]Computer Science [cs]/Image Processing [eess.IV], [INFO.INFO-DC] Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], [INFO.INFO-RB]Computer Science [cs]/Robotics [cs.RO], [INFO.INFO-AO] Computer Science [cs]/Computer Arithmetic, [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], [SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processing, [SPI.SIGNAL] Engineering Sciences [physics]/Signal and Image processing
Abstract

International audience; L'Étiquetage en Composantes Connexe (ECC) est une opération fondamentale de la vision numérique depuis des décennies. Bien que la majeure partie de la littérature traite des algorithmes en 2D, sur des applications telles que la vidéo-surveillance ou la conduite autonome, il y a de plus en plus besoin d'algorithmes pour traiter des images en 3D, notamment pour des applications médicales. Bien que les algorithmes d'ECC en 2D génèrent un nombre important d'accès mémoire et de comparaisons, le problème empire avec algorithmes en 3D. Il s'agit de la malédiction de la dimension. La mise en place d'un algorithme efficace doit donc résoudre ce problème. Ce papier introduit un algorithme utilisant des segments pour étiqueter des volumes en 3D. Les équivalences entre les étiquettes sont accélérées à l'aide d'une nouvelle stratégie atténuant l'impact de la dimension supérieure. Ce nouvel algorithme surpasse les algorithmes de l'État-de-l'art d'un facteur allant de ×1.5 à ×3.1 sur des images médicales et sur des images aléatoires.

Published
2022

13. Parameterized Complexity of Single-machine Scheduling with Precedence, Release Dates and Deadlines

Author

Hanen, Claire, Mallem, Maher, Munier-Kordon, Alix, Université Paris Nanterre - Département de Mathématiques et Informatique, Université Paris Nanterre (UPN), Recherche Opérationnelle (RO), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), and Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC)

Subjects
[INFO]Computer Science [cs]
Abstract

International audience

Published
2022

14. A tool for automatic detection of deadlocks in wormhole networks on chip

Author

Emmanuelle Encrenaz, Jean-Lou Desbarbieux, Sami Taktak, Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), Laboratoire d'Informatique de Paris 6 (LIP6), Université Pierre et Marie Curie - Paris 6 (UPMC)-Centre National de la Recherche Scientifique (CNRS)-Université Pierre et Marie Curie - Paris 6 (UPMC)-Centre National de la Recherche Scientifique (CNRS), Architecture et Logiciels pour Systèmes Embarqués sur Puce ( ALSOC ), Laboratoire d'Informatique de Paris 6 ( LIP6 ), and Université Pierre et Marie Curie - Paris 6 ( UPMC ) -Centre National de la Recherche Scientifique ( CNRS ) -Université Pierre et Marie Curie - Paris 6 ( UPMC ) -Centre National de la Recherche Scientifique ( CNRS )

Subjects
Dynamic Source Routing, [ INFO ] Computer Science [cs], Computer science, media_common.quotation_subject, Distributed computing, 02 engineering and technology, Concurrency control, 0202 electrical engineering, electronic engineering, information engineering, [INFO]Computer Science [cs], Electrical and Electronic Engineering, Networks on chip, Wormhole, Function (engineering), media_common, 020203 distributed computing, Static routing, business.industry, Function (mathematics), Extension (predicate logic), Deadlock, Computer Graphics and Computer-Aided Design, 020202 computer hardware & architecture, Computer Science Applications, Network on a chip, Link-state routing protocol, Routing (electronic design automation), business, Computer network
Abstract

We present an extension of Duato's necessary and sufficient condition a routing function must satisfy in order to be deadlock-free, to support environment constraints inducing extra-dependencies between messages. We also present an original algorithm to automatically check the deadlock-freeness of a network with a given routing function. A prototype tool has been developed and automatic deadlock checking of large scale networks with various routing functions have been successfully achieved. We provide comparative results with standard approach, highlighting the benefits of our method.

Published
2008

15. Handling causality and schedulability when designing and prototyping cyber-physical systems

Author

Daniela Genius, Rodrigo Cortés Porto, Ludovic Apvrille, Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Département Communications & Electronique (COMELEC), Télécom ParisTech, System on Chip (LabSoC), Laboratoire Traitement et Communication de l'Information (LTCI), Institut Mines-Télécom [Paris] (IMT)-Télécom Paris-Institut Mines-Télécom [Paris] (IMT)-Télécom Paris, and Institut Polytechnique de Paris (IP Paris)

Subjects
Schedule, Analogue electronics, Computer science, Model of computation, Distributed computing, Cyber-physical system, 020207 software engineering, 02 engineering and technology, Causality (physics), SystemC, Systems Modeling Language, Modeling and Simulation, 0202 electrical engineering, electronic engineering, information engineering, [INFO]Computer Science [cs], computer, Software, computer.programming_language, SystemC AMS
Abstract

International audience; Cyber physical systems are built upon digital and analog circuits, making it necessary to handle different models of computation during their design and verification (e.g., by simulation). When designing these systems, an important aspect to consider is the causality between the different domains. For this, we introduce a new model-driven framework able to identify causality problems and to suggest a valid schedule between the analog and digital domains. Once a valid schedule has been computed, our framework can generate cycle and bit accurate virtual prototypes (in SystemC/SystemC AMS) from high-level SysML models.

Published
2021

16. SCI-FI: Control Signal, Code, and Control Flow Integrity against Fault Injection Attacks

Author

Thomas Chamelot, Damien Courousse, Karine Heydemann, Département Systèmes et Circuits Intégrés Numériques (DSCIN), Laboratoire d'Intégration des Systèmes et des Technologies (LIST (CEA)), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, and Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)

Subjects
[INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-CR]Computer Science [cs]/Cryptography and Security [cs.CR], [INFO]Computer Science [cs]
Abstract

International audience; Fault injection attacks have become a serious threat against embedded systems. Recently, Laurent et al. have reported that some faults inside the microarchitecture escape all typical software fault models and so software counter-measures. Moreover, state-of-the-art counter-measures, hardware-only or with hardware support, do not consider the integrity of microarchitectural control signals that are the target of these faults. We present SCI-FI, a counter-measure for Control Signal, Code, and Control-Flow Integrity against Fault Injection attacks. SCI-FI combines the protection of pipeline control signals with a fine-grained code and control-flow integrity mechanism, and can additionally provide code authentication. We evaluate SCI-FI by extending a RISC-V core. The average hardware area overheads range from 6.5% to 23.8%, and the average code size and execution time increase by 25.4% and 17.5% respectively.

Published
2022

17. Maskara: Compilation of a Masking Countermeasure With Optimized Polynomial Interpolation

Author

Damien Couroussé, Karine Heydemann, Inès Ben El Ouahma, Quentin L. Meunier, Nicolas Belleville, Laboratoire Fonctions Innovantes pour circuits Mixtes (LFIM), Université Grenoble Alpes (UGA)-Département Systèmes et Circuits Intégrés Numériques (DSCIN), Laboratoire d'Intégration des Systèmes et des Technologies (LIST), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Laboratoire d'Intégration des Systèmes et des Technologies (LIST), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), ANR-15-CE39-0008,PROSECCO,Génération de code sécurisé avec des protections formellement prouvées(2015), Laboratoire d'Intégration des Systèmes et des Technologies (LIST (CEA)), and Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Laboratoire d'Intégration des Systèmes et des Technologies (LIST (CEA))

Subjects
Polynomial, Speedup, Static single assignment form, Computer science, Computation, 02 engineering and technology, Parallel computing, computer.software_genre, Computer Graphics and Computer-Aided Design, 020202 computer hardware & architecture, Polynomial interpolation, 0202 electrical engineering, electronic engineering, information engineering, [INFO]Computer Science [cs], Multiplication, Compiler, Electrical and Electronic Engineering, Machine code, computer, Formal verification, Software, Interpolation
Abstract

International audience; Side-channel attacks are amongst the major threats for embedded systems and IoT devices. Masking is one of the most used countermeasure against such attacks, but its application remains a difficult process. We propose a target-independent approach for applying a first-order boolean masking countermeasure during compilation, on the static single assignment form. Contrary to state-of-the art automated approaches that require to simplify the control flow of the input program, our approach supports regular control-flow program structures. Moreover, our compiler is the first to automatically mask table lookups using a polynomial interpolation approach. We also present new optimisations to speed up the evaluation of polynomials: we reduce the number of terms of the polynomial, and we accelerate finite field multiplication. We show that our approach is faster than the standard masked table approach with mask refresh after each access, with speedups up to ×2.4 in our experiments. Finally, using a formal verification approach, we show that the compiled machine code is secure, i.e., that all intermediate computations are statistically independent of the secrets.

Published
2020

18. An efficient run-based Connected Component Labeling algorithm for processing holes

Author

Lemaitre, Florian, Maurice, Nathan, Lacassagne, Lionel, Lacassagne, Lionel, Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), DistributEd aLgorithms and sYStems (DELYS), Inria de Paris, and Institut National de Recherche en Informatique et en Automatique (Inria)-Institut National de Recherche en Informatique et en Automatique (Inria)-LIP6

Subjects
[INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-AR] Computer Science [cs]/Hardware Architecture [cs.AR], Hole processing, [INFO.INFO-TS] Computer Science [cs]/Signal and Image Processing, [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS], [INFO.INFO-SE] Computer Science [cs]/Software Engineering [cs.SE], [INFO.INFO-DS] Computer Science [cs]/Data Structures and Algorithms [cs.DS], [INFO.INFO-SE]Computer Science [cs]/Software Engineering [cs.SE], [INFO.INFO-DM]Computer Science [cs]/Discrete Mathematics [cs.DM], [SPI.AUTO]Engineering Sciences [physics]/Automatic, Euler number, [INFO.INFO-CV] Computer Science [cs]/Computer Vision and Pattern Recognition [cs.CV], [INFO.INFO-TS]Computer Science [cs]/Signal and Image Processing, Black & white processing, Adjacency tree, [INFO.INFO-DC] Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], [INFO.INFO-RB]Computer Science [cs]/Robotics [cs.RO], [SPI.SIGNAL] Engineering Sciences [physics]/Signal and Image processing, [INFO.INFO-AO]Computer Science [cs]/Computer Arithmetic, [INFO.INFO-RB] Computer Science [cs]/Robotics [cs.RO], [INFO.INFO-CV]Computer Science [cs]/Computer Vision and Pattern Recognition [cs.CV], Hole filling, [INFO.INFO-DM] Computer Science [cs]/Discrete Mathematics [cs.DM], [SPI.AUTO] Engineering Sciences [physics]/Automatic, [INFO.INFO-TI] Computer Science [cs]/Image Processing [eess.IV], [INFO.INFO-TI]Computer Science [cs]/Image Processing [eess.IV], [INFO.INFO-AO] Computer Science [cs]/Computer Arithmetic, [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], [SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processing, Connected Component Labeling and Analysis
Abstract

International audience; This article introduces a new connected component labeling and analysis algorithm framework that is able to compute in one pass the foreground and the background labels as well as the adjacency tree. The computation of features (bounding boxes, first statistical moments, Euler number) is done on-the-fly. The transitive closure enables an efficient hole processing that can be filled while their features are merged with the surrounding connected component without the need to rescan the image. A comparison with State-of-the-Art shows that this new algorithm can do all these computations faster than all existing algorithms processing foreground and background connected components or holes.

Published
2022

19. Meteorix - A new processing chain for real-time detection and tracking of meteors from space

Author

Millet, Maxime, Rambaux, Nicolas, Petreto, Andrea, Lemaitre, Florian, Lacassagne, Lionel, Lacassagne, Lionel, Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, and Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)

Subjects
[INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-AR] Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-TS] Computer Science [cs]/Signal and Image Processing, [INFO.INFO-AO]Computer Science [cs]/Computer Arithmetic, [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS], [INFO.INFO-SE] Computer Science [cs]/Software Engineering [cs.SE], [INFO.INFO-RB] Computer Science [cs]/Robotics [cs.RO], [INFO.INFO-CV]Computer Science [cs]/Computer Vision and Pattern Recognition [cs.CV], [INFO.INFO-DS] Computer Science [cs]/Data Structures and Algorithms [cs.DS], [INFO.INFO-SE]Computer Science [cs]/Software Engineering [cs.SE], [INFO.INFO-DM]Computer Science [cs]/Discrete Mathematics [cs.DM], [SPI.AUTO]Engineering Sciences [physics]/Automatic, [INFO.INFO-DM] Computer Science [cs]/Discrete Mathematics [cs.DM], [SPI.AUTO] Engineering Sciences [physics]/Automatic, [INFO.INFO-CV] Computer Science [cs]/Computer Vision and Pattern Recognition [cs.CV], [INFO.INFO-TS]Computer Science [cs]/Signal and Image Processing, [INFO.INFO-TI] Computer Science [cs]/Image Processing [eess.IV], [INFO.INFO-TI]Computer Science [cs]/Image Processing [eess.IV], [INFO.INFO-DC] Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], [INFO.INFO-RB]Computer Science [cs]/Robotics [cs.RO], [INFO.INFO-AO] Computer Science [cs]/Computer Arithmetic, [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], [SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processing, [SPI.SIGNAL] Engineering Sciences [physics]/Signal and Image processing
Abstract

International audience; this article describes a processing chain for meteor detection from space. Unlike ground detection using stationary cameras with a still background, detection aboard a nano-satellite needs to deal with a camera in motion and a moving background. The main parts of this chain are an estimation of the apparent movement and the computation of angular statistics. The first results show a detection probability close to 96% on the whole set of Chiba videos from the PERC (Planetary Exploration Research Center) Meteor Project.

Published
2022

20. Parameterized Complexity of a Parallel Machine Scheduling Problem

Author

Mallem, Maher, Hanen, Claire, Munier-Kordon, Alix, Recherche Opérationnelle (RO), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Université Paris Nanterre - Département de Mathématiques et Informatique, Université Paris Nanterre (UPN), and Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC)

Subjects
parallel processors, chains, pathwidth, Theory of computation → Problems, reductions and completeness, precedence delays, [INFO.INFO-RO]Computer Science [cs]/Operations Research [cs.RO], scheduling, parameterized complexity
Abstract

In this paper we consider the parameterized complexity of two versions of a parallel machine scheduling problem with precedence delays, unit processing times and time windows. In the first version - with exact delays - we assume that the delay between two jobs must be exactly respected, whereas in the second version - with minimum delays - the delay between two jobs is a lower bound on the time between them. Two parameters are considered for this analysis: the pathwidth of the interval graph induced by the time windows and the maximum precedence delay value. We prove that our problems are para-NP-complete with respect to any of the two parameters and fixed-parameter tractable parameterized by the pair of parameters., LIPIcs, Vol. 249, 17th International Symposium on Parameterized and Exact Computation (IPEC 2022), pages 21:1-21:21

Published
2022
Full Text
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21. Meteorix camera tests for space-based meteor observations

Author

Rambaux, Nicolas, Vaubaillon, Jérémie, Derelle, Sophie, Jacquart, Marc, Millet, Maxime, Lacassagne, Lionel, Petreto, Andrea, Simoneau, Pierre, Baillié, K, Desmars, J, Galayko, Dimitri, Chotin, Roselyne, Institut de Mécanique Céleste et de Calcul des Ephémérides (IMCCE), Institut national des sciences de l'Univers (INSU - CNRS)-Observatoire de Paris, Université Paris sciences et lettres (PSL)-Université Paris sciences et lettres (PSL)-Université de Lille-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), DOTA, ONERA, Université Paris Saclay [Palaiseau], ONERA-Université Paris-Saclay, Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), and Circuits Intégrés Numériques et Analogiques (CIAN)

Subjects
[INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-TS]Computer Science [cs]/Signal and Image Processing, [INFO.INFO-AO]Computer Science [cs]/Computer Arithmetic, [INFO.INFO-TI]Computer Science [cs]/Image Processing [eess.IV], [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS], [INFO.INFO-CV]Computer Science [cs]/Computer Vision and Pattern Recognition [cs.CV], [INFO.INFO-RB]Computer Science [cs]/Robotics [cs.RO], [INFO.INFO-SE]Computer Science [cs]/Software Engineering [cs.SE], [INFO.INFO-DM]Computer Science [cs]/Discrete Mathematics [cs.DM], [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], [SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processing, [SPI.AUTO]Engineering Sciences [physics]/Automatic
Abstract

International audience; Meteorix is a Universitary CubeSat dedicated to be a demonstrator for the detection and characterisation of meteors and space debris. Its payload is an onboard camera and detection chain. Usually, cameras on CubeSat are used for daylight observations and this proceeding present some tests realized with a sensitive CMOS camera, which is also used in the martian rovers for imaging purposes. In-lab tests were conducted to measure the spectral response. First on-sky images were performed during the 2020 Geminids meteor shower from the Paris area. Follow-up tests were performed from Observatoire de Haute-Provence during the 2021 η-Aquariids meteor shower. Capabilities and needed modifications for meteor detection were identified.

Published
2021

22. METEORIX: a CubeSat mission for detection and characterization of meteors and space debris

Author

Millet, Maxime, Rambaux, Nicolas, Petreto, Andrea, Vaubaillon, Jeremie, Lacassagne, Lionel, Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Institut de Mécanique Céleste et de Calcul des Ephémérides (IMCCE), Institut national des sciences de l'Univers (INSU - CNRS)-Observatoire de Paris, Université Paris sciences et lettres (PSL)-Université Paris sciences et lettres (PSL)-Université de Lille-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), and Lerity - Alcen

Subjects
[INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-TS]Computer Science [cs]/Signal and Image Processing, [INFO.INFO-TI]Computer Science [cs]/Image Processing [eess.IV], [INFO.INFO-AO]Computer Science [cs]/Computer Arithmetic, [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS], [INFO.INFO-CV]Computer Science [cs]/Computer Vision and Pattern Recognition [cs.CV], [INFO.INFO-RB]Computer Science [cs]/Robotics [cs.RO], [INFO.INFO-SE]Computer Science [cs]/Software Engineering [cs.SE], [INFO.INFO-DM]Computer Science [cs]/Discrete Mathematics [cs.DM], [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], [SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processing, ComputingMilieux_MISCELLANEOUS, [SPI.AUTO]Engineering Sciences [physics]/Automatic
Abstract

International audience

Published
2021

23. Reconciling optimization with secure compilation

Author

Christophe Guillon, Albert Cohen, Karine Heydemann, Son Tuan Vu, Arnaud de Grandmaison, Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Google France, ARM Ltd [Cambridge] (ARM), and STMicroelectronics [Grenoble] (ST-GRENOBLE)

Subjects
Computer science, Semantics (computer science), Distributed computing, media_common.quotation_subject, 02 engineering and technology, security, computer.software_genre, [INFO.INFO-CR]Computer Science [cs]/Cryptography and Security [cs.CR], Software, 0202 electrical engineering, electronic engineering, information engineering, Production (economics), [INFO]Computer Science [cs], Safety, Risk, Reliability and Quality, Complement (set theory), media_common, [INFO.INFO-PL]Computer Science [cs]/Programming Languages [cs.PL], business.industry, 020207 software engineering, debugging, 020202 computer hardware & architecture, Debugging, LLVM, compilation, Compiler, State (computer science), business, computer, Machine code, optimization
Abstract

International audience; Software protections against side-channel and physical attacks are essential to the development of secure applications. Such protections are meaningful at machine code or micro-architectural level, but they typically do not carry observable semantics at source level. This renders them susceptible to miscompilation, and security engineers embed input/output side-effects to prevent optimizing compilers from altering them. Yet these side-effects are error-prone and compiler-dependent. The current practice involves analyzing the generated machine code to make sure security or privacy properties are still enforced. These side-effects may also be too expensive in fine-grained protections such as control-flow integrity. We introduce observations of the program state that are intrinsic to the correct execution of security protections, along with means to specify and preserve observations across the compilation flow. Such observations complement the input/output semantics-preservation contract of compilers. We introduce an opacification mechanism to preserve and enforce a partial ordering of observations. This approach is compatible with a production compiler and does not incur any modification to its optimization passes. We validate the effectiveness and performance of our approach on a range of benchmarks, expressing the secure compilation of these applications in terms of observations to be made at specific program points.

Published
2021

24. Meteorix: a new processing chain for detection and tracking of meteors from space

Author

Millet, Maxime, Rambaux, Nicolas, PETRETO, Andrea, lemaitre, florian, Lacassagne, Lionel, Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Institut de Mécanique Céleste et de Calcul des Ephémérides (IMCCE), Institut national des sciences de l'Univers (INSU - CNRS)-Observatoire de Paris, and Université Paris sciences et lettres (PSL)-Université Paris sciences et lettres (PSL)-Université de Lille-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)

Subjects
[INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-TS]Computer Science [cs]/Signal and Image Processing, [INFO.INFO-TI]Computer Science [cs]/Image Processing [eess.IV], [INFO.INFO-AO]Computer Science [cs]/Computer Arithmetic, [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS], [INFO.INFO-CV]Computer Science [cs]/Computer Vision and Pattern Recognition [cs.CV], [INFO.INFO-RB]Computer Science [cs]/Robotics [cs.RO], [INFO.INFO-SE]Computer Science [cs]/Software Engineering [cs.SE], [INFO.INFO-DM]Computer Science [cs]/Discrete Mathematics [cs.DM], [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], [SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processing, ComputingMilieux_MISCELLANEOUS, [SPI.AUTO]Engineering Sciences [physics]/Automatic
Abstract

International audience

Published
2021

25. Meteorix: A cubesat mission dedicated to the detection of meteors and space debris

Author

Rambaux, Nicolas, Vaubaillon, Jérémie, Derelle, Sophie, Jacquart, Marc, Millet, Maxime, Lacassagne, Lionel, PETRETO, Andrea, Simoneau, Pierre, Baillié, K, Desmars, J, Galayko, Dimitri, Chotin, Roselyne, Institut de Mécanique Céleste et de Calcul des Ephémérides (IMCCE), Institut national des sciences de l'Univers (INSU - CNRS)-Observatoire de Paris, Université Paris sciences et lettres (PSL)-Université Paris sciences et lettres (PSL)-Université de Lille-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), DOTA, ONERA, Université Paris Saclay [Palaiseau], ONERA-Université Paris-Saclay, Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), and Circuits Intégrés Numériques et Analogiques (CIAN)

Subjects
[INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-TS]Computer Science [cs]/Signal and Image Processing, [INFO.INFO-TI]Computer Science [cs]/Image Processing [eess.IV], [INFO.INFO-AO]Computer Science [cs]/Computer Arithmetic, [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS], [INFO.INFO-RB]Computer Science [cs]/Robotics [cs.RO], [INFO.INFO-CV]Computer Science [cs]/Computer Vision and Pattern Recognition [cs.CV], [INFO.INFO-SE]Computer Science [cs]/Software Engineering [cs.SE], [INFO.INFO-DM]Computer Science [cs]/Discrete Mathematics [cs.DM], [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], [SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processing, ComputingMilieux_MISCELLANEOUS, [SPI.AUTO]Engineering Sciences [physics]/Automatic
Abstract

International audience

Published
2021

26. Détection temps réel de météores à bord d'un nanosatellite, application au projet Meteorix

Author

Millet, Maxime, Rambaux, Nicolas, Petreto, Andrea, lemaitre, florian, Lacassagne, Lionel, Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Lhéritier - Alcen, Institut de Mécanique Céleste et de Calcul des Ephémérides (IMCCE), Institut national des sciences de l'Univers (INSU - CNRS)-Observatoire de Paris, Université Paris sciences et lettres (PSL)-Université Paris sciences et lettres (PSL)-Université de Lille-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), and Centre National de la Recherche Scientifique [CNRS]

Subjects
flot optique, étiquetage et analyse en composantes connexes, Détection et suivi de météores, nanosatellite, système embarqué, [INFO.INFO-CV]Computer Science [cs]/Computer Vision and Pattern Recognition [cs.CV], [INFO]Computer Science [cs], statistiques circulaires
Abstract

National audience; Dans cet article, nous présentons une nouvelle chaîne de traitements pour la détection et le suivi de météores depuis un nanosatellite. Les contraintes d'embarquabilité sont fortes : temps de traitement et consommation électrique.Nous avons donc choisi un ensemble d'algorithmes avec un rapport le plus équilibré possible entre complexité et précision.Les spécificités architecturales ont également orienté nos choix algorithmiques en vue de futures optimisations.La chaîne de traitement présentée ici repose principalement sur une estimation de vitesse par flot optique et des calculs de statistiques circulaires. Si les autres méthodes de l'état de l'art sont efficaces pour la détection de météores depuis le sol, nous montrons que celle présentée ici l'est pour une détection depuis l'espace.

Published
2021

27. Implementations Impact on Iterative Image Processing for Embedded GPU

Author

Romera, Thomas, Petreto, Andrea, Lemaitre, Florian, Bouyer, Manuel, Meunier, Quentin, Lacassagne, Lionel, Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), and Lacassagne, Lionel

Subjects
[INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-AR] Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-TS] Computer Science [cs]/Signal and Image Processing, Image Processing, [INFO.INFO-SE] Computer Science [cs]/Software Engineering [cs.SE], [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS], GPU, [INFO.INFO-DS] Computer Science [cs]/Data Structures and Algorithms [cs.DS], 02 engineering and technology, Energy Consumption, [INFO.INFO-SE]Computer Science [cs]/Software Engineering [cs.SE], [INFO.INFO-DM]Computer Science [cs]/Discrete Mathematics [cs.DM], [SPI.AUTO]Engineering Sciences [physics]/Automatic, [INFO.INFO-CV] Computer Science [cs]/Computer Vision and Pattern Recognition [cs.CV], TV-L1, [INFO.INFO-TS]Computer Science [cs]/Signal and Image Processing, 0202 electrical engineering, electronic engineering, information engineering, [INFO.INFO-DC] Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], [INFO.INFO-RB]Computer Science [cs]/Robotics [cs.RO], Embedded System, [SPI.SIGNAL] Engineering Sciences [physics]/Signal and Image processing, Optical flow, [INFO.INFO-AO]Computer Science [cs]/Computer Arithmetic, [INFO.INFO-RB] Computer Science [cs]/Robotics [cs.RO], [INFO.INFO-CV]Computer Science [cs]/Computer Vision and Pattern Recognition [cs.CV], 020202 computer hardware & architecture, [INFO.INFO-DM] Computer Science [cs]/Discrete Mathematics [cs.DM], [SPI.AUTO] Engineering Sciences [physics]/Automatic, [INFO.INFO-TI] Computer Science [cs]/Image Processing [eess.IV], [INFO.INFO-TI]Computer Science [cs]/Image Processing [eess.IV], 020201 artificial intelligence & image processing, [INFO.INFO-AO] Computer Science [cs]/Computer Arithmetic, [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], [SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processing
Abstract

International audience; The emergence of low-power embedded Graphical Processing Units (GPUs) with high computation capabilities has enabled the integration of image processing chains in a wide variety of embedded systems. Various optimisation techniques are however needed in order to get the most out of an embedded GPU. This paper explores several optimisation methods for iterative stencil-like image processing algorithms on embedded NVIDIA GPUs using the Compute Unified Device Architecture (CUDA) API. We chose to focus our architectural optimisations on the TV-L1 algorithm, an optical flow estimation method based on total variation (TV) regularisation and the L1 norm. It is widely used as a model for more complex optical flow estimations and is used in many recent video processing applications. In this work we evaluate the impact of architecture-oriented optimisations on both execution time and energy consumption on several Nvidia Jetson GPU embedded boards. Results show a speedup up to 3× compared to State-of-the-Art versions as well as a 2.6× decrease in energy consumption.

Published
2021

28. Un nouvel algorithme efficace de Split & Merge pour systèmes embarqués

Author

Maurice, Nathan, Sopena, Julien, Lacassagne, Lionel, Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), DistributEd aLgorithms and sYStems (DELYS), Inria de Paris, Institut National de Recherche en Informatique et en Automatique (Inria)-Institut National de Recherche en Informatique et en Automatique (Inria)-LIP6, and Lacassagne, Lionel

Subjects
[INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-AR] Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-TS] Computer Science [cs]/Signal and Image Processing, [INFO.INFO-AO]Computer Science [cs]/Computer Arithmetic, [INFO.INFO-SE] Computer Science [cs]/Software Engineering [cs.SE], [INFO.INFO-RB] Computer Science [cs]/Robotics [cs.RO], [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS], [INFO.INFO-CV]Computer Science [cs]/Computer Vision and Pattern Recognition [cs.CV], [INFO.INFO-DS] Computer Science [cs]/Data Structures and Algorithms [cs.DS], [INFO.INFO-SE]Computer Science [cs]/Software Engineering [cs.SE], [INFO.INFO-DM]Computer Science [cs]/Discrete Mathematics [cs.DM], [SPI.AUTO]Engineering Sciences [physics]/Automatic, [INFO.INFO-DM] Computer Science [cs]/Discrete Mathematics [cs.DM], [SPI.AUTO] Engineering Sciences [physics]/Automatic, [INFO.INFO-CV] Computer Science [cs]/Computer Vision and Pattern Recognition [cs.CV], [INFO.INFO-TI] Computer Science [cs]/Image Processing [eess.IV], [INFO.INFO-TS]Computer Science [cs]/Signal and Image Processing, [INFO.INFO-TI]Computer Science [cs]/Image Processing [eess.IV], [INFO.INFO-DC] Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], [INFO.INFO-RB]Computer Science [cs]/Robotics [cs.RO], [INFO.INFO-AO] Computer Science [cs]/Computer Arithmetic, [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], [SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processing, [SPI.SIGNAL] Engineering Sciences [physics]/Signal and Image processing
Abstract

International audience; Cet article présente un nouvel algorithme de segmentation d'images en régions basé sur l'approche Split & Merge. Les algorithmes de Split & Merge ont par nature, un temps d'exécution dépendant des données car le critère d'arrêt de ces deux étapes est lié à l'homogénéité de chaque région. Si les précédents algorithmes ont permis de rendre l'étape de Split bien moins sensible aux données, l'étape de Merge, bien plus complexe, reste toujours très sensible au contenu de l'image. Une structure TTA (Three Table Array) est introduite dans l'étape de Merge pour éliminer les réallocations mémoire dues aux fusions de tableaux. Comme cette structure entraîne une perte de localité lors du parcours des tableaux, nous proposons d'ajouter deux mécanismes implémentant un cache logiciel afin d'en limiter l'impact. Une étude expérimentale menée sur un système embarqué (carte Nvidia Jetson NX) a montré que notre algorithme de Merge est 10.6 fois plus rapide que l'état de l'art pour des images 960 × 720 tout en ayant un temps d'exécution bien moins sensible aux images segmentées.

Published
2021

29. Two Deadline Reduction Algorithms for Scheduling Dependent Tasks on Parallel Processors

Author

Claire Hanen, Alix Munier Kordon, Theo Pedersen, Recherche Opérationnelle (RO), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), and Université Paris Nanterre (UPN)

Subjects
Scheduling problems, Job shop scheduling, Computer science, Extension (predicate logic), Star (graph theory), Decision problem, Notation, Nonpreemptive multitasking, Scheduling (computing), Reduction (complexity), Preemptive relaxation, Precedence constraints, [INFO]Computer Science [cs], Algorithm, Energetic reasoning
Abstract

International audience; This paper proposes two deadline adjustment techniques for scheduling non preemptive tasks subject to precedence relations, release dates and deadlines on a limited number of processors. This decision problem is denoted by P|prec,ri,di|⋆in standard notations. The first technique is an extension of the Garey and Johnson algorithm that integrates precedence relations in energetic reasoning. The second one is an extension of the Leung, Palem and Pnueli algorithm that builds iteratively relaxed preemptive schedules to adjust deadlines.The implementation of the two classes of algorithms is discussed and compared on randomly generated instances. We show that the adjustments obtained are slightly different but equivalent using several metrics. However, the time performance of the extended Leung, Palem and Pnueli algorithm is much better than that of the extended Garey and Johnson ones.

Published
2021

30. High-level modeling of communication-centric applications: Extensions to a system-level design and virtual prototyping tool

Author

Daniela Genius, Ludovic Apvrille, Letitia W. Li, Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Département Communications & Electronique (COMELEC), Télécom ParisTech, System on Chip (LabSoC), Laboratoire Traitement et Communication de l'Information (LTCI), Institut Mines-Télécom [Paris] (IMT)-Télécom Paris-Institut Mines-Télécom [Paris] (IMT)-Télécom Paris, Institut Mines-Télécom [Paris] (IMT)-Télécom Paris, and Institut VEDECOM

Subjects
Electronic system-level design and verification, Computer Networks and Communications, business.industry, Computer science, Design space exploration, 02 engineering and technology, 020202 computer hardware & architecture, Unified Modeling Language, Artificial Intelligence, Hardware and Architecture, Systems Modeling Language, Embedded system, Virtual prototyping, 0202 electrical engineering, electronic engineering, information engineering, System-level design, [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, 020201 artificial intelligence & image processing, business, computer, Software, High level modeling, computer.programming_language
Abstract

International audience; High performance streaming applications require hardware platforms featuring complex, multi-level interconnects. These applications often resemble a task-farm, where many identical tasks listen to the same input channel. Usual embedded system design tools are not well adapted to capture these applications. In particular, the non-uniform memory access (NUMA) nature of the platforms induces latencies that must be carefully examined. The paper proposes a multi-level modeling methodology and tools (TTool, SoCLib) that have been extended to model the characteristics of streaming applications (multiple tasks, non deter-ministic behavior, I/O devices) in UML/SysML, and to automatically generate a virtual prototype that can be simulated with high precision. The paper uses a typical streaming application to show how latencies can be estimated and fed back to diagrams.

Published
2019

31. Evolution of the energy efficiency of LHCb’s real-time processing

Author

Conor Fitzpatrick, T. Colombo, Niklas Stefan Nolte, Vladimir Gligorov, Arthur Marius Hennequin, Dorothea vom Bruch, Niko Neufeld, Daniel Hugo Campora Perez, Rainer Schwemmer, Roel Aaij, Laboratoire de Physique Nucléaire et de Hautes Énergies (LPNHE (UMR_7585)), Institut National de Physique Nucléaire et de Physique des Particules du CNRS (IN2P3)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Université de Paris (UP), Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Centre de Physique des Particules de Marseille (CPPM), Aix Marseille Université (AMU)-Institut National de Physique Nucléaire et de Physique des Particules du CNRS (IN2P3)-Centre National de la Recherche Scientifique (CNRS), and Institut National de Physique Nucléaire et de Physique des Particules du CNRS (IN2P3)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)

Subjects
Physics - Instrumentation and Detectors, QC1-999, FOS: Physical sciences, Context (language use), Processing, 01 natural sciences, programming, High Energy Physics - Experiment, High Energy Physics - Experiment (hep-ex), Software, 0103 physical sciences, multiprocessor: graphics, [PHYS.HEXP]Physics [physics]/High Energy Physics - Experiment [hep-ex], hardware, [PHYS.PHYS.PHYS-INS-DET]Physics [physics]/Physics [physics]/Instrumentation and Detectors [physics.ins-det], Detectors and Experimental Techniques, 010306 general physics, activity report, computer.programming_language, Data processing, Large Hadron Collider, 010308 nuclear & particles physics, business.industry, track data analysis, Physics, Detector, Instrumentation and Detectors (physics.ins-det), detector: upgrade, LHC-B, Upgrade, Computer architecture, power supply, microprocessor, data management, business, computer, Particle Physics - Experiment, performance, Efficient energy use
Abstract

The upgraded LHCb detector, due to start datataking in 2022, will have to process an average data rate of 4 TB/s in real time. Because LHCb’s physics objectives require that the full detector information for every LHC bunch crossing is read out and made available for real-time processing, this bandwidth challenge is equivalent to that of the ATLAS and CMS HL-LHC software read-out, but deliverable five years earlier. Over the past six years, the LHCb collaboration has undertaken a bottom-up rewrite of its software infrastructure, pattern recognition, and selection algorithms to make them better able to efficiently exploit modern highly parallel computing architectures. We review the impact of this reoptimization on the energy efficiency of the realtime processing software and hardware which will be used for the upgrade of the LHCb detector. We also review the impact of the decision to adopt a hybrid computing architecture consisting of GPUs and CPUs for the real-time part of LHCb’s future data processing. We discuss the implications of these results on how LHCb’s real-time power requirements may evolve in the future, particularly in the context of a planned second upgrade of the detector. The upgraded LHCb detector, due to start datataking in 2022, will have to process an average data rate of 4~TB/s in real time. Because LHCb's physics objectives require that the full detector information for every LHC bunch crossing is read out and made available for real-time processing, this bandwidth challenge is equivalent to that of the ATLAS and CMS HL-LHC software read-out, but deliverable five years earlier. Over the past six years, the LHCb collaboration has undertaken a bottom-up rewrite of its software infrastructure, pattern recognition, and selection algorithms to make them better able to efficiently exploit modern highly parallel computing architectures. We review the impact of this reoptimization on the energy efficiency of the real-time processing software and hardware which will be used for the upgrade of the LHCb detector. We also review the impact of the decision to adopt a hybrid computing architecture consisting of GPUs and CPUs for the real-time part of LHCb's future data processing. We discuss the implications of these results on how LHCb's real-time power requirements may evolve in the future, particularly in the context of a planned second upgrade of the detector.

Published
2021

32. FPGA Acceleration of the Horn and Schunck Hierarchical Algorithm

Author

Roselyne Chotin, Lionel Lacassagne, Ilias Bournias, Circuits Intégrés Numériques et Analogiques (CIAN), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), and Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC)

Subjects
[INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], Computer science, [INFO.INFO-AO]Computer Science [cs]/Computer Arithmetic, Pipeline (computing), [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS], 020208 electrical & electronic engineering, [INFO.INFO-CV]Computer Science [cs]/Computer Vision and Pattern Recognition [cs.CV], [INFO.INFO-SE]Computer Science [cs]/Software Engineering [cs.SE], 02 engineering and technology, Parallel computing, [INFO.INFO-DM]Computer Science [cs]/Discrete Mathematics [cs.DM], Resolution (logic), [SPI.AUTO]Engineering Sciences [physics]/Automatic, [INFO.INFO-TS]Computer Science [cs]/Signal and Image Processing, Parallel processing (DSP implementation), [INFO.INFO-TI]Computer Science [cs]/Image Processing [eess.IV], Motion estimation, 0202 electrical engineering, electronic engineering, information engineering, [INFO.INFO-RB]Computer Science [cs]/Robotics [cs.RO], System on a chip, [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], Field-programmable gate array, [SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processing, Throughput (business), Interpolation
Abstract

International audience; This work proposes a highly tunable motion estimation architecture. We implement the Horn and Schunck algorithm with the hierarchical extension for larger motion estimations in FPGAs. Different architectures are explored dealing with interpolation, pipeline, parallelism and arithmetic format, in order to fit performance. We show in our exploration, how the different cores of our system should be used to increase the throughput. Our smallest design achieves a 30.8 Mpixel/s in a 1024×1024 resolution and the fastest 507 Mpixel/s which is one of the fastest ever achieved, as far as we know, for FPGAs.

Published
2021

33. Two Deadline Reduction Algorithms for Scheduling Dependent Tasks on Parallel Processors (extended version)

Author

Hanen, Claire, Munier Kordon, Alix, Pedersen, Theo, Recherche Opérationnelle (RO), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), and LIP6, Sorbonne Université

Subjects
[INFO.INFO-RO]Computer Science [cs]/Operations Research [cs.RO]
Published
2021

34. PROSECCO: Formally-proven secure compiled code

Author

Nicolas Belleville, Damien Couroussé, Emmanuelle Encrenaz, Karine Heydemann, Quentin Meunier, CEA, Contributeur MAP, Gurvan LE GUERNIC, Laboratoire Fonctions Innovantes pour circuits Mixtes (LFIM), Université Grenoble Alpes (UGA)-Département Systèmes et Circuits Intégrés Numériques (DSCIN), Laboratoire d'Intégration des Systèmes et des Technologies (LIST (CEA)), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Laboratoire d'Intégration des Systèmes et des Technologies (LIST (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, and Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)

Subjects
[INFO.INFO-CR]Computer Science [cs]/Cryptography and Security [cs.CR], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, [INFO.INFO-ES] Computer Science [cs]/Embedded Systems, [INFO.INFO-CR] Computer Science [cs]/Cryptography and Security [cs.CR]
Abstract

The application and the verification of countermeasures against physical attacks still remainlong, error-prone and expertise-demanding tasks. We propose a toolchain to help the expertin these tasks. Our toolchain is composed of two components: a compiler that automaticallyapplies a set of countermeasures, and a formal verification tool that automatically verifiesbinary code for various leakage models and fault models. We describe different scenarios ofusage of our toolchain, and then illustrate the flexibility of our toolchain in one of them., L’application et la vérification de contre-mesures contre les attaques physiques sont des tâches qui sont longues, qui comportent un important risque d’erreur, et qui demandent une forte expertise. Nous proposons une chaîne d’outils pour aider les experts dans ces tâches. Notre chaîne d’outils se décompose en deux élements : un compilateur capable d’appliquer automatiquement différentes contremesures contre les attaques en fautes ou par canal auxiliaire, et un outil de vérification formelle dont le but est de vérifier automatiquement la robustesse des codes binaires en considérant des modèles de fuites et de fautes variés. Nous décrivons plusieurs scénarios d’utilisation de notre chaîne d’outils, et illustrons la flexibilité de celle-ci sur un de ces scénarios.

Published
2021

35. Processor Anchor to Increase the Robustness Against Fault Injection and Cyber Attacks

Author

Adrien Facon, Ulrich Kühne, Karine Heydemann, Sylvain Guilley, Abdelmalek Si Merabet, Michael Timbert, Jean-Luc Danger, Baptiste Pecatte, Département Communications & Electronique (COMELEC), Télécom ParisTech, Secure and Safe Hardware (SSH), Laboratoire Traitement et Communication de l'Information (LTCI), Institut Mines-Télécom [Paris] (IMT)-Télécom Paris-Institut Mines-Télécom [Paris] (IMT)-Télécom Paris, Institut Mines-Télécom [Paris] (IMT)-Télécom Paris, Secure-IC S.A.S, Institut Mines-Télécom [Paris] (IMT), Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), The Selmer Center in Secure Communication, Department of Informatics [Bergen] (UiB), and University of Bergen (UiB)-University of Bergen (UiB)

Subjects
010302 applied physics, business.industry, Computer science, Pipeline (computing), 02 engineering and technology, Fault injection, 01 natural sciences, [SPI.TRON]Engineering Sciences [physics]/Electronics, 020202 computer hardware & architecture, Metadata, Control Flow Graph, Software security assurance, Robustness (computer science), Embedded system, 0103 physical sciences, Cyber Escort Unit (CEU), 0202 electrical engineering, electronic engineering, information engineering, Control flow graph, Hardware protection, Control Flow Integrity, Cache, Central processing unit, business
Abstract

International audience; One major advance in software security would be to use robust processors which could assist the code developer to thwart both cyber and physical attacks. This paper presents a hardware-based solution which increases the security by checking the integrity of executed code on any microcontroller. Unlike other Control Flow Integrity (CFI) protections, this solution does not require modifications of the CPU pipeline, but relies on monitoring the interface between the processor and its instruction cache. The integrity of the execution flow and the instruction sequences (called Basic Blocks) is checked by hardware with precomputed metadata. Another module is dedicated to speed up the access to these metadata. This paper shows the effectiveness of the solution as the impact is as much as 21% in average on the execution time at the price of using memory space to store metadata along with the code.

Published
2021

36. Taming Voting Algorithms on GPUs for an Efficient Connected Component Analysis Algorithm

Author

Arthur Marius Hennequin, Florian Lemaitre, Lionel Lacassagne, Lacassagne, Lionel, Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), and European Organization for Nuclear Research (CERN)

Subjects
[INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-AR] Computer Science [cs]/Hardware Architecture [cs.AR], Computer science, [INFO.INFO-TS] Computer Science [cs]/Signal and Image Processing, media_common.quotation_subject, Serialization, [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS], [INFO.INFO-SE] Computer Science [cs]/Software Engineering [cs.SE], GPU, Image processing, [INFO.INFO-DS] Computer Science [cs]/Data Structures and Algorithms [cs.DS], [INFO.INFO-SE]Computer Science [cs]/Software Engineering [cs.SE], [INFO.INFO-DM]Computer Science [cs]/Discrete Mathematics [cs.DM], Hough transform, law.invention, [SPI.AUTO]Engineering Sciences [physics]/Automatic, [INFO.INFO-CV] Computer Science [cs]/Computer Vision and Pattern Recognition [cs.CV], [INFO.INFO-TS]Computer Science [cs]/Signal and Image Processing, Minimum bounding box, law, Voting, [INFO.INFO-DC] Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], [INFO.INFO-RB]Computer Science [cs]/Robotics [cs.RO], ComputingMilieux_MISCELLANEOUS, Block (data storage), media_common, [SPI.SIGNAL] Engineering Sciences [physics]/Signal and Image processing, Connected component, Histogram, [INFO.INFO-AO]Computer Science [cs]/Computer Arithmetic, [INFO.INFO-RB] Computer Science [cs]/Robotics [cs.RO], [INFO.INFO-CV]Computer Science [cs]/Computer Vision and Pattern Recognition [cs.CV], Cuda, Voting algorithm, Connected Component Analysis, [INFO.INFO-DM] Computer Science [cs]/Discrete Mathematics [cs.DM], [SPI.AUTO] Engineering Sciences [physics]/Automatic, [INFO.INFO-TI] Computer Science [cs]/Image Processing [eess.IV], [INFO.INFO-TI]Computer Science [cs]/Image Processing [eess.IV], [INFO.INFO-AO] Computer Science [cs]/Computer Arithmetic, [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], Algorithm, Connected-component labeling, [SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processing
Abstract

International audience; Connected Component Analysis is vastly used as a building block for many Computer Vision algorithms from many fields like medical image processing, surveillance, or autonomous driving. It extends Connected Component Labeling by computing some features of the connected components like their bounding box or their surface. As such, Connected Component Analysis is a voting algorithm just like histogram computation or Hough transform. Voting algorithms are difficult on many-core architectures like GPUs because of the serialization of atomic memory accesses. The trend to increase the number of cores makes this issue even more critical. This paper explores multiple ways to reduce those conflicts for voting algorithms and especially for Connected Component Analysis. We show that our new algorithm is from 4 up to 10 times faster than State-of-the-Art on average on an Nvidia A100.

Published
2021

37. A Fixed-Parameter Algorithm for Scheduling Unit Dependent Tasks on Parallel Machines with Time Windows

Author

Munier Kordon Alix, Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), and Munier Kordon, Alix

Subjects
Binary search algorithm, [INFO.INFO-RO] Computer Science [cs]/Operations Research [cs.RO], Applied Mathematics, [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS], 0211 other engineering and technologies, Interval graph, makespan, [INFO.INFO-DS] Computer Science [cs]/Data Structures and Algorithms [cs.DS], 021107 urban & regional planning, 0102 computer and information sciences, 02 engineering and technology, [INFO.INFO-RO]Computer Science [cs]/Operations Research [cs.RO], Decision problem, 01 natural sciences, parallel identical machines, Scheduling (computing), Dynamic programming, Pathwidth, maximum lateness, 010201 computation theory & mathematics, Time windows, Discrete Mathematics and Combinatorics, Algorithm, Mathematics, parameterized complexity
Abstract

This paper proves that the existence of a feasible schedule for a set of dependent tasks of unit execution times with release dates and deadlines on a limited number of processors is a fixed-parameter tractable problem. The parameter considered is the pathwidth of the interval graph associated with the time windows of the tasks. A fixed-parameter algorithm based on a dynamic programming approach is developed and proved to solve this decision problem. Fixed-parameter algorithms for the two classical problems P | p r e c , p i = 1 , r i | C max and P | p r e c , p i = 1 , r i | L max are then derived using a binary search. They are, as far as we know, the first fixed-parameter algorithms for these scheduling problems.

Published
2020

38. FRIPON: a worldwide network to track incoming meteoroids

Author

Marsset, Michaël, Brož, Miroslav, Castillo-Rogez, Julie, Hanuš, Josef, Viikinkoski, Matti, Ševeček, Pavel, Marchis, Franck, Podlewska-Gaca, Edyta, Asphaug, Erik, Bartczak, Przemyslaw, Berthier, Jérôme, Cipriani, Fabrice, Dudziński, Grzegorz, Dumas, Christophe, Ďurech, Josef, Ferrais, Marin, Fétick, Romain, Fusco, Thierry, Kaasalainen, Mikko, Kryszczynska, Agnieszka, Lamy, Philippe, Le Coroller, Hervé, Marciniak, Anna, Michalowski, Tadeusz, Michel, Patrick, Richardson, Derek, Santana-Ros, Toni, Vachier, Frédéric, Vigan, Arthur, Witasse, Olivier, Yang, Bin, Colas, François, Zanda, B., Bouley, S., Jeanne, S., Malgoyre, A., Birlan, Mirel, Blanpain, C., Gattacceca, J., Jorda, Laurent, Lecubin, J., Marmo, C., Rault, J., Vaubaillon, J., Vernazza, Pierre, Yohia, C., Gardiol, D., Nedelcu, A., Poppe, B., Rowe, J., Forcier, M., Trigo-Rodriguez, J., Lamy, H., Behrend, R., Ferrière, L., Barghini, D., Buzzoni, A., Carbognani, A., Di Carlo, M., Di Martino, M., Knapic, C., Londero, E., Pratesi, G., Rasetti, S., Riva, W., Stirpe, G., Valsecchi, G., Volpicelli, C., Zorba, S., Coward, D., Drolshagen, E., Drolshagen, G., Hernandez, O., Jehin, Emmanuel, Jobin, M., King, A., Nitschelm, C., Ott, T., Sanchez-Lavega, A., Toni, A., Abraham, P., Affaticati, F., Albani, M., Andreis, A., Andrieu, T., Anghel, S., Antaluca, E., Antier, K., Appéré, T., Armand, A., Ascione, G., Audureau, Y., Auxepaules, G., Avoscan, T., Baba Aissa, D., Bacci, P., Bǎdescu, O., Baldini, R., Baldo, R., Balestrero, A., Baratoux, D., Barbotin, E., Bardy, M., Basso, S., Bautista, O., Bayle, L., Beck, P., Bellitto, R., Belluso, R., Benna, C., Benammi, M., Beneteau, E., Benkhaldoun, Z., Bergamini, P., Bernardi, F., Bertaina, M., Bessin, P., Betti, L., Bettonvil, F., Bihel, D., Birnbaum, C., Blagoi, O., Blouri, E., Boacă, I., Boatǎ, R., Bobiet, B., Bonino, R., Boros, K., Bouchet, E., Borgeot, V., Bouchez, E., Boust, D., Boudon, V., Bouman, T., Bourget, P., Brandenburg, S., Bramond, Ph., Braun, E., Bussi, A., Cacault, P., Caillier, B., Calegaro, A., Camargo, J., Caminade, S., Campana, A., Campbell-Burns, P., Canal-Domingo, R., Carell, O., Carreau, S., Cascone, E., Cattaneo, C., Cauhape, P., Cavier, P., Celestin, S., Cellino, A., Champenois, M., Chennaoui Aoudjehane, H., Chevrier, S., Cholvy, P., Chomier, L., Christou, A., Cricchio, D., Coadou, P., Cocaign, J., Cochard, F., Cointin, S., Colombi, E., Colque Saavedra, J., Corp, L., Costa, M., Costard, F., COTTIER, M., Cournoyer, P., Coustal, E., Cremonese, G., Cristea, O., Cuzon, J., D’Agostino, G., Daiffallah, K., Dǎnescu, C., Dardon, A., Dasse, T., Davadan, C., Debs, V., Defaix, J., Deleflie, F., D’Elia, M., De Luca, P., De Maria, P., Deverchère, P., Devillepoix, H., Dias, A., Di Dato, A., Di Luca, R., Dominici, F., Drouard, Alexis, Dumont, J., Dupouy, P., Duvignac, L., Egal, A., Erasmus, N., Esseiva, N., Ebel, A., Eisengarten, B., Federici, F., Feral, S., Ferrant, G., Ferreol, E., Finitzer, P., Foucault, A., Francois, P., Frîncu, M., Froger, J., Gaborit, F., Gagliarducci, V., Galard, J., Gardavot, A., Garmier, M., Garnung, M., Gautier, B., Gendre, B., Gerard, D., Gerardi, A., Godet, J., Grandchamps, A., Grouiez, B., Groult, S., Guidetti, D., Giuli, G., Hello, Y., Henry, X., Herbreteau, G., Herpin, M., Hewins, P., Hillairet, J., Horak, J., Hueso, R., Huet, E., Huet, S., Hyaumé, F., Interrante, G., Isselin, Y., Jeangeorges, Y., Janeux, P., Jeanneret, P., Jobse, K., Jouin, S., Jouvard, J., Joy, K., Julien, J., Kacerek, R., Kaire, M., Kempf, M., Koschny, D., Krier, C., Kwon, M., Lacassagne, L., Lachat, D., Lagain, A., Laisné, E., Lanchares, V., Laskar, J., Lazzarin, M., Leblanc, M., Lebreton, J., Lecomte, J., Le Dû, P., LELONG, F., Lera, S., Leoni, J., Le-Pichon, A., Le-Poupon, P., Leroy, A., Leto, G., Levansuu, A., Lewin, E., Lienard, A., Licchelli, D., LOCATELLI, H., Loehle, S., Loizeau, D., Luciani, L., Maignan, M., Manca, F., Mancuso, S., Mandon, E., Mangold, N., Mannucci, F., Maquet, L., Marant, D., Marchal, Y., Marin, J., Martin-Brisset, J., Martin, D., Mathieu, D., Maury, A., Mespoulet, N., Meyer, F., Meyer, J., Meza, E., Moggi Cecchi, V., Moiroud, J., Millan, M., Montesarchio, M., Misiano, A., Molinari, E., Molau, S., Monari, J., Monflier, B., Monkos, A., Montemaggi, M., Monti, G., Moreau, R., Morin, J., Mourgues, R., Mousis, O., Nablanc, C., Nastasi, A., Niacşu, L., Notez, P., Ory, M., Pace, E., Paganelli, M., Pagola, A., Pajuelo, M., Palacián, J., Pallier, G., Paraschiv, P., Pardini, R., Pavone, M., Pavy, G., Payen, G., Pegoraro, A., Peña-Asensio, E., Perez, L., Pérez-Hoyos, S., Perlerin, V., Peyrot, A., Peth, F., Pic, V., Pietronave, S., Pilger, C., Piquel, M., Pisanu, T., Poppe, M., Portois, L., Prezeau, J., Pugno, N., Quantin, C., Quitté, G., Rambaux, Nicolas, Ravier, E., Repetti, U., Ribas, S., Richard, C., Richard, D., RIGONI, M., Rivet, J., Rizzi, N., Rochain, S., Rojas, J.F., Romeo, M., Rotaru, M., Rotger, M., Rougier, P., Rousselot, P., Rousset, J., Rousseu, D., Rubiera, O., Rudawska, R., Rudelle, J., Ruguet, J.P., Russo, P., Sales, S., Sauzereau, O., Salvati, F., Schieffer, M., Schreiner, D., Scribano, Y., Selvestrel, D., Serra, R., Shengold, L., Shuttleworth, A., Smareglia, R., Sohy, S., Soldi, M., Stanga, R., Steinhausser, A., Strafella, F., Sylla Mbaye, S., Smedley, A., Tagger, M., Tanga, Paolo, Taricco, C., Teng, J., Tercu, J., Thizy, O., Thomas, J., Tombelli, M., Trangosi, R., Tregon, B., Trivero, P., Tukkers, A., Turcu, V., Umbriaco, G., Unda-Sanzana, E., Vairetti, R., Valenzuela, M., Valente, G., Varennes, G., Vauclair, S., Vergne, J., Verlinden, M., Vidal-Alaiz, M., Vieira-Martins, R., Viel, A., Vîntdevarǎ, D., Vinogradoff, V., Volpini, P., Wendling, M., Wilhelm, P., Wohlgemuth, K., Yanguas, P., Zagarella, R., Zollo, A., l'Observatoire de Paris, Muséum national d'Histoire naturelle (France), Université Paris-Saclay, OSU Institut Pythéas, Istituto Nazionale di Astrofisica, Fondazione Cassa di Risparmio di Torino, Fondazione De Mari Savona, Diputación Foral de Bizkaia, Ministry of Research and Innovation (Romania), Museu de Astronomia e Ciências Afins (Brazil), Labex ESEP, Sorbonne Université, Universidad Pública de Navarra / Nafarroako Unibertsitate Publikoa. InaMat - Institute for Advanced Materials, Universidad Pública de Navarra. Departamento de Estadística, Informática y Matemáticas, Nafarroako Unibertsitate Publikoa. Estatistika, Informatika eta Matematika Saila, Institut de Mécanique Céleste et de Calcul des Ephémérides (IMCCE), Institut national des sciences de l'Univers (INSU - CNRS)-Observatoire de Paris, Université Paris sciences et lettres (PSL)-Université Paris sciences et lettres (PSL)-Université de Lille-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Institut Pythéas (OSU PYTHEAS), Institut de Recherche pour le Développement (IRD)-Aix Marseille Université (AMU)-Institut national des sciences de l'Univers (INSU - CNRS)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), Centre européen de recherche et d'enseignement des géosciences de l'environnement (CEREGE), Institut de Recherche pour le Développement (IRD)-Aix Marseille Université (AMU)-Collège de France (CdF (institution))-Institut national des sciences de l'Univers (INSU - CNRS)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), Laboratoire d'Astrophysique de Marseille (LAM), Centre National de la Recherche Scientifique (CNRS)-Institut national des sciences de l'Univers (INSU - CNRS)-Aix Marseille Université (AMU)-Centre National d'Études Spatiales [Toulouse] (CNES), Laboratoire d'Etude du Rayonnement et de la Matière en Astrophysique (LERMA (UMR_8112)), Observatoire de Paris, Université Paris sciences et lettres (PSL)-Université Paris sciences et lettres (PSL)-Sorbonne Université (SU)-Institut national des sciences de l'Univers (INSU - CNRS)-Centre National de la Recherche Scientifique (CNRS)-CY Cergy Paris Université (CY), Unité Scientifique de la Station de Nançay (USN), Centre National de la Recherche Scientifique (CNRS)-Observatoire de Paris, Université Paris sciences et lettres (PSL)-Université Paris sciences et lettres (PSL)-Institut national des sciences de l'Univers (INSU - CNRS)-Observatoire des Sciences de l'Univers en région Centre (OSUC), Université Paris sciences et lettres (PSL)-Université Paris sciences et lettres (PSL)-Université d'Orléans (UO)-Centre National de la Recherche Scientifique (CNRS)-Institut national des sciences de l'Univers (INSU - CNRS)-Observatoire de Paris, Université Paris sciences et lettres (PSL)-Université d'Orléans (UO)-Centre National de la Recherche Scientifique (CNRS)-Université d'Orléans (UO), Laboratoire de paléontologie, évolution, paléoécosystèmes, paléoprimatologie (PALEVOPRIM ), Université de Poitiers-Centre National de la Recherche Scientifique (CNRS), Université Paris sciences et lettres (PSL), Diagnostic des Plasmas Hors Equilibres (DPHE), Institut national universitaire Champollion [Albi] (INUC), Université Fédérale Toulouse Midi-Pyrénées-Université Fédérale Toulouse Midi-Pyrénées, Laboratoire de Physique et Chimie de l'Environnement et de l'Espace (LPC2E), Observatoire des Sciences de l'Univers en région Centre (OSUC), Université Paris sciences et lettres (PSL)-Université Paris sciences et lettres (PSL)-Université d'Orléans (UO)-Centre National de la Recherche Scientifique (CNRS)-Centre National d’Études Spatiales [Paris] (CNES), Galaxies, Etoiles, Physique, Instrumentation (GEPI), Université Paris sciences et lettres (PSL)-Université Paris sciences et lettres (PSL)-Centre National de la Recherche Scientifique (CNRS), Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Aix Marseille Université (AMU)-Collège de France (CdF (institution))-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-Institut de Recherche pour le Développement (IRD)-Centre National de la Recherche Scientifique (CNRS)-Institut national des sciences de l'Univers (INSU - CNRS), Aix Marseille Université (AMU)-Institut national des sciences de l'Univers (INSU - CNRS)-Centre National d'Études Spatiales [Toulouse] (CNES)-Centre National de la Recherche Scientifique (CNRS), Laboratoire d'Etude du Rayonnement et de la Matière en Astrophysique et Atmosphères = Laboratory for Studies of Radiation and Matter in Astrophysics and Atmospheres (LERMA), École normale supérieure - Paris (ENS-PSL), Université Paris sciences et lettres (PSL)-Université Paris sciences et lettres (PSL)-Institut national des sciences de l'Univers (INSU - CNRS)-Observatoire de Paris, Université Paris sciences et lettres (PSL)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-CY Cergy Paris Université (CY), Université Paris sciences et lettres (PSL)-Université d'Orléans (UO)-Centre National de la Recherche Scientifique (CNRS), Laboratoire de Planétologie et Géosciences - Le Mans (LPG - Le Mans), Laboratoire de Planétologie et Géosciences [UMR_C 6112] (LPG), Université d'Angers (UA)-Institut national des sciences de l'Univers (INSU - CNRS)-Centre National de la Recherche Scientifique (CNRS)-Nantes université - UFR des Sciences et des Techniques (Nantes univ - UFR ST), Nantes Université - pôle Sciences et technologie, Nantes Université (Nantes Univ)-Nantes Université (Nantes Univ)-Nantes Université - pôle Sciences et technologie, Nantes Université (Nantes Univ)-Nantes Université (Nantes Univ)-Université d'Angers (UA)-Institut national des sciences de l'Univers (INSU - CNRS)-Centre National de la Recherche Scientifique (CNRS)-Nantes université - UFR des Sciences et des Techniques (Nantes univ - UFR ST), Nantes Université (Nantes Univ)-Nantes Université (Nantes Univ), Laboratoire Interdisciplinaire Carnot de Bourgogne (ICB), Université de Technologie de Belfort-Montbeliard (UTBM)-Université de Bourgogne (UB)-Université Bourgogne Franche-Comté [COMUE] (UBFC)-Centre National de la Recherche Scientifique (CNRS), Université de Toulouse (UT)-Université de Toulouse (UT), Lumière, nanomatériaux et nanotechnologies (L2n), Institut Charles Delaunay (ICD), Université de Technologie de Troyes (UTT)-Centre National de la Recherche Scientifique (CNRS)-Université de Technologie de Troyes (UTT)-Centre National de la Recherche Scientifique (CNRS), Univers, Transport, Interfaces, Nanostructures, Atmosphère et environnement, Molécules (UMR 6213) (UTINAM), Institut national des sciences de l'Univers (INSU - CNRS)-Centre National de la Recherche Scientifique (CNRS)-Université de Franche-Comté (UFC), Université Bourgogne Franche-Comté [COMUE] (UBFC)-Université Bourgogne Franche-Comté [COMUE] (UBFC), Morphodynamique Continentale et Côtière (M2C), Université de Caen Normandie (UNICAEN), Normandie Université (NU)-Normandie Université (NU)-Institut national des sciences de l'Univers (INSU - CNRS)-Université de Rouen Normandie (UNIROUEN), Normandie Université (NU)-Centre National de la Recherche Scientifique (CNRS), Institut de minéralogie, de physique des matériaux et de cosmochimie (IMPMC), Muséum national d'Histoire naturelle (MNHN)-Institut de recherche pour le développement [IRD] : UR206-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Géosciences Paris Saclay (GEOPS), Institut national des sciences de l'Univers (INSU - CNRS)-Université Paris-Saclay-Centre National de la Recherche Scientifique (CNRS), Colas, F., Zanda, B., Bouley, S., Jeanne, S., Malgoyre, A., Birlan, M., Blanpain, C., Gattacceca, J., Jorda, L., Lecubin, J., Marmo, C., Rault, J. L., Vaubaillon, J., Vernazza, P., Yohia, C., Gardiol, D., Nedelcu, A., Poppe, B., Rowe, J., Forcier, M., Koschny, D., Trigo-Rodriguez, J. M., Lamy, H., Behrend, R., Ferriere, L., Barghini, D., Buzzoni, A., Carbognani, A., Di Carlo, M., Di Martino, M., Knapic, C., Londero, E., Pratesi, G., Rasetti, S., Riva, W., Stirpe, G. M., Valsecchi, G. B., Volpicelli, C. A., Zorba, S., Coward, D., Drolshagen, E., Drolshagen, G., Hernandez, O., Jehin, E., Jobin, M., King, A., Nitschelm, C., Ott, T., Sanchez-Lavega, A., Toni, A., Abraham, P., Affaticati, F., Albani, M., Andreis, A., Andrieu, T., Anghel, S., Antaluca, E., Antier, K., Appere, T., Armand, A., Ascione, G., Audureau, Y., Auxepaules, G., Avoscan, T., Baba Aissa, D., Bacci, P., Badescu, O., Baldini, R., Baldo, R., Balestrero, A., Baratoux, D., Barbotin, E., Bardy, M., Basso, S., Bautista, O., Bayle, L. D., Beck, P., Bellitto, R., Belluso, R., Benna, C., Benammi, M., Beneteau, E., Benkhaldoun, Z., Bergamini, P., Bernardi, F., Bertaina, M. E., Bessin, P., Betti, L., Bettonvil, F., Bihel, D., Birnbaum, C., Blagoi, O., Blouri, E., Boaca, I., Boata, R., Bobiet, B., Bonino, R., Boros, K., Bouchet, E., Borgeot, V., Bouchez, E., Boust, D., Boudon, V., Bouman, T., Bourget, P., Brandenburg, S., Bramond, P., Braun, E., Bussi, A., Cacault, P., Caillier, B., Calegaro, A., Camargo, J., Caminade, S., Campana, A. P. C., Campbell-Burns, P., Canal-Domingo, R., Carell, O., Carreau, S., Cascone, E., Cattaneo, C., Cauhape, P., Cavier, P., Celestin, S., Cellino, A., Champenois, M., Chennaoui Aoudjehane, H., Chevrier, S., Cholvy, P., Chomier, L., Christou, A., Cricchio, D., Coadou, P., Cocaign, J. Y., Cochard, F., Cointin, S., Colombi, E., Colque Saavedra, J. P., Corp, L., Costa, M., Costard, F., Cottier, M., Cournoyer, P., Coustal, E., Cremonese, G., Cristea, O., Cuzon, J. C., D'Agostino, G., Daiffallah, K., Danescu, C., Dardon, A., Dasse, T., Davadan, C., Debs, V., Defaix, J. P., Deleflie, F., D'Elia, M., De Luca, P., De Maria, P., Deverchere, P., Devillepoix, H., Dias, A., Di Dato, A., Di Luca, R., Dominici, F. M., Drouard, A., Dumont, J. L., Dupouy, P., Duvignac, L., Egal, A., Erasmus, N., Esseiva, N., Ebel, A., Eisengarten, B., Federici, F., Feral, S., Ferrant, G., Ferreol, E., Finitzer, P., Foucault, A., Francois, P., Frincu, M., Froger, J. L., Gaborit, F., Gagliarducci, V., Galard, J., Gardavot, A., Garmier, M., Garnung, M., Gautier, B., Gendre, B., Gerard, D., Gerardi, A., Godet, J. P., Grandchamps, A., Grouiez, B., Groult, S., Guidetti, D., Giuli, G., Hello, Y., Henry, X., Herbreteau, G., Herpin, M., Hewins, P., Hillairet, J. J., Horak, J., Hueso, R., Huet, E., Huet, S., Hyaume, F., Interrante, G., Isselin, Y., Jeangeorges, Y., Janeux, P., Jeanneret, P., Jobse, K., Jouin, S., Jouvard, J. M., Joy, K., Julien, J. F., Kacerek, R., Kaire, M., Kempf, M., Krier, C., Kwon, M. K., Lacassagne, L., Lachat, D., Lagain, A., Laisne, E., Lanchares, V., Laskar, J., Lazzarin, M., Leblanc, M., Lebreton, J. P., Lecomte, J., Le Du, P., Lelong, F., Lera, S., Leoni, J. F., Le-Pichon, A., Le-Poupon, P., Leroy, A., Leto, G., Levansuu, A., Lewin, E., Lienard, A., Licchelli, D., Locatelli, H., Loehle, S., Loizeau, D., Luciani, L., Maignan, M., Manca, F., Mancuso, S., Mandon, E., Mangold, N., Mannucci, F., Maquet, L., Marant, D., Marchal, Y., Marin, J. L., Martin-Brisset, J. C., Martin, D., Mathieu, D., Maury, A., Mespoulet, N., Meyer, F., Meyer, J. Y., Meza, E., Moggi Cecchi, V., Moiroud, J. J., Millan, M., Montesarchio, M., Misiano, A., Molinari, E., Molau, S., Monari, J., Monflier, B., Monkos, A., Montemaggi, M., Monti, G., Moreau, R., Morin, J., Mourgues, R., Mousis, O., Nablanc, C., Nastasi, A., Niacsu, L., Notez, P., Ory, M., Pace, E., Paganelli, M. A., Pagola, A., Pajuelo, M., Palacian, J. F., Pallier, G., Paraschiv, P., Pardini, R., Pavone, M., Pavy, G., Payen, G., Pegoraro, A., Pena-Asensio, E., Perez, L., Perez-Hoyos, S., Perlerin, V., Peyrot, A., Peth, F., Pic, V., Pietronave, S., Pilger, C., Piquel, M., Pisanu, T., Poppe, M., Portois, L., Prezeau, J. F., Pugno, N., Quantin, C., Quitte, G., Rambaux, N., Ravier, E., Repetti, U., Ribas, S., Richard, C., Richard, D., Rigoni, M., Rivet, J. P., Rizzi, N., Rochain, S., Rojas, J. F., Romeo, M., Rotaru, M., Rotger, M., Rougier, P., Rousselot, P., Rousset, J., Rousseu, D., Rubiera, O., Rudawska, R., Rudelle, J., Ruguet, J. P., Russo, P., Sales, S., Sauzereau, O., Salvati, F., Schieffer, M., Schreiner, D., Scribano, Y., Selvestrel, D., Serra, R., Shengold, L., Shuttleworth, A., Smareglia, R., Sohy, S., Soldi, M., Stanga, R., Steinhausser, A., Strafella, F., Sylla Mbaye, S., Smedley, A. R. D., Tagger, M., Tanga, P., Taricco, C., Teng, J. P., Tercu, J. O., Thizy, O., Thomas, J. P., Tombelli, M., Trangosi, R., Tregon, B., Trivero, P., Tukkers, A., Turcu, V., Umbriaco, G., Unda-Sanzana, E., Vairetti, R., Valenzuela, M., Valente, G., Varennes, G., Vauclair, S., Vergne, J., Verlinden, M., Vidal-Alaiz, M., Vieira-Martins, R., Viel, A., Vintdevara, D. C., Vinogradoff, V., Volpini, P., Wendling, M., Wilhelm, P., Wohlgemuth, K., Yanguas, P., Zagarella, R., Zollo, A., Universidad Pública de Navarra / Nafarroako Unibertsitate Publikoa. INAMAT2 - Institute for Advanced Materials and Mathematics, Ferrière, L., Appéré, T., Bǎdescu, O., Boacă, I., Boatǎ, R., Bramond, Ph., D’Agostino, G., Dǎnescu, C., D’Elia, M., Deverchère, P., Frîncu, M., Hyaumé, F., Laisné, E., Le Dû, P., Niacşu, L., Palacián, J. F., Peña-Asensio, E., Pérez-Hoyos, S., Quitté, G., Rojas, J.F., Ruguet, J.P., Vîntdevarǎ, D. C., Research unit Medical Physics, and Damage and Repair in Cancer Development and Cancer Treatment (DARE)

Subjects
DYNAMICS, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], Meteors, Computer science, Radio receiver, [INFO.INFO-DM]Computer Science [cs]/Discrete Mathematics [cs.DM], Surveys, 010502 geochemistry & geophysics, Track (rail transport), 01 natural sciences, Meteorites, meteors, meteoroids, law.invention, Planets and planetary system, [INFO.INFO-TS]Computer Science [cs]/Signal and Image Processing, Methods: observational, law, [INFO.INFO-RB]Computer Science [cs]/Robotics [cs.RO], meteoroids, 010303 astronomy & astrophysics, ComputingMilieux_MISCELLANEOUS, Observational methods, Earth and Planetary Astrophysics (astro-ph.EP), meteoroids -surveys -methods: observational -interplanetary medium, [SDU.ASTR]Sciences of the Universe [physics]/Astrophysics [astro-ph], ORIGIN, [INFO.INFO-AO]Computer Science [cs]/Computer Arithmetic, meteorites, meteors, meteoroids – surveys – methods: observational – interplanetary medium, Meteoroids, RECOVERY, ORBIT, Meteorite, Fully automated, Interplanetary medium, [INFO.INFO-TI]Computer Science [cs]/Image Processing [eess.IV], [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], Astrophysics - Instrumentation and Methods for Astrophysics, [SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processing, FLUX, Real-time computing, fripon, [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS], FOS: Physical sciences, Context (language use), CAMERA, [INFO.INFO-SE]Computer Science [cs]/Software Engineering [cs.SE], [SPI.AUTO]Engineering Sciences [physics]/Automatic, [SDU.STU.PL]Sciences of the Universe [physics]/Earth Sciences/Planetology, 0103 physical sciences, FIREBALL NETWORK, observational [Methods], meteors, Instrumentation and Methods for Astrophysics (astro-ph.IM), 0105 earth and related environmental sciences, Meteoroid, INNISFREE METEORITE, [INFO.INFO-CV]Computer Science [cs]/Computer Vision and Pattern Recognition [cs.CV], Astronomy and Astrophysics, METEORITE FALL, Meteorites, meteors, meteoroid, Camera network, Space and Planetary Science, [SDU]Sciences of the Universe [physics], Interplanetary spaceflight, meteroids tracking, meteoroids - surveys - methods: observational, SYSTEM, Astrophysics - Earth and Planetary Astrophysics, Meteorites
Abstract

Context. Until recently, camera networks designed for monitoring fireballs worldwide were not fully automated, implying that in case of a meteorite fall, the recovery campaign was rarely immediate. This was an important limiting factor as the most fragile - hence precious - meteorites must be recovered rapidly to avoid their alteration. Aims. The Fireball Recovery and InterPlanetary Observation Network (FRIPON) scientific project was designed to overcome this limitation. This network comprises a fully automated camera and radio network deployed over a significant fraction of western Europe and a small fraction of Canada. As of today, it consists of 150 cameras and 25 European radio receivers and covers an area of about 1.5 × 10km. Methods. The FRIPON network, fully operational since 2018, has been monitoring meteoroid entries since 2016, thereby allowing the characterization of their dynamical and physical properties. In addition, the level of automation of the network makes it possible to trigger a meteorite recovery campaign only a few hours after it reaches the surface of the Earth. Recovery campaigns are only organized for meteorites with final masses estimated of at least 500 g, which is about one event per year in France. No recovery campaign is organized in the case of smaller final masses on the order of 50 to 100 g, which happens about three times a year; instead, the information is delivered to the local media so that it can reach the inhabitants living in the vicinity of the fall. Results. Nearly 4000 meteoroids have been detected so far and characterized by FRIPON. The distribution of their orbits appears to be bimodal, with a cometary population and a main belt population. Sporadic meteors amount to about 55% of all meteors. A first estimate of the absolute meteoroid flux (mag < -5; meteoroid size ≥∼1 cm) amounts to 1250/yr/10km. This value is compatible with previous estimates. Finally, the first meteorite was recovered in Italy (Cavezzo, January 2020) thanks to the PRISMA network, a component of the FRIPON science project., FRIPON was initiated by funding from ANR (grant N.13- BS05-0009-03), carried by the Paris Observatory, Muséum National d’Histoire Naturelle, Paris-Saclay University and Institut Pythéas (LAM-CEREGE). VigieCiel was part of the 65 Millions d’Observateurs project, carried by the Muséum National d’Histoire Naturelle and funded by the French Investissements d’Avenir program. FRIPON data are hosted and processed at Institut Pythéas SIP (Service Informatique Pythéas), and a mirror is hosted at IMCCE (Institut de Mécanique Céleste et de Calcul des Éphémérides / Paris Observatory) with the help of IDOC (https://idoc.ias.u-psud.fr) (Integrated Data and Operation Center), supported by CNRS and CNES. PRISMA is the Italian Network for Systematic surveillance of Meteors and Atmosphere. It is a collaboration initiated and coordinated by the Italian National Institute for Astrophysics (INAF) that counts members among research institutes, associations and schools (http://www.prisma.inaf.it). PRISMA was partially funded by 2016 and 2020 Research and Education grants from Fondazione Cassa di Risparmio di Torino and by a 2016 grant from Fondazione Agostino De Mari (Savona). FRIPON-Bilbao is supported by a grant from Diputacion Foral Bizkaia (DFB/BFA). FRIPONMOROI was supported by a grant of the Romanian Ministery of Research and Innovation, CCCDI - UEFISCDI, project number PN-III-P1-1.2-PCCDI2017-0226/16PCCDI/2018 , within PNCDI III. Rio de Janeiro camera is hosted and partially maintained by MAST (Museum of Astronomy and Related Sciences)/MCTIC. The Meteorix project acknowledges supports from labex ESEP (Exploration Spatiale des Environnements Planétaires), DIM-ACAV+ Région Île-de-France, Janus CNES, IDEX Sorbonne Universités and Sorbonne Université.

Published
2020

39. MemOpLight: Leveraging application feedback to improve container memory consolidation

Author

Damien Carver, Jonathan Lejeune, Marc Shapiro, Franck Wajsburt, Francis Laniel, Julien Sopena, DistributEd aLgorithms and sYStems (DELYS), Inria de Paris, Institut National de Recherche en Informatique et en Automatique (Inria)-Institut National de Recherche en Informatique et en Automatique (Inria)-LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Well Honed Infrastructure Software for Programming Environments and Runtimes ( Whisper), Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, and Well Honed Infrastructure Software for Programming Environments and Runtimes (Whisper)

Subjects
Computer science, Distributed computing, Linux, Temporal isolation among virtual machines, 020206 networking & telecommunications, 02 engineering and technology, Memory management, Memory, Server, Container (abstract data type), 0202 electrical engineering, electronic engineering, information engineering, 020201 artificial intelligence & image processing, Memory consolidation, [INFO.INFO-OS]Computer Science [cs]/Operating Systems [cs.OS], Container
Abstract

International audience; The container mechanism amortizes costs by consolidating several servers onto the same machine, while keeping them mutually isolated.Specifically, to ensure performance isolation, Linux relies on memory limits.These limits are static, despite the fact that application needs are dynamic; this results in poor performance.To solve this issue, MemOpLight uses dynamic application feedback to rebalance physical memory allocation between containers focusing on under-performing ones.This paper presents the issues, explains the design of MemOpLight, and validates it experimentally.Our approach increases total satisfaction by 13% compared to the default.

Published
2020

40. Virtual Prototyping of Open Source Heterogeneous Systems with an Open Source Framework Featuring SystemC MDVP Extensions

Author

Roselyne Chotin, Daniela Genius, François Pêcheux, Ilias Bournias, Marie-Minerve Louerat, Liliana Andrade, Circuits Intégrés Numériques et Analogiques (CIAN), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), System Level Synthesis (SLS ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), and Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC)

Subjects
010302 applied physics, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], Computer science, business.industry, Model of computation, Cyber-physical system, 02 engineering and technology, Intrinsics, 01 natural sciences, [INFO.INFO-MO]Computer Science [cs]/Modeling and Simulation, 020202 computer hardware & architecture, Software, SystemC, Component (UML), 0103 physical sciences, Synchronization (computer science), 0202 electrical engineering, electronic engineering, information engineering, [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, Software engineering, business, computer, ComputingMilieux_MISCELLANEOUS, Virtual prototyping, computer.programming_language
Abstract

The increasing need for validating heterogeneous Systems on Chip (SoC) before their costly fabrication gives rise to the development of numerous virtual prototyping tools, allowing not only the modeling of such systems, but also the simulation of the environment in which they will be embedded, including the crucial software. SoC designers indeed require flexible simulation frameworks that follow a component-based approach and that cover a wide field of physical/engineering disciplines… and no questions asked about the simulation intrinsics. Furthermore, for SMEs, laboratories, and enthusiastic makers with limited funding, the cost of these frameworks makes them unaffordable, especially when the target system hardware is supposed to be Open Source too. In this paper, we detail the principles of an Open Source SystemC Multi-Disciplinary Virtual Prototyping (SystemC MDVP) framework, which directly tackles with all these issues. We introduce the key concepts and methodology (relationships between Models of Computation and overall synchronization techniques) and insist on the importance of a “correct by construction” global model elaboration that allows to generate the hierarchy of solvers that make up the final simulator. We then show that a new Model of Computation, Electrical Network, has been added to SystemC MDVP to handle components with non-linear beahviors. The paper concludes with a quick presentation of the echOpen project which aims at designing a low-cost portable echography device modeled and simulated with the nresented nrincinles.

Published
2020

41. Real-time video denoising for embedded systems

Author

PETRETO, Andrea, Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Sorbonne Université, Lionel Lacassagne, Professeur, LIP6 - Sorbonne Université, STAR, ABES, Laboratoire d'Informatique de Paris 6 (LIP6), Sorbonne Université, UPMC University of Paris 6, and Lionel Lacassagne

Subjects
Débruitage vidéo, Traitement d'images, Embedded systems, Fast optical flow, Optical flow, Video denoising, [INFO.INFO-CV]Computer Science [cs]/Computer Vision and Pattern Recognition [cs.CV], Débruitgae vidéo, Optimisation CPU, Systèmes embarqués, SIMD, [INFO.INFO-ES] Computer Science [cs]/Embedded Systems, Fast video denoising, [INFO.INFO-TS]Computer Science [cs]/Signal and Image Processing, Vision par ordinateur, Flot optique, Architecture des processeurs, [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], Optimisations, CPU optimization
Abstract

In many applications, noisy video can be a major problem. There are denoising methods with highly effective denoising capabilities but at the cost of a very high computational complexity. Other faster methods are limited in their applications since they does not handle high levels of noise correctly. For many applications, it is however very important to preserve a good image quality in every situation with sometimes strong embedding constraints. In this work, the goal is to propose an embedded solution for live video denoising. The method needs to remain efficient with even under high level of noise. We limit our work to embedded CPU under 30W of power consumption. This work led to a new video denoising algorithm called RTE-VD: Real-Time Embedded Video Denoising. RTE-VD is composed of 3 steps: stabilization, movement compensation by dense optical flow estimation and spatio-temporal filtering. On an embedded CPU (Jetson AGX), RTE-VD runs at 30 frame per seconds on qHD videos (960x580 pixels). In order to achieve such performance, many compromises and optimizations had to be done. We compare RTE-VD to other state-of-the-art methods in both terms of denoising capabilities and processing time. We show that RTE-VD brings a new relevant tradeoff between quality and speed., Pour beaucoup d'applications, la présence de bruit dans les vidéos peut être un problème majeur. Des algorithmes de débruitage existent, la plupart sont qualitativement très efficaces mais au prix d'un temps de traitement trop important pour pouvoir envisager une implémentation temps réel embarquée. D'autres méthodes, plus rares, peuvent être exécutées en temps réel mais gèrent mal les forts niveaux de bruit. Pour bon nombre d'applications, il est cependant important de conserver une bonne qualité d'images en toutes conditions avec parfois d'importantes contraintes d'embarquabilité. Dans ces travaux, nous cherchons à proposer une solution de débruitage vidéo qui permet un traitement en direct sur des systèmes embarqués. La solution proposée doit rester efficace même pour de forts niveaux de bruit. Ici, nous nous limitons à l'utilisation de CPU embarqués d'une consommation inférieure à 30W. Les travaux menés dans le cadre de cette thèse ont permis la mise en place d'une chaîne de débruitage nommée RTE-VD (Real-Time Embedded Video Denoising). RTE-VD se décompose en trois étapes : stabilisation, recalage temporel par flot optique et filtrage spatio-temporel. Sur un CPU embarqué (Jetson AGX), RTE-VD permet de traiter à une cadence de 30 images par seconde, des vidéos au format qHD (960x540 pixels). Afin de pouvoir atteindre ces performances, de nombreux compromis et optimisations ont dû être faits. Nous comparons RTE-VD à d'autres méthodes de référence de la littérature à la fois en termes de qualité du débruitage et de vitesse d'exécution. Nous montrons que RTE-VD apporte un nouveau positionnement pertinent au niveau du rapport qualité/vitesse.

Published
2020

42. A New Run-based Connected Component Labeling for Efficiently Analyzing and Processing Holes

Author

Lemaitre, Florian, Lacassagne, Lionel, Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), and Lacassagne, Lionel

Subjects
FOS: Computer and information sciences, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-AR] Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-TS] Computer Science [cs]/Signal and Image Processing, Computer Vision and Pattern Recognition (cs.CV), [INFO.INFO-SE] Computer Science [cs]/Software Engineering [cs.SE], [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS], Computer Science - Computer Vision and Pattern Recognition, [INFO.INFO-DS] Computer Science [cs]/Data Structures and Algorithms [cs.DS], [INFO.INFO-SE]Computer Science [cs]/Software Engineering [cs.SE], [INFO.INFO-DM]Computer Science [cs]/Discrete Mathematics [cs.DM], [SPI.AUTO]Engineering Sciences [physics]/Automatic, hole processing, [INFO.INFO-CV] Computer Science [cs]/Computer Vision and Pattern Recognition [cs.CV], Euler number, [INFO.INFO-TS]Computer Science [cs]/Signal and Image Processing, [INFO.INFO-DC] Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], [INFO.INFO-RB]Computer Science [cs]/Robotics [cs.RO], Computer Science::Databases, [SPI.SIGNAL] Engineering Sciences [physics]/Signal and Image processing, [INFO.INFO-AO]Computer Science [cs]/Computer Arithmetic, [INFO.INFO-RB] Computer Science [cs]/Robotics [cs.RO], [INFO.INFO-CV]Computer Science [cs]/Computer Vision and Pattern Recognition [cs.CV], [INFO.INFO-DM] Computer Science [cs]/Discrete Mathematics [cs.DM], [SPI.AUTO] Engineering Sciences [physics]/Automatic, [INFO.INFO-TI] Computer Science [cs]/Image Processing [eess.IV], Connected component labeling and analysis, [INFO.INFO-TI]Computer Science [cs]/Image Processing [eess.IV], [INFO.INFO-AO] Computer Science [cs]/Computer Arithmetic, adjacency tree, [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], hole filling, [SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processing
Abstract

This article introduces a new connected component labeling and analysis algorithm for foreground and background labeling that computes the adjacency tree. The computation of features (bounding boxes, first statistical moments, Euler number) is done on-the-fly. The transitive closure enables an efficient hole processing that can be filled while their features are merged with the surrounding connected component without the need to rescan the image. A comparison with existing algorithms shows that this new algorithm can do all these computations faster than algorithms processing black and white components., 5 pages

Published
2020

43. Optimisation de l’énergie et de la performance d’applications sur des micro-serveurs hétérogènes

Author

Ait Aba, Massinissa, LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Laboratoire d'Intégration des Systèmes et des Technologies (LIST), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Université Paris-Saclay, Sorbonne Université, Alix Munier-Kordon, Lilia Koutchoukali Zaourar, Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Alix Munier Kordon, LIP6, Sorbonne Université, Lilia Zaouar, LCE, CEA LIST (encadrante), and Laboratoire d'Intégration des Systèmes et des Technologies (LIST (CEA))

Subjects
Energy, Makespan, Scheduling, GPU, DAG applications, Processeurs, Ordonnancement, Applications, Énergie, Optimisation, hybrid platform, CPU, heterogeneous platforms, [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], Temps d'exécution, plateformes hétérogènes, approximation algorithm
Abstract

Recent applications, both in industry and research often need massive calculations. They have different hardware requirements in terms of computing speed, which leads to very high energy consumption of hardware platforms. Heterogeneous computing platforms offer a good compromise with high computing power while preserving the energy consumed to run high-performance parallel applications. They are therefore nowadays an interesting computing resource. In order to exploit the advantages offered by heterogeneity in terms of performance, efficient and automatic management of computing resources is becoming increasingly important to execute parallel applications. These new architectures have thus given rise to new scheduling problems that allocate and sequence calculations on the different resources by optimizing one or more criteria. The objective of this thesis is to determine an efficient scheduling of a parallel application on a heterogeneous resource system in order to minimize the total execution time (makespan) of the application while respecting an energy constraint. Two classes of heterogeneous platforms have been considered in our work: fully heterogeneous architectures that combine several processing elements (CPUs, GPUs, FPGAs), and hybrid platforms limited to two types of processors (CPU + GPU for example). We propose several application scheduling strategies on both platforms with two execution models. Preliminary experiments with the proposed algorithms using different applications and platforms of different sizes have shown good results compared to existing methods in the literature.; Les applications récentes dans l'industrie ou dans la recherche nécessitent souvent des calculs massifs. Ainsi, les applications deviennent plus exigeantes en vitesse de calcul, ce qui engendre une très grande consommation énergétique des plateformes matérielles. Les plateformes de calcul hétérogènes offrent un bon compromis avec une puissance de calcul importante tout en préservant l'énergie consommée pour l'exécution d'applications parallèles de hautes performances. Elles représentent donc de nos jours des moyens de calcul intéressants. Afin de profiter des avantages offerts par l'hétérogénéité en termes de performance, la gestion efficace et automatique des ressources de calcul est de plus en plus importante pour exécuter des applications parallèles. L'objectif de cette thèse est de déterminer un ordonnancement efficace d'une application parallèle sur un système de ressources hétérogènes afin de minimiser le temps d'exécution total (makespan) de l'application tout en respectant une contrainte d'énergie. Deux classes de plateformes hétérogènes ont été considérées dans notre travail : des architectures totalement hétérogènes qui combinent plusieurs éléments de traitement (CPUs, GPUs, FPGAs), et des plateformes hybrides limitées à deux types de processeurs (CPU + GPU par exemple) en très grand nombre. Nous proposons plusieurs stratégies d'ordonnancement d'applications sur les deux plateformes avec deux modèles d'exécution. Les expériences préliminaires des algorithmes proposés en utilisant différentes applications et des plateformes de tailles différentes ont donné de bons résultats par rapport aux méthodes existantes dans la littérature.

Published
2020

44. Optimization of energy and performance of applications on heterogeneous micro-servers

Author

Ait Aba, Massinissa, Laboratoire d'Intégration des Systèmes et des Technologies (LIST), Université Paris-Saclay-Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Sorbonne Université, Alix Munier Kordon, LIP6, Sorbonne Université, and Lilia Zaouar, LCE, CEA LIST (encadrante)

Subjects
temps d'exécution, applications, Scheduling, optimisation, GPU, processeurs, makespan, DAG applications, ordonnancement, hybrid platform, CPU, heterogeneous platforms, [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], plateformes hétérogènes, approximation algorithm, énergie
Abstract

Recent applications, both in industry and research often need massive calculations. They have different hardware requirements in terms of computing speed, which leads to very high energy consumption of hardware platforms. Heterogeneous computing platforms offer a good compromise with high computing power while preserving the energy consumed to run high-performance parallel applications. They are therefore nowadays an interesting computing resource. In order to exploit the advantages offered by heterogeneity in terms of performance, efficient and automatic management of computing resources is becoming increasingly important to execute parallel applications. These new architectures have thus given rise to new scheduling problems that allocate and sequence calculations on the different resources by optimizing one or more criteria.The objective of this thesis is to determine an efficient scheduling of a parallel application on a heterogeneous resource system in order to minimize the total execution time (makespan) of the application while respecting an energy constraint. Two classes of heterogeneous platforms have been considered in our work: fully heterogeneous architectures that combine several processing elements (CPUs, GPUs, FPGAs), and hybrid platforms limited to two types of processors (CPU + GPU for example). We propose several application scheduling strategies on both platforms with two execution models. Preliminary experiments with the proposed algorithms using different applications and platforms of different sizes have shown good results compared to existing methods in the literature.; Les applications récentes dans l'industrie ou dans la recherche nécessitent souvent des calculs massifs. Ainsi, les applications deviennent plus exigeantes en vitesse de calcul, ce qui engendre une très grande consommation énergétique des plateformes matérielles. Les plateformes de calcul hétérogènes offrent un bon compromis avec une puissance de calcul importante tout en préservant l'énergie consommée pour l'exécution d'applications parallèles de hautes performances. Elles représentent donc de nos jours des moyens de calcul intéressants. Afin de profiter des avantages offerts par l'hétérogénéité en termes de performance, la gestion efficace et automatique des ressources de calcul est de plus en plus importante pour exécuter des applications parallèles. L'objectif de cette thèse est de déterminer un ordonnancement efficace d'une application parallèle sur un système de ressources hétérogènes afin de minimiser le temps d'exécution total (makespan) de l'application tout en respectant une contrainte d'énergie. Deux classes de plateformes hétérogènes ont été considérées dans notre travail : des architectures totalement hétérogènes qui combinent plusieurs éléments de traitement (CPUs, GPUs, FPGAs), et des plateformes hybrides limitées à deux types de processeurs (CPU + GPU par exemple) en très grand nombre. Nous proposons plusieurs stratégies d'ordonnancement d'applications sur les deux plateformes avec deux modèles d'exécution. Les expériences préliminaires des algorithmes proposés en utilisant différentes applications et des plateformes de tailles différentes ont donné de bons résultats par rapport aux méthodes existantes dans la littérature.

Published
2020

45. Jeux d’instructions : extensions SIMD et extensions vectorielles

Author

Daniel Etiemble, Lionel Lacassagne, Lacassagne, Lionel, Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, and Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)

Subjects
[INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-DM] Computer Science [cs]/Discrete Mathematics [cs.DM], [INFO.INFO-AR] Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-AO]Computer Science [cs]/Computer Arithmetic, [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS], [INFO.INFO-SE] Computer Science [cs]/Software Engineering [cs.SE], [INFO.INFO-AO] Computer Science [cs]/Computer Arithmetic, [INFO.INFO-DS] Computer Science [cs]/Data Structures and Algorithms [cs.DS], [INFO.INFO-SE]Computer Science [cs]/Software Engineering [cs.SE], [INFO.INFO-DM]Computer Science [cs]/Discrete Mathematics [cs.DM], ComputerSystemsOrganization_PROCESSORARCHITECTURES, ComputingMilieux_MISCELLANEOUS
Abstract

Les extensions SIMD sont presentes dans de nombreux jeux d’instructions. Alors qu’Intel a continue a etendre la taille des registres a 512 bits avec les instructions SIMD correspondantes, ARM a arrete l’evolution de l’extension SIMD Neon et opte pour l’extension vectorielle SVE. Enfin RISC-V privilegie l’extension vectorielle. Les differences entre extensions SIMD et vectorielles sont presentees, ainsi que les dernieres evolutions du SIMD Intel et les extensions vectorielles SVE et RISC-V.

Published
2020

46. High-level Partitioning and Design Space Exploration for Cyber Physical Systems

Author

Roselyne Chotin, Ludovic Apvrille, Daniela Genius, Ilias Bournias, System on Chip (LabSoC), Laboratoire Traitement et Communication de l'Information (LTCI), Institut Mines-Télécom [Paris] (IMT)-Télécom Paris-Institut Mines-Télécom [Paris] (IMT)-Télécom Paris, Département Communications & Electronique (COMELEC), Télécom ParisTech, Institut Polytechnique de Paris (IP Paris), Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Circuits Intégrés Numériques et Analogiques (CIAN), and Institut Mines-Télécom [Paris] (IMT)-Télécom Paris

Subjects
Computer science, Design space exploration, Systems engineering, Cyber-physical system, [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, [INFO.INFO-SE]Computer Science [cs]/Software Engineering [cs.SE], ComputingMilieux_MISCELLANEOUS
Abstract

International audience; Virtual prototyping and co-simulation of mixed analog/digital embedded systems have emerged as a promising research topic, but usually assume an already Hardware/Software partitioned system. The paper presents a new approach for high-level system partitioning of such mixed systems, by expressing the structure and the behaivour of the analog parts with SysML diagrams. A tool already able to handle some aspects of analog design after partitioning has been extended to be able to handle partitioning, thus completing the methodology. As a real-world case study, we show the design of the hardware part of a medical application.

Published
2020

47. Secure delivery of program properties through optimizing compilation

Author

Albert Cohen, Karine Heydemann, Arnaud de Grandmaison, Son Tuan Vu, Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), ARM Ltd [Cambridge] (ARM), and ANR-15-CE39-0008,PROSECCO,Génération de code sécurisé avec des protections formellement prouvées(2015)

Subjects
Soundness, 050101 languages & linguistics, Computer science, Programming language, Semantics (computer science), media_common.quotation_subject, 05 social sciences, 02 engineering and technology, computer.software_genre, Data flow diagram, Consistency (database systems), Control flow, Debugging, 0202 electrical engineering, electronic engineering, information engineering, [INFO]Computer Science [cs], 020201 artificial intelligence & image processing, 0501 psychology and cognitive sciences, Compiler, computer, Machine code, media_common
Abstract

International audience; Annotations and assertions capturing static program properties are ubiquitous, from robust software engineering to safety-critical or secure code. These may be functional or non-functional properties of control and data flow, memory usage, I/O and real time. We propose an approach to encode, translate, and preserve the semantics of both functional and non-functional properties along the optimizing compilation of C to machine code. The approach involves (1) capturing and translating source-level properties through lowering passes and intermediate representations, such that data and control flow optimizations will preserve their consistency with the transformed program, and (2) carrying properties and their translation as debug information down to machine code. Our experiments using LLVM validate the soundness, expressiveness and efficiency of the approach, considering a reference suite of functional properties as well as established security properties and applications hardened against side-channel attacks.

Published
2020

48. WPMVP'20: Proceedings of the 2020 Sixth Workshop on Programming Models for SIMD/Vector Processing

Author

Eitzinger, Jan, Lacassagne, Lionel, Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Jan Eitzinger, and Lionel Lacassagne

Subjects
[INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-TS]Computer Science [cs]/Signal and Image Processing, [INFO.INFO-TI]Computer Science [cs]/Image Processing [eess.IV], [INFO.INFO-AO]Computer Science [cs]/Computer Arithmetic, [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS], [INFO.INFO-CV]Computer Science [cs]/Computer Vision and Pattern Recognition [cs.CV], [INFO.INFO-SE]Computer Science [cs]/Software Engineering [cs.SE], [INFO.INFO-DM]Computer Science [cs]/Discrete Mathematics [cs.DM], [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], [SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processing
Abstract

International audience; SIMD processing is still a main driver of performance in general-purpose processor architectures besides multi-core technology. Both technologies increase the potential performance by factors, but have to be explicitly utilized by the software. To expose those different levels of parallelism in a productive and manageable way is still an active area of research. NVIDIA stirred the programming interface scene with the development of a simple yet efficient performance-oriented application programmer interface. OpenACC, OpenMP 4.0, OpenCL, Cilk+ and icpc are just examples for many choices available. Additionally, established optimizing compilers still improve significantly in unleashing the SIMD potential. Notable developments on the hardware side include relaxation of alignment requirements and more powerful scatter/gather and shuffle instructions. Recent developments include the introduction of 512-bit SIMD units in general purpose processors (AVX512) and new innovations as the Scalable Vector Extension (SVE) for the ARMv8-A architecture or the NEC SX Aurora TSUBASA vector processors.

Published
2020

49. How to speed Connected Component Labeling up with SIMD RLE algorithms

Author

Florian Lemaitre, Lionel Lacassagne, Arthur Marius Hennequin, Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), and Lacassagne, Lionel

Subjects
[INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-AR] Computer Science [cs]/Hardware Architecture [cs.AR], Computer science, [INFO.INFO-TS] Computer Science [cs]/Signal and Image Processing, [INFO.INFO-SE] Computer Science [cs]/Software Engineering [cs.SE], [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS], [INFO.INFO-DS] Computer Science [cs]/Data Structures and Algorithms [cs.DS], 02 engineering and technology, [INFO.INFO-SE]Computer Science [cs]/Software Engineering [cs.SE], [INFO.INFO-DM]Computer Science [cs]/Discrete Mathematics [cs.DM], Scheduling (computing), [SPI.AUTO]Engineering Sciences [physics]/Automatic, [INFO.INFO-CV] Computer Science [cs]/Computer Vision and Pattern Recognition [cs.CV], [INFO.INFO-TS]Computer Science [cs]/Signal and Image Processing, Factor (programming language), 0202 electrical engineering, electronic engineering, information engineering, [INFO.INFO-DC] Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], [INFO.INFO-RB]Computer Science [cs]/Robotics [cs.RO], SIMD, computer.programming_language, [SPI.SIGNAL] Engineering Sciences [physics]/Signal and Image processing, Xeon, Efficient algorithm, [INFO.INFO-AO]Computer Science [cs]/Computer Arithmetic, [INFO.INFO-RB] Computer Science [cs]/Robotics [cs.RO], [INFO.INFO-CV]Computer Science [cs]/Computer Vision and Pattern Recognition [cs.CV], 020207 software engineering, ComputerSystemsOrganization_PROCESSORARCHITECTURES, ARM architecture, [INFO.INFO-DM] Computer Science [cs]/Discrete Mathematics [cs.DM], [SPI.AUTO] Engineering Sciences [physics]/Automatic, [INFO.INFO-TI] Computer Science [cs]/Image Processing [eess.IV], [INFO.INFO-TI]Computer Science [cs]/Image Processing [eess.IV], Benchmark (computing), 020201 artificial intelligence & image processing, [INFO.INFO-AO] Computer Science [cs]/Computer Arithmetic, [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], Algorithm, computer, Connected-component labeling, [SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processing
Abstract

International audience; The research in Connected Component Labeling, although old, is still very active and several efficient algorithms for CPUs and GPUs have emerged during the last years and are always improving the performance. This article introduces a new SIMD run-based algorithm for CCL. We show how RLE compression can be SIMDized and used to accelerate scalar run-based CCL algorithms. A benchmark done on Intel, AMD and ARM processors shows that this new algorithm outperforms the State-of-the-Art by an average factor of ×1.7 on AVX2 machines and ×1.9 on Intel Xeon Skylake with AVX512.

Published
2020

50. Two Deadline Reduction Algorithms for Scheduling Dependent Typed-tasks Systems

Author

Hanen, Claire, Munier-Kordon, Alix, Recherche Opérationnelle (RO), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Université Paris Nanterre (UPN), Université Paris Lumières (UPL), Architecture et Logiciels pour Systèmes Embarqués sur Puce (ALSOC), and HANEN, Claire

Subjects
maximum lateness, Scheduling, makespan, [INFO]Computer Science [cs], [INFO] Computer Science [cs], typed-tasks system, ComputingMilieux_MISCELLANEOUS
Abstract

International audience

Published
2020

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