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Ion Sensitive Field Effect Transistors (ISFET) are most widely used in medical applications due to simple integration process, measurement of sensitivity and its dual properties. These ISFETs are originated from Metal Oxide Semiconductor Field Effect Transistors (MOSFET) with improvements in structure. ISFETs are used as bio-sensors for the detection of biomarkers in blood, DNA replication and several other medical applications. In this article, we design the ISFET pH sensor in two dimensions with integration of two models namely, semiconductor model and electrolyte model are represented using manageable global equations. The sensitivity of ISFET with different oxide layers is measured and compared. We also measure the sensitivity of the designed 2D-ISFET in two different solutions and compare it with different oxides to know the best oxide material to be used to design the device.

In this paper, a new hybrid methodology that combines precoding transform and companding transforms is being proposed for next-generation heterogeneous wireless networks. This method will improve the performance of the orthogonal frequency division multiplexing (OFDM) system by reducing the Peak to average power ratio (PAPR). A hybrid methodology that combines exponential companding (EC), which is a non-linear companding technique with Discrete Hartley Transform (DHT), as well as Walsh Hadamard Transform (WHT), is proposed and investigated. When the three simulated results are compared with original OFDM signal, piecewise linear companding shows an improvement factor of 28.8% over the original OFDM signal. Exponential companding is having an improvement factor of 33.49% over the original OFDM signal. Walsh Hadamard transform combined with exponential companding shows an improvement factor of 34.99% over OFDM. Discrete Hartley Transform combined with Exponential Companding is having an improvement factor of 38.09% over OFDM. The two proposed methods do not introduce any In-band distortion as well as Out-of-band Radiation when compared to the existing technique PLC (Meixia et al. in IEEE Trans Broadcast 60(3):532-539, 2014) which can be observed from the PSD analysis. Among the two proposed methods, the DHT precoded OFDM with the EC system shows significant BER improvement over the remaining methods. In addition to AWGN Channel, this proposed method shows significant BER performance improvement under the SUI-1 to 6 (WiMAX Channels) channels making use of 256-QAM as the modulation technique. As we move to a higher-order constellation, it is possible to transmit more bits per symbol; in such cases, the proposed technique will achieve better improvement in the performance of BER over all the existing techniques.

This study evolves an ultrasensitive label free electrical device, the silicon nanowire field effect transistor (SiNW FET) for cardiac troponin I (cTnI) in acute myocardial infarction (AMI). In this work, SiNW FET is designed, simulated using COMSOL semiconductor module to identify the presence of different concentrations of cTnI present in human blood. The surface of the SiNW is functionalized with the cTnI monoclonal antibody (mAb-cTnI) on attached to detect cTnI antigen. The response of the device is also studied using cTnI at different concentrations with the lowest limit of detection of 0.002 ng/mL. The presented SiNW FET in this study shows considerable response than the earlier developed devices and signify impressive capability for subsequent implementation in point-of-care (PoC) detection.

Reversible gates have been one of the emerging research areas in these days. The reversible gates have several applications in the fields of low power CMOS, DNA computing, optical, nanotechnology etc. Quantum computing is one of the fastest and upcoming nanotechnologies that can implement the digital logical circuits using reversible logic gates. In this paper, CNOT, TOFFOLI, FREDKIN and PERES reversible logic gates have been implemented on IBM quantum computer. An efficient one-bit full adder is going to be proposed using the reversible gates like CNOT and TOFFOLI. Later, a 4x4 multiplier will be developed using the proposed one-bit full adder. The proposed multiplier is proved to perform faster calculations compared to the earlier multipliers. The simulation of the presented modules will be done on IBM Quantum computer and the respective probabilities can be observed for different inputs.

In this paper, we propose a novel “Teeth Junctionless Gate All Around Field Effect Transistor” (TH-JLGAA FET) based on gate engineering method, to obtain finer electrical characteristics. A 3 nm TH-JLGAA FET is designed and was scaled up to 14 nm to observe the effect of scaling on device performance. The characteristics are revealed and compared with contemporary JLGAA FETs. The results show that the novel TH-JLGAA FET appears to have finer Sub-thresholdSlope (SS), Drain Induced Barrier Lowering (DIBL), transconductance (gm), Ion/Ioff current ratio and threshold voltage roll-off. Moreover, these remarkable characteristics can be controlled by engineering the structure and volume of the gate. In addition, the sensitivities of the novel TH-JLGAA FET device with respect to structural parameters are probed.

A practical exhibition of the consequences of the 3D IC in heat management by adding the fin and heat spreaders to thermal through silicon via (TTSV) and IC respectively is proposed in this paper. Thermal cooling and its distribution of burnt potentials at various conditions are the different possessions which can be simulated using FEM simulator. This paper illustrate materials like Silicon nitride (Si3N4), Aluminium oxide (Al2O3), Silicon dioxide (SiO2) as they have the high thermal conductivity and high temperature capabilities which leads to the thermal management in the 3D IC design. Currently, semiconductor industries has cognizance of the metrics such as low density, high thermal strength, good facture of toughness, excellent wear resistance of Silicon nitride and it also shows better capabilities of high temperature, oxidation resistance and high retention strength compared to other metals. Besides silicon nitride has good resistance to thermal shock due to low coefficient of thermal expansion. Aluminium oxide is known for an better electrical insulator but has high thermal conductivity and which can be utilized as the substrate for integrated circuits. The high temperature furnace insulations and electrical insulations are designed by using the aluminium oxides as it has high boiling points and melting points. This makes the rapid use of alumina films in manufacture of IC industry. The other uses of alumina films include spark plug insulators, micro-electric substrates and insulating heat sinks. Silicon dioxide has the properties which helps to use them as the insulator material in IC technology as it has high thermal stability and making it useful for device integration and has high dielectric strength and thermal expansion coefficient is very low and in this paper we have taken these three materials and these materials have been implemented in our model and advertence the outcomes that which material is working efficiently and preciously.

The evolution of the internet drastically increases the utilization of online data, which needs security using unique identification. The traditional methods of security, such as password, personal identification number (PIN), could not reach the user-friendly requirement of the users. There is a necessity to provide high security for the data by using a unique identification system. Today, in many situations, biometrics plays a crucial role in today’s authentication and recognition. Biometrics deals with unique physical and behavioral characteristics. Fingerprint, face recognition, iris/retinal recognition, voice recognition and vein recognition are some of the biometrics which is used for authentication purpose. In this paper, we highlight different processes that involve finger veins and palm veins recognition and authentication. These finger and palm vein is identified as one of the important unique identifications that can be used for the authentication which provide the security for the important personal data. In this study, we noticed that the advantage of using a vein for the authentication process is that it provides high security because it can be detected even when a finger or palm got injured, and it works only when the person is alive otherwise the authentication fails.

Embedded applications software code is increasingly growing in size. Whereas the entire code of all control panels in a car provided for roughly a few 100 K code lines a decade ago, a single control panel such as the engine control can now have up to 1million code lines. With these help of good approach, common scenarios are developed for other, even for mobiles, embedded systems like PDA’s, cell phones etc. However, increasing software size requires greater memory and can therefore raise the cost of an embedded system considerably. The starting of this pattern was already established in the early 1990 s. The compressed code is created by compressing the binary numbers using a code compression tool (at the time of design) is stored in the instruction memory of the embedded devices. The compressed instructions are decompressed and implemented by the processor at the time of startup. One of the serious challenges is that the tables will become wide in size and therefore decrease the benefits of compressing the code that could be accessed. Although the whole research in this area has mostly concentrated on improving greater code compression without specifically targeting the issue of wide look-up table sizes.

3D Integration technology is probably the best methodologies among others which suits CMOS applications with in various layers of devices are stacked with high thickness interconnects between the layers. In 3D IC structure electrical and thermal models are introduced for the interface between Through-Silicon-Via’s (TSV’s). TSV’s can be used to enable the 3-D platform; however this TSV’s will represent additional concerns. TSV-to-substrate and TSV-to-TSV noise coupling is assessed inside the 3-D IC’s. A vertical TSV’s design is proposed to reduce the area per TSV, capacitive coupling and effective inductance as compared with the other classical design patterns. TSV’s and substrate noise coupling is one of the major drawbacks in 3D IC. Some of the researchers have tried to overcome the problems in TSV based 3D IC due to noise coupling using different models, materials and different circuit techniques. This paper shows the complete road map for the noise coupling reduction in future IC integration.

3D IC Integration shows the most emerging technology for future integration nodes which is now a most important trend for the semiconductor industries. Through-silicon-via (TSV) based integration is the prime technique to facilitate 3D IC integration without compromising the Moore’s law. It is likely to usher the IC industries a paradigm shift from planar integration as it provides major benefits like improvement of system performance, power and enables heterogeneous integration. In this paper, we report Germanium/poly-germanium as an substitute material for Silicon/poly-silicon due to its superior carrier mobility. Mobility of electrons and holes in c-Silicon is 1500 cm2/V-s and 450 cm2/V-s respectively, where as in c-Germanium, the respective values are 3900 cm2/V-s and 1900 cm2/V-s. Therefore, considering these carrier mobility values we can envisage that poly germanium will be one of the ideal candidate towards realizing a high speed TSV interconnect when compared with poly-silicon. Nevertheless, even though copper is used widely to fill TSVs, it is also bereft of proper thermal expansion match with Silicon/dielectric (SiO2). The coefficient of thermal expansion (CTE) of Cu (∼17.5x 10-6 /°C) is many times more than of silicon (∼2.5x 10-6/°C). Hence, there will be heavy mismatch between Cu filled TSV and Silicon/SiO2, and then it creates stress and strain between the interfaces. The CTE of germanium (5.8x 10–6/°C) is very close to Silicon, thus there CTE mismatch is very less, this fact is also an added advantage for Germanium to challenge copper as TSV material.

Three Dimensional IC (3D IC) integration is one of the emerging technology which suits CMOS applications by stacking various IC layers vertically. In 3D IC, IC Layers are interconnected electrically using Through Silicon Vias (TSV’s) and mechanically by Cu–Cu bonding. The major drawbacks in 3D IC structures are thermal issues between layers and noise coupling between TSV-to-substrate and TSV-to-TSV which leads significantly on the overall system performance. This paper presents an extensive survey on one of the major issue in 3D based IC integration technique called thermal issues between the layers and how the researchers have tried to overcome the problems by introducing various materials which are suitable for elimination of hotspot, by introducing spreaders among the layers. This extensive survey work shows the complete roadmap for the thermal management in future IC Integration.

Electrocardiogram (ECG) is widely used technique in study of heart beat irregularities such as cardiac arrhythmias, sinus rhythms and heart failure. It is a significant and popular technique to classify and detect the cardiac infraction. ECG signal analyses the electric activity of heart and outputs it in the form of waveforms which help in detection of heart irregularities. The main goal of this research work is to classify the arrhythmia with more accurate results in less computational time. The research is carried in machine learning technique- SVM classifier using Discrete Wavelet Transform (DWT). In this methodology, ECG samples of three different classes-Normal Sinus Rhythm, Congestive Heart Failure and Cardiac Arrhythmia were collected from MIT-BIH and BIDMC databanks. The collected signals were prepared into training set and testing set with a ratio of 70:30 percent respectively. Total 190 features were extracted from the prepared data using Discrete Wavelet Transform. DWT was chosen as it has the ability to vary the window size depending on the frequency. The extracted features were given to SVM classifier, which is best for classification purpose. The results were evaluated using the testing set and the final results were plotted using a confusion matrix. The performance accuracy of the model is 95.92 percent.

Complementary metal oxide semiconductor (CMOS) devices are expected to face new challenges such as exponential current leakage, DIBL, hot carrier effects, and etc. at nano scale. Hence the CMOS technology is being supplanted by the nanotechnologies. Quantum-dot Cellular Automata (QCA) is key technology at nano scale which operates at tera hertz of speed. Comparing with the traditional CMOS technology, the QCA technology has low power consumption and high density. This technology also has a unique methodology such as “processing in wire” and “memory-in-motion”. This work confers an area proficient, high speed full adder (FA) design with efficient clocking. The proposed full adder design comprises of 26 Quantum cells with delay of two clock phases, area occupancy of 0.03 µm2. This paper utilizes the unique characteristics of QCA and the proposed Wallace tree multiplier is implemented with the mentioned FA and is designed by using QCA Designer 2.0.3 tool.

Through-silicon-via (TSV) technology has emerged as the key technology to enable 3D IC integration. 3D integration is seen as the leading candidate, which can help in sustaining Moore’s Law to future IC technology nodes. It clearly set a benchmark to the IC industry due to its tremendous benefits in performance, data bandwidth, and supports heterogeneous integration. In 3D IC structure TSV’s are used to carry the overall electrical signal between the layers. The major drawback in the TSV based 3D integration is noise coupling between aggressive (electrical signal carrying TSV; ETSV) and victim TSV’s (ground). It can be reduced by creating very good isolation between TSV’s and Si substrate by using different liner materials around TSV’s. In this work, we have addressed various TSV models to reduce noise coupling between the TSV’s. The models we have studied are single layer model and stacked layers of liner model. Apart from this we have studied how the core materials in the TSV reduces noise coupling between aggressive and victim TSV’s. Also, we have shown the high frequency study for proposed models. Finally, our work shows single layer model with Crystalline-Germanium is comparably better noise coupling reduction even at higher frequency.

Thermal through silicon via (TTSV) and heat spreaders plays a vital role in heat management in 3-Dimentional IC integration. However in recent years FIN to TTSV and heat spreaders has proposed to detects and spread heat in any one direction which leads to the damage of an integration circuit (IC). This paper proposes a FIN with optimal directions and heat spreaders to spread the heat in various directions and finally the heat absorb towards heat sink effectively. In this work, we have also demonstrated various thermal cooling effects and its impact on the distribution of potential across IC at different conditions. We have studied these using FEM Simulator for (1) 3D IC architecture with FIN and heat spreaders using Graphene and CNT material, (2) TTSV with FIN and heat spreaders of Graphene, (3) TTSV with fin and heat spreaders of CNT, (4) TTSV with FIN direction towards heat source made of Graphene and CNT, and (5) TTSV with FIN direction towards TSV made of CNT and Graphene. Our result shows that CNT has better thermal cooling management towards heat source as well TSVs than Graphene with order greater than 100 Kelvin.

Semiconductor Industries are mainly facing problems by using planar integration (2D IC) in order to overcome the paradigm shift has been adopted as vertical IC integration so called 3D IC. It not only provides higher bandwidth, higher system performance, but also consumes less power with system scaling. 3D IC has an ability to coordinate IC chips by stacking them vertically and electrically associated utilizing TSV's (Through Silicon Via). By utilizing TSV's in 3D IC, TSV noise coupling is one of the vital factors for the system performance aspects. TSV's play major role in carrying the electrical signal between the IC’s of 3D integrated structures. Noise coupling is the major drawback between the signal carrying TSV’s (ETSV) and victim TSV’s. In this work, we have shown better electrical integrity by reducing the noise coupling from TSV to Silicon substrate by essentially changing the CMOS compatible dielectric materials as liner structures. In addition to this performance of various proposed structures are analyzed and verified under different parameters like electrical signal and at high frequencies. Also, the noise coupling analysis has been studied for Electrical TSV’s (ETSV), TTSV (Thermal Through Silicon Via) and heat source. Finally, our work shows liner material Teflon AF1600 shows comparably better noise coupling performance for all the proposed models even at higher frequencies like THz.

We propose in this paper a reduction in the size of wearable antennas on silicon (Si) for medicinal frameworks and Internet of things (IoT) in various nanoapplications. This research also introduces one more type of dynamic patch antenna designed in favor of speech-enhanced healthcare applications. The most significant impediment to the adoption of smart correspondence and medical services frameworks is voice-enabled IoT. The primary objective of a body area network (BAN) is to give ceaselessly clinical information to the doctors. Actually, wireless body area network is flexible, dense, trivial, and less expensive. On the other hand, the main disadvantage is low efficiency for small printed antenna. Microstrip silicon antenna recurrence is changed because of ecological conditions, distinctive reception apparatus areas, and diverse framework activity modes. By using tunable antenna, the efficiency of bandwidth usage can be increased. Amplifiers are associated with the feed line of antenna in order to build its dynamic range. In this study, a dynamic polarized antenna is constructed, analysed, and attempted for fabrication. The gain of the antenna is 13 ± 2 dB for the frequency range of 390 to 610 MHz. The output of the polarized antenna is roughly 19 dBm. At different environmental conditions, the performance and ability to control the antenna could vary. To achieve stable performance, we have used varactor diode and voltage-controlled diode. This silicon wearable antenna can be fabricated and tested for many medical applications like health monitoring system and pacemakers. Furthermore, micromachining techniques can be used to lower the practical dielectric constant of silicon and hence improve radiation efficiency.

Diffusion is one of the most critical and key factor for achieving low temperature and low pressure thermocompression bonding. In this work, we propose a novel concept of modifying density conditions within the Cu films. The density of film was varied by varying the DC bias applied for the sputter deposition. While two samples of different densities are brought in contact with each other, Cu atoms from the thin film having higher density of atoms tends to interdiffuse into the thin film having lower density. Optimal dc biasing conditions for pair of wafers were figured out based on the pre-bonding characterizations and it yielded an excellent bonding at Sub 100 °C. No observable bond interface X-TEM images and bond strength of 164 MPa confirmed the quality of bonding. Furthermore, bonded structure undergone various reliability tests include multiple current stressing test, temperature cycling test and relative humidity test confirms Cu-Cu bonding using surface density gradient engineering is stable and promising candidate for future 3D IC integration applications.

Emerging developments in embedded computer systems and applications demand low energy consumption and high performance. Owing to increased demand for low-voltage computing and lowered technology returns, academia and industry are interested primarily in energy-efficient accelerators. Hardware accelerators have the greatest disadvantage that they are not programmable. It can also be misused for a particular task. The number of accelerators in a device can cause scalability problems. Flexibility and scalability issues are present in programmable accelerators. Coarse-grained reconfigurable architecture (CGRA) design, implementation, computer systems integration and compilation for CGRA are the key contributions in this proposed design. First of all in parallel ultra-low-power processing system (PULP), the CGRA-based integrated programmable array (IPA) is implemented. Second, PULP-NN is a coding library that has been developed for the RISC-V cluster with parallel, high–low storage. The key development in PULP-NN is that the latest move towards aggressive quantization of deep neural network inferences which is a collection of kernels which use bytes and sub-byte information types up to INT-1. The library in the proposed procedure utilizes advanced sign handling expansions in the RISC-V PULP processors and in bunch matches, to accomplish ideal energy effectiveness of estimation execution.

In India, energy meters are electro-mechanical and postpaid. The main drawback of this approach is that a person must walk from street to street, reading each house's energy meter and giving out the charges. According to that reading, the bill was paid. Even when bills are paid on time, issues like an over-billing amount or a provider warning are common. To overcome this problem, we proposed an IoT-based prepaid power recharge unit that will integrate with ordinary household energy meters and be capable of counting down energy use and switching off the main supply once the energy usage countdown hits zero, and a data collecting system using IoT. The recharge info and energy usage from the recharge station are saved in a Data Acquisition server connected to the energy meters to control the main power supply and monitor power consumption in real-time.

We propose in this paper a reduction in the size of wearable antennas on silicon (Si) for medicinal frameworks and Internet of things (IoT). This research also introduces one more type of dynamic patch antenna designed in favor of speech-enhanced healthcare applications. The most significant impediment to the adoption of smart correspondence and medical services frameworks is voice-enabled IoT. The primary objective of a body area network (BAN) is to give ceaselessly clinical information to the doctors. Actually wireless body area network is flexible, dense, trivial and less expensive. On the other hand the main disadvantage is low efficiency for small printed antenna. Microstrip silicon antenna recurrence is changed because of ecological conditions, distinctive reception apparatus areas and diverse framework activity modes. By using tunable antenna the efficiency of bandwidth usage can be increased. Amplifiers are associated with the feed line of antenna in order to build its dynamic range. In this study, a dynamic polarized antenna is constructed, analysed and attempted for fabrication. The gain of the antenna is 13 ± 2dB for the frequency range of 390 to 610MHz. The output of the polarized antenna is roughly 19 dBm. At different environmental conditions the performance and ability to control the antenna could vary. To achieve stable performance, we have used varactor diode and voltage controlled diode. This silicon wearable antenna can be fabricated and tested for many medical applications like health monitoring system, pacemakers etc. Furthermore, Micromachining techniques can be used to lower the practical dielectric constant of Silicon and hence improve radiation efficiency.

Street extraction from ethereal pictures is fundamental for regular daily existence having a few helpful application in for instance metropolitan arranging and auto route. Streets are right now separated utilizing techniques that requires a great deal of manual work directed by people which is both tedious and blunder inclined. The point of this work is to build up a hearty calculation that can consequently remove streets from elevated pictures. The most appropriate technique for programmed street extraction is an AI approach dependent on stacked convolutional neural organizations. The strategy was executed and considered in contrast to four distinctive street pictures nearby the motorway ORR connecting Hyderabad. The best organization accomplished a review of 0.764, accuracy of 0.812 and nature of 0.670 over a test set of beforehand concealed pictures. Taking into account that the strategy utilized was moderately basic, the outcome is to be viewed as aggressive contrasted with other distributed works.

As per Moore's law, the dimensions of any system have been permanently scaling down to achieve the efficiency of Integrated Circuit (IC) since many decades. ICs have been waiting for a planar platform for a long time during their careful scaling. In the past few years, there have been two big requests. The primary demand is that the measurements of all devices have nearly reached a snag. Limiting the interconnect delay output of complete circuits or systems is the secondary and most significant demand. The most critical and real limitation is that there is none, but the interconnect delay is almost undistinguishable to that of the units. New interconnecting materials, as well as experimental architectures, must be designed to meet the demands of device efficiency. New integration methods called Three-Dimensional IC (3D IC) have been introduced to reduce interconnect delays. Noise coupling is a big issue in 3D IC. As a result, several researchers have applied and verified various materials through TSVs and substrates to minimize noise coupling issues. This paper presents an extensive survey on noise coupling reduction and future direction towards improvement of coupling issues in 3D IC.

This work addresses the robot controlled by hand gesture and voice control. In the technology era, the space between the physical and the digital world is brought closer by the introduction of gesture concept. For all the dangerous tasks we prefer technology rather than people. Even though these robots are being controlled manually in the early stages, these can now be controlled via voice and gestures. This technology of gesture and voice recognition can be defined by the interaction between the computer and the body language of human beings. This constructs the communication link between technology and mankind. The target of this work is to upgrade the complete security to the robot and to simplify the controlling mechanism.

In this paper the impact of electric vehicle charging stations(EVCS) on unbalance radial distribution system(URDS) is analyzed and compensated using reconfiguration using one of the successful heuristic algorithms and origin the era of swarm based optimization called particle swarm optimization (PSO). The objective for optimal placement of EVCS and optimal reconfiguration is the minimization of losses in the system. The methodology is tested on 19 bus URDS. The paper is also covered the impact of EVCS size on the total load of the system with and without reconfiguration of URDS.

Electrocardiogram (EEG) signal detects the electrical activity of the brain. It records all the physiological changes occur in the brain. These signals are useful for detecting different types of sleep disorders. This paper aims in detecting obstructive sleep apnea (OSA) using SVM classifier and DWT technique. The EEG signal is extracted from the polysomnographic database removing the other artifacts, namely electrocardiogram (ECG), blood pressure (BP), respiratory signal at abdominal, respiratory signal at nasal, oxygen saturation are removed. Then, the EEG signal is segmented into four sub-bands as delta(\(\delta \)), theta(\(\theta \)), alpha(\(\alpha \)), and beta(\(\beta \)). The approximation coefficients and detailed coefficients are extracted from these sub-bands using wavelet decomposition technique with Daubechies order-2 (db2) transform. All these coefficients are given to SVM classifier for the detection of OSA. The accuracy of classifier is tested in three cases: in case 1, 90% of data is given for testing; in case 2, 70% is given; and in case 3, only 50% of data is given for testing. It is observed, case 1 has 98% of accuracy in detecting the obstructive sleep apnea. In this paper, 16 healthy subjects and 8 unhealthy subjects are considered. The detailed and approximation coefficients are extracted for all 2500 samples.

Sleep Bruxism is characterized by an unconscious act of tooth grinding or clenching of teeth tightly during sleep or awake state. Early diagnosis is advantageous to overcome the damage of jaw, damage of teeth and other health related problems. This paper focuses clenching of teeth in the sleep state only. This paper presents sleep bruxism disease detection and feature extraction. The electroencephalogram (EEG) signal analysis is one of the useful methods for detecting sleep bruxism disorder. For this analysis 10 subjects are considered. For these 10 subjects the EEG signal is extracted from frontal and temporal electrodes F7–T3, T3–T5 and T4–T6. These EEG signals are decomposed into five sub-bands D6-gamma, D7-beta, D8-alpha, D9-theta and A9-delta. The decomposition is done in nine levels since the signals considered has a sampling frequency of 512 Hz. The signal is decomposed using Daubechies order 2 wavelet. From the decomposed signals the detailed coefficients (D1 to D9) and approximation coefficient (A9) are extracted. From extracted coefficient features like energy, variance, mean and standard deviation are calculated to detect sleep bruxism disorder.

Design of low power systems become a preeminent role in the domain of VLSI. Various algorithms are being used to implement a reliable system. This paper discusses the diagnosis of various symptoms in the audio signal. Discrete Wavelet Transform is the mathematical block for the detection and analysis of the spectral components of an audio signal. The wavelet transform detects signal levels in the acoustic signal. These coefficients are further applied to mathematical blocks such as coastline, quasi-average and energy blocks to diagnosis symptoms respectively depending on the frequency ranges. The symptoms such as cough, sneeze having similar spectral ranges which are distinguish using Mel spectrum based analysis. The aim is to diagnosis the symptomatic patterns in human audio signals with low power design and area efficient computational architecture for the mathematical blocks. The proposed work employs the truncation multiplier design in the wavelet transform and energy parameter. Since the LSB parts are not required in the realization of the wavelet transform filters which reduce the power and area consumption thereby makes the design a power and area efficient system. It is observed a significant change in the power consumption