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Memristive devices with valence change mechanism (VCM) show promise for neuromorphic data processing, although emulation of synaptic behavior with analog weight updates remains a challenge. Standard filamentary and area‐dependent resistive switching exhibit characteristic differences in the transition from the high to low resistance state, which is either abrupt with inherently high variability or gradual and allows quasi‐analog operation. In this study, the two switching modes are clearly correlated to differences in the microstructure and electronic structure for Pt/Al2O3/TiOx/Cr/Pt devices made from amorphous layers of 1.2 nm Al2O3 and 7 nm TiOx by atomic layer deposition. For the filamentary mode, operando spectromicroscopy experiments identify a localized region of ≈50 nm in diameter of reduced titania surrounded by crystalline rutile‐like TiO2, highlighting the importance of Joule heating for this mode. In contrast, both oxide layers remain in their amorphous state for the interfacial mode, which proves that device temperature during switching stays below 670 K, which is the TiO2 crystallization temperature. The analysis of the electronic conduction behavior confirms that the interfacial switching occurs by modulating the effective tunnel barrier width due to accumulation and depletion of oxygen vacancies at the Al2O3/TiOx interface. The results are transferable to other bilayer stacks. [ABSTRACT FROM AUTHOR]

The counter-electrode (CE) material in electrochemical metallization memory (ECM) cells plays a crucial role in the switching process by affecting the reactions at the CE/electrolyte interface. This is due to the different electrocatalytic activity of the CE material towards reduction–oxidation reactions, which determines the metal ion concentration in the electrolyte and ultimately impacts the switching kinetics. In this study, the focus is laid on Pt, TiN, and W, which are relevant in standard chip technology. For these, the influence of CE metal on the switching kinetics of Ag/HfO2-based volatile ECM cells is investigated. Rectangular voltage pulses of different amplitudes were applied, and the SET times were analyzed from the transient curves. The results show that CE material has a significant effect on the SET kinetics, with differences being observed depending on the voltage regime. The formation of interfacial oxides at the CE/electrolyte interface, particularly for non-noble metals, is also discussed in relation to the findings. Overall, this work highlights the important role of the CE material in the switching process of Ag/HfO2-based diffusive memristors and the importance of considering interfacial oxide formation in the design of these devices. [ABSTRACT FROM AUTHOR]

Metal-free chemical vapor deposition (CVD) of single-layer graphene (SLG) on c-plane sapphire has recently been demonstrated for wafer diameters of up to 300 mm, and the high quality of the SLG layers is generally characterized by integral methods. By applying a comprehensive analysis approach, distinct interactions at the graphene-sapphire interface and local variations caused by the substrate topography are revealed. Regions near the sapphire step edges show tiny wrinkles with a height of about 0.2 nm, framed by delaminated graphene as identified by the typical Dirac cone of free graphene. In contrast, adsorption of CVD SLG on the hydroxyl-terminated α-Al2O3 (0001) terraces results in a superstructure with a periodicity of (2.66 ± 0.03) nm. Weak hydrogen bonds formed between the hydroxylated sapphire surface and the π-electron system of SLG result in a clean interface. The charge injection induces a band gap in the adsorbed graphene layer of about (73 ± 3) meV at the Dirac point. The good agreement with the predictions of a theoretical analysis underlines the potential of this hybrid system for emerging electronic applications. [ABSTRACT FROM AUTHOR]