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Random assemblies of magnetic nanowires represent a unique class of materials with promising applications in spintronics and information storage. These assemblies exhibit complex behavior due to the combination of magnetic dipolar interactions between the nanowires and electronic transport properties governed by tunneling barriers at magnetic tunnel junctions (MTJs). The intricate interplay of these phenomena makes the study of magnetic nanowire networks a rich area of research. In this study, we develop a theoretical framework to analyze the resistive behavior of random magnetic nanowire networks. By employing a combination of graph theoretical approaches and mean-field theory, we derive an effective resistance model that encapsulates the contributions of magnetic interactions between the nanowires. Our findings show the importance of considering both the magnetic and electrical properties of nanowire networks in the design and optimization of amorphous resistive devices., Comment: 11.2 pages, double column, 7 figures

Hardware-based neuromorphic computing remains an elusive goal with the potential to profoundly impact future technologies and deepen our understanding of emergent intelligence. The learning-from-mistakes algorithm is one of the few training algorithms inspired by the brain's simple learning rules, utilizing inhibition and pruning to demonstrate self-organized learning. Here we implement this algorithm in purely neuromorphic memristive hardware through a co-design process. This implementation requires evaluating hardware trade-offs and constraints. It has been shown that learning-from-mistakes successfully trains small networks to function as binary classifiers and perceptrons. However, without tailoring the hardware to the algorithm, performance decreases exponentially as the network size increases. When implementing neuromorphic algorithms on neuromorphic hardware, we investigate the trade-offs between depth, controllability, and capacity, the latter being the number of learnable patterns. We emphasize the significance of topology and the use of governing equations, demonstrating theoretical tools to aid in the co-design of neuromorphic hardware and algorithms. We provide quantitative techniques to evaluate the computational capacity of a neuromorphic device based on the measurements performed and the underlying circuit structure. This approach shows that breaking the symmetry of a neural network can increase both the controllability and average network capacity. By pruning the circuit, neuromorphic algorithms in all-memristive device circuits leverage stochastic resources to drive local contrast in network weights. Our combined experimental and simulation efforts explore the parameters that make a network suited for displaying emergent intelligence from simple rules., Comment: 35 pages + 24 Supp Mat, 14 Figures; single column; references added

The advent of memristive devices offers a promising avenue for efficient and scalable analog computing, particularly for linear algebra operations essential in various scientific and engineering applications. This paper investigates the potential of memristive crossbars in implementing matrix inversion algorithms. We explore both static and dynamic approaches, emphasizing the advantages of analog and in-memory computing for matrix operations beyond multiplication. Our results demonstrate that memristive arrays can significantly reduce computational complexity and power consumption compared to traditional digital methods for certain matrix tasks. Furthermore, we address the challenges of device variability, precision, and scalability, providing insights into the practical implementation of these algorithms., Comment: 11 pages, 2 columns + Appendices

Networks with memristive devices are a potential basis for the next generation of computing devices. They are also an important model system for basic science, from modeling nanoscale conductivity to providing insight into the information-processing of neurons. The resistance in a memristive device depends on the history of the applied bias and thus displays a type of memory. The interplay of this memory with the dynamic properties of the network can give rise to new behavior, offering many fascinating theoretical challenges. But methods to analyze general memristive circuits are not well described in the literature. In this paper we develop a general circuit analysis for networks that combine memristive devices alongside resistors, capacitors and inductors and under various types of control. We derive equations of motion for the memory parameters of these circuits and describe the conditions for which a network should display properties characteristic of a resonator system. For the case of a purely memresistive network, we derive Lyapunov functions, which can be used to study the stability of the network dynamics. Surprisingly, analysis of the Lyapunov functions show that these circuits do not always have a stable equilibrium in the case of nonlinear resistance and window functions. The Lyapunov function allows us to study circuit invariances, wherein different circuits give rise to similar equations of motion, which manifest through a gauge freedom and node permutations. Finally, we identify the relation between the graph Laplacian and the operators governing the dynamics of memristor networks operators, and we use these tools to study the correlations between distant memristive devices through the effective resistance., Comment: 32 pages + 10 supplementary, 5 figures